Re: [edk2-devel] [PATCH 1/1] MdeModulePkg: Load Serial driver earlier in DXE

["Borzeszkowski, Alan" <alan.borzeszkowski@intel.com>]

> It does not make sense to have a UEFI Driver active in early DXE because it will not be connected yet and has dependencies on other UEFI drivers that will not be connected yet.

With suggested change, we connect to this driver successfully in early DXE using ConnectController(). We did not observe any issues when Serial driver came online, debug messages are printed and console redirection works just fine.

> Did you consider the use of the SerialPortLib for early DXE that can use PCI serial devices with PcdSerialPciDeviceInfo that can be used for DEBUG() messages.

That's the opposite of what we are trying to accomplish, this way additional maintenance cost is required and on top of that, management of PCI device from library level is complicated (e.g., checking device state).

> The other option is to map the PCI UART into Report Status Code.

Could you elaborate on that?

Also, could you please explain why DXE drivers cannot use Driver Binding?

Regards,
Alan



-----Original Message-----
From: Kinney, Michael D <michael.d.kinney@intel.com> 
Sent: Tuesday, February 20, 2024 6:12 PM
To: devel@edk2.groups.io; Borzeszkowski, Alan <alan.borzeszkowski@intel.com>
Cc: Albecki, Mateusz <mateusz.albecki@intel.com>; Gao, Zhichao <zhichao.gao@intel.com>; Ni, Ray <ray.ni@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com>
Subject: RE: [edk2-devel] [PATCH 1/1] MdeModulePkg: Load Serial driver earlier in DXE

This is a UEFI Driver that depends on the Driver Binding Protocol and use of ConnectController(). These drivers cannot be used until the BDS phase when the active consoles and boot devices are evaluated and the smallest set of drivers required to boot are connected.

It does not make sense to have a UEFI Driver active in early DXE because it will not be connected yet and has dependencies on other UEFI drivers that will not be connected yet.

Did you consider the use of the SerialPortLib for early DXE that can use PCI serial devices with PcdSerialPciDeviceInfo that can be used for DEBUG() messages.

The other option is to map the PCI UART into Report Status Code.

Best regards,

Mike

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of 
> Borzeszkowski, Alan
> Sent: Tuesday, February 20, 2024 4:11 AM
> To: devel@edk2.groups.io
> Cc: Albecki, Mateusz <mateusz.albecki@intel.com>; Gao, Zhichao 
> <zhichao.gao@intel.com>; Ni, Ray <ray.ni@intel.com>; Borzeszkowski, 
> Alan <alan.borzeszkowski@intel.com>
> Subject: [edk2-devel] [PATCH 1/1] MdeModulePkg: Load Serial driver 
> earlier in DXE
> 
> For the purpose of UEFI debug prints enablement in DXE phase, Serial 
> driver should load earlier. Separate .inf file is created in order to 
> make minimal changes to current implementation.
> 
> Signed-off-by: Alan Borzeszkowski <alan.borzeszkowski@intel.com>
> ---
>  .../PciSioSerialDxe/PciSioSerialDxeEarly.inf  | 80 
> +++++++++++++++++++
>  1 file changed, 80 insertions(+)
>  create mode 100644
> MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxeEarly.inf
> 
> diff --git
> a/MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxeEarly.inf
> b/MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxeEarly.inf
> new file mode 100644
> index 0000000000..2ead654898
> --- /dev/null
> +++ b/MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxeEarly.inf
> @@ -0,0 +1,80 @@
> +## @file
> +# Serial driver for standard UARTS on a SIO chip or PCI/PCIE card.
> +#
> +# Produces the Serial I/O protocol for standard UARTS using Super I/O
> or PCI I/O.
> +# This version is used shortly after DXE Core is invoked # # 
> +Copyright (c) 2007 - 2018, Intel Corporation. All rights
> reserved.<BR>
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent # ##
> +
> +[Defines]
> +  INF_VERSION                    = 0x00010005
> +  BASE_NAME                      = PciSioSerialDxeEarly
> +  MODULE_UNI_FILE                = PciSioSerialDxe.uni
> +  FILE_GUID                      = 8BCC425E-585F-4E66-ADA5-
> FEA9A635F911
> +  MODULE_TYPE                    = DXE_DRIVER
> +  VERSION_STRING                 = 1.0
> +  ENTRY_POINT                    = InitializePciSioSerial
> +
> +#
> +# The following information is for reference only and not required by
> the build tools.
> +#
> +#  VALID_ARCHITECTURES           = IA32 X64 EBC
> +#
> +#  DRIVER_BINDING                =  gSerialControllerDriver
> +#  COMPONENT_NAME                =  gPciSioSerialComponentName
> +#  COMPONENT_NAME2               =  gPciSioSerialComponentName2
> +#
> +
> +[Sources]
> +  ComponentName.c
> +  SerialIo.c
> +  SerialIoCommon.c
> +  Serial.h
> +  Serial.c
> +
> +[Packages]
> +  MdePkg/MdePkg.dec
> +  MdeModulePkg/MdeModulePkg.dec
> +
> +[LibraryClasses]
> +  PcdLib
> +  ReportStatusCodeLib
> +  UefiBootServicesTableLib
> +  MemoryAllocationLib
> +  BaseMemoryLib
> +  DevicePathLib
> +  UefiLib
> +  UefiDriverEntryPoint
> +  DebugLib
> +  IoLib
> +
> +[Guids]
> +  gEfiUartDevicePathGuid                        ## SOMETIMES_CONSUMES
> ## GUID
> +
> +[Protocols]
> +  gEfiSioProtocolGuid                           ## TO_START
> +  gEfiDevicePathProtocolGuid                    ## TO_START
> +  gEfiPciIoProtocolGuid                         ## TO_START
> +  gEfiSerialIoProtocolGuid                      ## BY_START
> +  gEfiDevicePathProtocolGuid                    ## BY_START
> +
> +[FeaturePcd]
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHalfHandshake|FALSE   ##
> CONSUMES
> +
> +[Pcd]
> +  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200    ##
> CONSUMES
> +  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits|8         ##
> CONSUMES
> +  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity|1           ##
> CONSUMES
> +  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits|1         ##
> CONSUMES
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|1843200 ##
> CONSUMES
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdPciSerialParameters     ##
> CONSUMES
> +
> +[UserExtensions.TianoCore."ExtraFiles"]
> +  PciSioSerialDxeExtra.uni
> +
> +[Depex]
> +  TRUE
> --
> 2.34.1
> 
> ---------------------------------------------------------------------
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---------------------------------------------------------------------
Intel Technology Poland sp. z o.o.
ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN.
Spolka oswiadcza, ze posiada status duzego przedsiebiorcy w rozumieniu ustawy z dnia 8 marca 2013 r. o przeciwdzialaniu nadmiernym opoznieniom w transakcjach handlowych.

Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej wiadomosci, prosimy o powiadomienie nadawcy oraz trwale jej usuniecie; jakiekolwiek przegladanie lub rozpowszechnianie jest zabronione.
This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.



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