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charset="us-ascii" Content-Transfer-Encoding: quoted-printable >=20 > > +UINT32 mBspApicId =3D 0; >=20 > This should be moved to a separate patch with commit message explaining > the reasons for the change. My guess would be this is required to allow > processors running SmmInitHandler in parallel. >=20 Yes, it's part of work to combine 2 SMIs (gcSmmInitTemplate & gcSmiHandlerT= emplate) into one (gcSmiHandlerTemplate). And gcSmiHandlerTemplate will cal= l the same SmmInitHandler for the first smi init. For smm CPU driver, we ne= ed keep it in the same patch, separate patch will make another patch not wo= rk, because we need replace the mIsBsp to IsBsp:=20 IsBsp =3D (BOOLEAN)(mBspApicId =3D=3D ApicId); While the mBspApicId is need added one. > Why mIsBsp is removed but mRebased is not? mRebased is critical semaphore for each cpu to finish its 1st SMI. Remove i= t will make the function not work. >=20 > > - // Allocate buffer for all of the tiles. > > + // Check whether the Required TileSize is enough. > > // > > - // Intel(R) 64 and IA-32 Architectures Software Developer's Manual > > - // Volume 3C, Section 34.11 SMBASE Relocation > > - // For Pentium and Intel486 processors, the SMBASE values must be > > - // aligned on a 32-KByte boundary or the processor will enter shut= down > > - // state during the execution of a RSM instruction. > > + if (TileSize > SIZE_8KB) { > > + DEBUG ((DEBUG_ERROR, "The Range of Smbase in SMRAM is not > enough -- Required TileSize =3D 0x%08x, Actual TileSize =3D 0x%08x\n", Ti= leSize, > SIZE_8KB)); > > + CpuDeadLoop (); > > + return RETURN_BUFFER_TOO_SMALL; > > + } >=20 > Where does the 8K come from? >=20 > This change is not mentioned in the commit message and most likely > should be a separate patch. >=20 This is about the tile size assumption:=20 One processor SMM Base tile size of buffer required to hold in SMRAM: 1. CPU SMRAM Save State Map starts at SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET(= 0xfc00), 2. extra CPU specific context start starts at SMBASE + SMM_PSD_OFFSET (PROC= ESSOR SMM DESCRIPTO, 0xfb00), 3. SMI entry point starts at SMBASE + SMM_HANDLER_OFFSET (0x8000). This size is rounded up to nearest power of 2. The pre-assigned smbase in hob is based on the biggest possibility of tile= size. We think it's impossible that tile size bigger than 8k, that's the r= eason we add the check here. I agree to make this as separate patch. > take care, > Gerd >=20 >=20 >=20 >=20 >=20