From: "Wu, Jiaxin" <jiaxin.wu@intel.com>
To: "Ni, Ray" <ray.ni@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Dong, Eric" <eric.dong@intel.com>,
"Zeng, Star" <star.zeng@intel.com>,
Laszlo Ersek <lersek@redhat.com>,
Gerd Hoffmann <kraxel@redhat.com>,
"Kumar, Rahul R" <rahul.r.kumar@intel.com>
Subject: Re: [PATCH v8 3/6] UefiCpuPkg/SmmBaseHob.h: Add SMM Base HOB Data
Date: Thu, 16 Feb 2023 05:11:08 +0000 [thread overview]
Message-ID: <MN0PR11MB61586914B2A67723DC2B0A8CFEA09@MN0PR11MB6158.namprd11.prod.outlook.com> (raw)
In-Reply-To: <MN6PR11MB82449FC52FAE6135BCA5E7068CA09@MN6PR11MB8244.namprd11.prod.outlook.com>
Thanks Ray, I will update all you mentioned.
> -----Original Message-----
> From: Ni, Ray <ray.ni@intel.com>
> Sent: Thursday, February 16, 2023 12:59 PM
> To: Wu, Jiaxin <jiaxin.wu@intel.com>; devel@edk2.groups.io
> Cc: Dong, Eric <eric.dong@intel.com>; Zeng, Star <star.zeng@intel.com>;
> Laszlo Ersek <lersek@redhat.com>; Gerd Hoffmann <kraxel@redhat.com>;
> Kumar, Rahul R <rahul.r.kumar@intel.com>
> Subject: RE: [PATCH v8 3/6] UefiCpuPkg/SmmBaseHob.h: Add SMM Base HOB
> Data
>
>
>
> > -----Original Message-----
> > From: Wu, Jiaxin <jiaxin.wu@intel.com>
> > Sent: Thursday, February 16, 2023 10:47 AM
> > To: devel@edk2.groups.io
> > Cc: Dong, Eric <eric.dong@intel.com>; Ni, Ray <ray.ni@intel.com>; Zeng, Star
> > <star.zeng@intel.com>; Laszlo Ersek <lersek@redhat.com>; Gerd Hoffmann
> > <kraxel@redhat.com>; Kumar, Rahul R <rahul.r.kumar@intel.com>
> > Subject: [PATCH v8 3/6] UefiCpuPkg/SmmBaseHob.h: Add SMM Base HOB
> > Data
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337
> >
> > The default SMBASE for the x86 processor is 0x30000. When
> > SMI happens, CPU runs the SMI handler at SMBASE+0x8000.
> > Also, the SMM save state area is within SMBASE+0x10000.
> >
> > One of the SMM initialization from CPU perspective is to relocate
> > and program the new SMBASE (in TSEG range) for each CPU thread. When
> > the SMBASE relocation happens in a PEI module, the PEI module shall
> > produce the SMM_BASE_HOB in HOB database which tells the
> > PiSmmCpuDxeSmm driver (runs at a later phase) about the new SMBASE
> > for each CPU thread. PiSmmCpuDxeSmm driver installs the SMI handler
> > at the SMM_BASE_HOB.SmBase[Index]+0x8000 for CPU thread Index. When
> > the HOB doesn't exist, PiSmmCpuDxeSmm driver shall relocate and
> > program the new SMBASE itself.
> >
> > This patch adds the SMM Base HOB for any PEI module to do
> > the SmBase relocation ahead of PiSmmCpuDxeSmm driver and
> > store the relocated SmBase address in array for reach
> > Processors.
> >
> > Cc: Eric Dong <eric.dong@intel.com>
> > Cc: Ray Ni <ray.ni@intel.com>
> > Cc: Zeng Star <star.zeng@intel.com>
> > Cc: Laszlo Ersek <lersek@redhat.com>
> > Cc: Gerd Hoffmann <kraxel@redhat.com>
> > Cc: Rahul Kumar <rahul1.kumar@intel.com>
> > Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
> > ---
> > UefiCpuPkg/Include/Guid/SmmBaseHob.h | 75
> > ++++++++++++++++++++++++++++++++++++
> > UefiCpuPkg/UefiCpuPkg.dec | 5 ++-
> > 2 files changed, 79 insertions(+), 1 deletion(-)
> > create mode 100644 UefiCpuPkg/Include/Guid/SmmBaseHob.h
> >
> > diff --git a/UefiCpuPkg/Include/Guid/SmmBaseHob.h
> > b/UefiCpuPkg/Include/Guid/SmmBaseHob.h
> > new file mode 100644
> > index 0000000000..9434276991
> > --- /dev/null
> > +++ b/UefiCpuPkg/Include/Guid/SmmBaseHob.h
> > @@ -0,0 +1,75 @@
> > +/** @file
> > + The Smm Base HOB is used to store the information of:
> > + * The relocated SmBase address in array for each Processors.
>
> 1. Processors -> processor.
>
> > + CPU runs the SMI handler at Smbase+0x8000. Also, the SMM save state
> area is
>
> 2. better align the term to use processor.
> MP protocol also uses the term "processor"
>
> > +
> > + Note:
> > + 1. Smbase relocation process needs to program the vender specific
> > hardware
> > + interface to set Smbase, it should be in the thread scope. It's doable to
>
> 3. "it should be in the thread scope" -> "it might be in the thread scope".
> The HOB itself doesn't have "thread scope" requirement.
> With the "thread scope" possibility, following statement looks good to me.
> Just change "should be" to "might be".
>
> > +#pragma pack(1)
> > +typedef struct {
> > + ///
> > + /// CpuIndex tells which CPU range this specific HOB instance described.
> > + /// If CpuIndex is set to 0, it indicats the HOB describes the CPU from 0 to
> > + /// NumberOfCpus - 1. The HOB list may contains multiple this HOB
> > instances.
> > + /// Each HOB instances describe the information for CPU from CpuIndex to
> > + /// CpuIndex + NumberOfCpus - 1. The instance order in the HOB list is
> > random
> > + /// so consumer can not assume the CpuIndex of first instance is 0.
> > + ///
> > + UINT32 CpuIndex;
>
> 4. "ProcessorIndex". Please also update the comments to use "processor".
next prev parent reply other threads:[~2023-02-16 5:11 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-16 2:46 [PATCH v8 0/6] Simplify SMM Relocation Process Wu, Jiaxin
2023-02-16 2:46 ` [PATCH v8 1/6] UefiCpuPkg/PiSmmCpuDxeSmm: Fix invalid InitializeMpSyncData call Wu, Jiaxin
2023-02-16 2:46 ` [PATCH v8 2/6] UefiCpuPkg/PiSmmCpuDxeSmm: Replace mIsBsp by mBspApicId check Wu, Jiaxin
2023-02-16 2:46 ` [PATCH v8 3/6] UefiCpuPkg/SmmBaseHob.h: Add SMM Base HOB Data Wu, Jiaxin
2023-02-16 4:59 ` Ni, Ray
2023-02-16 5:11 ` Wu, Jiaxin [this message]
2023-02-16 2:46 ` [PATCH v8 4/6] UefiCpuPkg/PiSmmCpuDxeSmm: Consume SMM Base Hob for SmBase info Wu, Jiaxin
2023-02-16 5:01 ` Ni, Ray
2023-02-16 2:46 ` [PATCH v8 5/6] UefiCpuPkg/SmmCpuFeaturesLib: Skip SMBASE configuration Wu, Jiaxin
2023-02-16 2:46 ` [PATCH v8 6/6] OvmfPkg/SmmCpuFeaturesLib: Check SmBase relocation supported or not Wu, Jiaxin
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