* [PATCH v2 0/2] AMD/AmdMinBoardPkg: ReportFvLib library and
@ 2023-05-22 9:28 Abdul Lateef Attar
2023-05-22 9:28 ` [PATCH v2 1/2] AMD/AmdMinBoardPkg: Implements PCI hotplug init protocol Abdul Lateef Attar
2023-05-22 9:28 ` [PATCH v2 2/2] AMD/AmdMinBoardkPkg: Implements PeiReportFvLib Library Abdul Lateef Attar
0 siblings, 2 replies; 7+ messages in thread
From: Abdul Lateef Attar @ 2023-05-22 9:28 UTC (permalink / raw)
To: devel; +Cc: Abdul Lateef Attar, Abner Chang
Implements ReportFvLibLirary.
Implements PciHotPlugInit protocol.
Cc: Abner Chang <abner.chang@amd.com>
Abdul Lateef Attar (2):
AMD/AmdMinBoardPkg: Implements PCI hotplug init protocol
AMD/AmdMinBoardkPkg: Implements PeiReportFvLib Library
.../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec | 24 ++
.../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc | 16 +-
.../Library/PeiReportFvLib/PeiReportFvLib.inf | 57 +++
.../PciHotPlug/PciHotPlugInit.inf | 39 +++
.../Library/PeiReportFvLib/PeiReportFvLib.c | 239 +++++++++++++
.../PciHotPlug/PciHotPlugInit.c | 331 ++++++++++++++++++
6 files changed, 705 insertions(+), 1 deletion(-)
create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
create mode 100755 Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.c
create mode 100755 Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
--
2.25.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 1/2] AMD/AmdMinBoardPkg: Implements PCI hotplug init protocol
2023-05-22 9:28 [PATCH v2 0/2] AMD/AmdMinBoardPkg: ReportFvLib library and Abdul Lateef Attar
@ 2023-05-22 9:28 ` Abdul Lateef Attar
2023-05-26 1:36 ` Chang, Abner
2023-05-29 14:40 ` Chang, Abner
2023-05-22 9:28 ` [PATCH v2 2/2] AMD/AmdMinBoardkPkg: Implements PeiReportFvLib Library Abdul Lateef Attar
1 sibling, 2 replies; 7+ messages in thread
From: Abdul Lateef Attar @ 2023-05-22 9:28 UTC (permalink / raw)
To: devel; +Cc: Abdul Lateef Attar, Abner Chang
From: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Implements PCI hotplug init protocol.
Adds resources padding based on PCD values.
Cc: Abner Chang <abner.chang@amd.com>
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
---
.../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec | 16 +
.../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc | 14 +-
.../PciHotPlug/PciHotPlugInit.inf | 39 +++
.../PciHotPlug/PciHotPlugInit.c | 331 ++++++++++++++++++
4 files changed, 399 insertions(+), 1 deletion(-)
create mode 100755 Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
create mode 100755 Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
index e37b02c4cf5a..65ba08545021 100644
--- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
+++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
@@ -17,3 +17,19 @@ [Defines]
PACKAGE_GUID = 44F9D761-9ECB-43DD-A5AC-177E5048701B
PACKAGE_VERSION = 0.1
+[Guids]
+ gAmdMinBoardPkgTokenSpaceGuid = {0xd4d23d79, 0x73bf, 0x460a, {0xa1, 0xc7, 0x85, 0xa3, 0xca, 0x71, 0xb9, 0x4c}}
+
+[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
+ #
+ # PCI HotPlug Resource Padding
+ #
+ # PCI bus padding, number of bus to reserve, default 2 bus
+ gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadBus|2|UINT8|0x10000003
+ # IO Resource padding in bytes, default 4KB
+ gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadIo|0x00001000|UINT32|0x10000000
+ # Non-PreFetch Memory padding in bytes, default 1MB
+ gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadMem|0x00100000|UINT32|0x10000002
+ # PreFetch Memory padding in bytes, default 2MB
+ gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadPMem|0x00200000|UINT32|0x10000001
+
diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
index 273cd74f7842..1a8407250c56 100644
--- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
+++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
@@ -9,7 +9,7 @@
[Defines]
DSC_SPECIFICATION = 1.30
- PLATFORM_GUID = 88F8A9AE-2FA0-4D58-A6F9-05F635C05F4E
+ PLATFORM_GUID = 939B559B-269B-4B8F-9637-44DF6575C1E2
PLATFORM_NAME = AmdMinBoardPkg
PLATFORM_VERSION = 0.1
OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
@@ -25,6 +25,16 @@ [Packages]
[LibraryClasses]
SpcrDeviceLib|AmdMinBoardPkg/Library/SpcrDeviceLib/SpcrDeviceLib.inf
+[LibraryClasses.common]
+ BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ RegisterFilterLib|MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.inf
+ UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+ UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
+
[LibraryClasses.common.PEIM]
SetCacheMtrrLib|AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
@@ -34,3 +44,5 @@ [Components]
[Components.IA32]
AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
+[Components.X64]
+ AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
diff --git a/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
new file mode 100755
index 000000000000..44564df38718
--- /dev/null
+++ b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
@@ -0,0 +1,39 @@
+## @file
+# This driver implements EFI_PCI_HOT_PLUG_INIT_PROTOCOL.
+# Adds resource padding information, for PCIe hotplug purposes.
+#
+# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved
+# SPDX-License-Identifier: BSD-2-Clause-Patent ##
+
+[Defines]
+ INF_VERSION = 1.29
+ BASE_NAME = PciHotPlugInit
+ FILE_GUID = 85F78A6D-6438-4BCC-B796-759A48D00C72
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 0.1
+ ENTRY_POINT = PciHotPlugInitialize
+
+[Sources]
+ PciHotPlugInit.c
+
+[Packages]
+ AmdMinBoardPkg/AmdMinBoardPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ MemoryAllocationLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+
+[Protocols]
+ gEfiPciHotPlugInitProtocolGuid
+
+[Pcd]
+ gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadBus
+ gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadIo
+ gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadMem
+ gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadPMem
+
+[Depex]
+ TRUE
diff --git a/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
new file mode 100755
index 000000000000..a26ca16741b8
--- /dev/null
+++ b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
@@ -0,0 +1,331 @@
+/** @file
+ This file declares EFI PCI Hot Plug Init Protocol.
+
+ This protocol provides the necessary functionality to initialize the Hot Plug
+ Controllers (HPCs) and the buses that they control. This protocol also provides
+ information regarding resource padding.
+
+ @par Note:
+ This source has the reference of OVMF PciHotPluginit.c and Intel platform PciHotPlug.c.
+
+ This protocol is required only on platforms that support one or more PCI Hot
+ Plug* slots or CardBus sockets.
+
+ The EFI_PCI_HOT_PLUG_INIT_PROTOCOL provides a mechanism for the PCI bus enumerator
+ to properly initialize the HPCs and CardBus sockets that require initialization.
+ The HPC initialization takes place before the PCI enumeration process is complete.
+ There cannot be more than one instance of this protocol in a system. This protocol
+ is installed on its own separate handle.
+
+ Because the system may include multiple HPCs, one instance of this protocol
+ should represent all of them. The protocol functions use the device path of
+ the HPC to identify the HPC. When the PCI bus enumerator finds a root HPC, it
+ will call EFI_PCI_HOT_PLUG_INIT_PROTOCOL.InitializeRootHpc(). If InitializeRootHpc()
+ is unable to initialize a root HPC, the PCI enumerator will ignore that root HPC
+ and continue the enumeration process. If the HPC is not initialized, the devices
+ that it controls may not be initialized, and no resource padding will be provided.
+
+ From the standpoint of the PCI bus enumerator, HPCs are divided into the following
+ two classes:
+
+ - Root HPC:
+ These HPCs must be initialized by calling InitializeRootHpc() during the
+ enumeration process. These HPCs will also require resource padding. The
+ platform code must have a priori knowledge of these devices and must know
+ how to initialize them. There may not be any way to access their PCI
+ configuration space before the PCI enumerator programs all the upstream
+ bridges and thus enables the path to these devices. The PCI bus enumerator
+ is responsible for determining the PCI bus address of the HPC before it
+ calls InitializeRootHpc().
+ - Nonroot HPC:
+ These HPCs will not need explicit initialization during enumeration process.
+ These HPCs will require resource padding. The platform code does not have
+ to have a priori knowledge of these devices.
+
+ Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+ Copyright (C) 2016, Red Hat, Inc.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ This Protocol is defined in UEFI Platform Initialization Specification 1.2
+ Volume 5: Standards
+
+**/
+
+#include <Uefi/UefiBaseType.h>
+#include <Uefi/UefiSpec.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Protocol/PciHotPlugInit.h>
+
+//
+// The protocol interface this driver produces.
+//
+STATIC EFI_PCI_HOT_PLUG_INIT_PROTOCOL mPciHotPlugInit;
+
+/**
+ Returns a list of root Hot Plug Controllers (HPCs) that require initialization
+ during the boot process.
+
+ This procedure returns a list of root HPCs. The PCI bus driver must initialize
+ these controllers during the boot process. The PCI bus driver may or may not be
+ able to detect these HPCs. If the platform includes a PCI-to-CardBus bridge, it
+ can be included in this list if it requires initialization. The HpcList must be
+ self consistent. An HPC cannot control any of its parent buses. Only one HPC can
+ control a PCI bus. Because this list includes only root HPCs, no HPC in the list
+ can be a child of another HPC. This policy must be enforced by the
+ EFI_PCI_HOT_PLUG_INIT_PROTOCOL. The PCI bus driver may not check for such
+ invalid conditions. The callee allocates the buffer HpcList
+
+ @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL instance.
+ @param[out] HpcCount The number of root HPCs that were returned.
+ @param[out] HpcList The list of root HPCs. HpcCount defines the number of
+ elements in this list.
+
+ @retval EFI_SUCCESS HpcList was returned.
+ @retval EFI_INVALID_PARAMETER HpcCount is NULL or HpcList is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+GetRootHpcList (
+ IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
+ OUT UINTN *HpcCount,
+ OUT EFI_HPC_LOCATION **HpcList
+ )
+{
+ if ((HpcCount == NULL) || (HpcList == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // Platform BIOS not doing any extra/special HPC initialization
+ // Hence returning the HpcCount as zero and HpcList as NULL
+ //
+ *HpcCount = 0;
+ *HpcList = NULL;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Initializes one root Hot Plug Controller (HPC). This process may causes
+ initialization of its subordinate buses.
+
+ This function initializes the specified HPC. At the end of initialization,
+ the hot-plug slots or sockets (controlled by this HPC) are powered and are
+ connected to the bus. All the necessary registers in the HPC are set up. For
+ a Standard (PCI) Hot Plug Controller (SHPC), the registers that must be set
+ up are defined in the PCI Standard Hot Plug Controller and Subsystem
+ Specification.
+
+ @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL instance.
+ @param[in] HpcDevicePath The device path to the HPC that is being initialized.
+ @param[in] HpcPciAddress The address of the HPC function on the PCI bus.
+ @param[in] Event The event that should be signaled when the HPC
+ initialization is complete. Set to NULL if the
+ caller wants to wait until the entire initialization
+ process is complete.
+ @param[out] HpcState The state of the HPC hardware. The state is
+ EFI_HPC_STATE_INITIALIZED or EFI_HPC_STATE_ENABLED.
+
+ @retval EFI_UNSUPPORTED This instance of EFI_PCI_HOT_PLUG_INIT_PROTOCOL
+ does not support the specified HPC.
+ @retval EFI_INVALID_PARAMETER HpcState is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+InitializeRootHpc (
+ IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
+ IN UINT64 HpcPciAddress,
+ IN EFI_EVENT Event, OPTIONAL
+ OUT EFI_HPC_STATE *HpcState
+ )
+{
+ if (HpcState == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // HPC is initialized by respective platform PI modules.
+ // Hence no extra initialization required.
+ //
+ return EFI_UNSUPPORTED;
+}
+
+/**
+ Returns the resource padding that is required by the PCI bus that is controlled
+ by the specified Hot Plug Controller (HPC).
+
+ This function returns the resource padding that is required by the PCI bus that
+ is controlled by the specified HPC. This member function is called for all the
+ root HPCs and nonroot HPCs that are detected by the PCI bus enumerator. This
+ function will be called before PCI resource allocation is completed. This function
+ must be called after all the root HPCs, with the possible exception of a
+ PCI-to-CardBus bridge, have completed initialization.
+
+ @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL instance.
+ @param[in] HpcDevicePath The device path to the HPC.
+ @param[in] HpcPciAddress The address of the HPC function on the PCI bus.
+ @param[in] HpcState The state of the HPC hardware.
+ @param[out] Padding The amount of resource padding that is required by the
+ PCI bus under the control of the specified HPC.
+ @param[out] Attributes Describes how padding is accounted for. The padding
+ is returned in the form of ACPI 2.0 resource descriptors.
+
+ @retval EFI_SUCCESS The resource padding was successfully returned.
+ @retval EFI_INVALID_PARAMETER HpcState or Padding or Attributes is NULL.
+ @retval EFI_OUT_OF_RESOURCES ACPI 2.0 resource descriptors for Padding
+ cannot be allocated due to insufficient resources.
+
+**/
+EFI_STATUS
+EFIAPI
+GetResourcePadding (
+ IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
+ IN UINT64 HpcPciAddress,
+ OUT EFI_HPC_STATE *HpcState,
+ OUT VOID **Padding,
+ OUT EFI_HPC_PADDING_ATTRIBUTES *Attributes
+ )
+{
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *PaddingResource;
+
+ if ((HpcState == NULL) || (Padding == NULL) || (Attributes == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // Need total 5 resources
+ // 1 - IO resource
+ // 2 - Mem resource
+ // 3 - PMem resource
+ // 4 - Bus resource
+ // 5 - end tag resource
+ PaddingResource = AllocateZeroPool (4 * sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR));
+ if (PaddingResource == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ *Padding = (VOID *)PaddingResource;
+
+ //
+ // Padding for bus
+ //
+ *Attributes = EfiPaddingPciBus;
+
+ PaddingResource->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
+ PaddingResource->Len = (UINT16)(
+ sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
+ OFFSET_OF (
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
+ ResType
+ )
+ );
+ PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_BUS;
+ PaddingResource->GenFlag = 0x0;
+ PaddingResource->SpecificFlag = 0;
+ PaddingResource->AddrRangeMin = 0;
+ PaddingResource->AddrRangeMax = 0;
+ PaddingResource->AddrLen = PcdGet8 (PcdPciHotPlugResourcePadBus);
+
+ //
+ // Padding for non-prefetchable memory
+ //
+ PaddingResource++;
+ PaddingResource->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
+ PaddingResource->Len = (UINT16)(
+ sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
+ OFFSET_OF (
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
+ ResType
+ )
+ );
+ PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ PaddingResource->GenFlag = 0x0;
+ PaddingResource->AddrSpaceGranularity = 32;
+ PaddingResource->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE;
+ PaddingResource->AddrRangeMin = 0;
+ PaddingResource->AddrLen = (UINT64)PcdGet32 (PcdPciHotPlugResourcePadMem);
+ PaddingResource->AddrRangeMax = PaddingResource->AddrLen - 1;
+
+ //
+ // Padding for prefetchable memory
+ //
+ PaddingResource++;
+ PaddingResource->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
+ PaddingResource->Len = (UINT16)(
+ sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
+ OFFSET_OF (
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
+ ResType
+ )
+ );
+ PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
+ PaddingResource->GenFlag = 0x0;
+ PaddingResource->AddrSpaceGranularity = 32;
+ PaddingResource->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
+ PaddingResource->AddrLen = (UINT64)PcdGet32 (PcdPciHotPlugResourcePadPMem);
+ PaddingResource->AddrRangeMax = PaddingResource->AddrLen - 1;
+
+ //
+ // Padding for I/O
+ //
+ PaddingResource++;
+ PaddingResource->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
+ PaddingResource->Len = (UINT16)(
+ sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
+ OFFSET_OF (
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
+ ResType
+ )
+ );
+ PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
+ PaddingResource->GenFlag = 0x0;
+ PaddingResource->SpecificFlag = 0;
+ PaddingResource->AddrRangeMin = 0;
+ PaddingResource->AddrLen = (UINT64)PcdGet32 (PcdPciHotPlugResourcePadIo);
+ PaddingResource->AddrRangeMax = PaddingResource->AddrLen - 1;
+
+ //
+ // Terminate the entries.
+ //
+ PaddingResource++;
+ ((EFI_ACPI_END_TAG_DESCRIPTOR *)PaddingResource)->Desc = ACPI_END_TAG_DESCRIPTOR;
+ ((EFI_ACPI_END_TAG_DESCRIPTOR *)PaddingResource)->Checksum = 0x0;
+
+ *HpcState = EFI_HPC_STATE_INITIALIZED | EFI_HPC_STATE_ENABLED;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Entry point for this driver.
+
+ @param[in] ImageHandle Image handle of this driver.
+ @param[in] SystemTable Pointer to SystemTable.
+
+ @retval EFI_SUCCESS Driver has loaded successfully.
+ @return Error codes from lower level functions.
+
+**/
+EFI_STATUS
+EFIAPI
+PciHotPlugInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ mPciHotPlugInit.GetRootHpcList = GetRootHpcList;
+ mPciHotPlugInit.InitializeRootHpc = InitializeRootHpc;
+ mPciHotPlugInit.GetResourcePadding = GetResourcePadding;
+ return gBS->InstallMultipleProtocolInterfaces (
+ &ImageHandle,
+ &gEfiPciHotPlugInitProtocolGuid,
+ &mPciHotPlugInit,
+ NULL
+ );
+}
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v2 2/2] AMD/AmdMinBoardkPkg: Implements PeiReportFvLib Library
2023-05-22 9:28 [PATCH v2 0/2] AMD/AmdMinBoardPkg: ReportFvLib library and Abdul Lateef Attar
2023-05-22 9:28 ` [PATCH v2 1/2] AMD/AmdMinBoardPkg: Implements PCI hotplug init protocol Abdul Lateef Attar
@ 2023-05-22 9:28 ` Abdul Lateef Attar
2023-05-29 14:40 ` Chang, Abner
1 sibling, 1 reply; 7+ messages in thread
From: Abdul Lateef Attar @ 2023-05-22 9:28 UTC (permalink / raw)
To: devel; +Cc: Abdul Lateef Attar, Abner Chang
Customize PeiReportFvLib library for AMD platforms by
adding below changes.
Installs Advanced Security FV.
Adds facility to install FV above 4GB address space.
Cc: Abner Chang <abner.chang@amd.com>
Signed-off-by: Abdul Lateef Attar <abdattar@amd.com>
---
.../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec | 8 +
.../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc | 2 +
.../Library/PeiReportFvLib/PeiReportFvLib.inf | 57 +++++
.../Library/PeiReportFvLib/PeiReportFvLib.c | 239 ++++++++++++++++++
4 files changed, 306 insertions(+)
create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
create mode 100644 Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.c
diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
index 65ba08545021..03d1d77c34eb 100644
--- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
+++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
@@ -33,3 +33,11 @@ [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
# PreFetch Memory padding in bytes, default 2MB
gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadPMem|0x00200000|UINT32|0x10000001
+ # PCDs to support loading of FV above 4GB address space
+ gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedBase |0x0000000000000000|UINT64|0x10000004
+ gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvOsBootBase |0x0000000000000000|UINT64|0x10000005
+ gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvUefiBootBase |0x0000000000000000|UINT64|0x10000006
+ gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecurityBase |0x0000000000000000|UINT64|0x10000007
+ gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecuritySize |0x00000000|UINT32|0x10000008
+ gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecurityOffset |0x00000000|UINT32|0x10000009
+
diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
index 1a8407250c56..be33089a45ef 100644
--- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
+++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
@@ -24,6 +24,7 @@ [Packages]
[LibraryClasses]
SpcrDeviceLib|AmdMinBoardPkg/Library/SpcrDeviceLib/SpcrDeviceLib.inf
+ ReportFvLib|AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
[LibraryClasses.common]
BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
@@ -43,6 +44,7 @@ [Components]
[Components.IA32]
AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
+ AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
[Components.X64]
AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
diff --git a/Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf b/Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
new file mode 100644
index 000000000000..23ee503c42be
--- /dev/null
+++ b/Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
@@ -0,0 +1,57 @@
+### @file
+# Component information file for the Report Firmware Volume (FV) library.
+#
+# Copyright (c) 2018 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+###
+
+[Defines]
+ INF_VERSION = 1.29
+ BASE_NAME = PeiReportFvLib
+ FILE_GUID = 3C207C28-DC43-4A3A-B572-6794C77AB519
+ VERSION_STRING = 1.0
+ MODULE_TYPE = PEIM
+ LIBRARY_CLASS = ReportFvLib
+
+[LibraryClasses]
+ BaseMemoryLib
+ DebugLib
+ HobLib
+ PeiServicesLib
+
+[Packages]
+ AmdMinBoardPkg/AmdMinBoardPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ MinPlatformPkg/MinPlatformPkg.dec
+
+[Sources]
+ PeiReportFvLib.c
+
+[Pcd]
+ gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedBase ## CONSUMES
+ gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecurityBase ## CONSUMES
+ gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecuritySize ## CONSUMES
+ gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvOsBootBase ## CONSUMES
+ gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvUefiBootBase ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdBootStage ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryBase ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize ## CONSUMES
+ gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode ## CONSUMES
diff --git a/Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.c b/Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.c
new file mode 100644
index 000000000000..f0b2abef611b
--- /dev/null
+++ b/Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.c
@@ -0,0 +1,239 @@
+/** @file
+ Source code file for Report Firmware Volume (FV) library for AMD platforms.
+
+ @par Note:
+ This source has the reference of MinPlatformPkgs's PeriReportFvLib.c module.
+
+ Copyright (c) 2018 - 2020, Intel Corporation. All rights reserved.<BR>
+ Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Base.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/PeiServicesLib.h>
+#include <Library/ReportFvLib.h>
+#include <Guid/FirmwareFileSystem2.h>
+#include <Ppi/FirmwareVolumeInfo.h>
+
+VOID
+ReportPreMemFv (
+ VOID
+ )
+{
+ ///
+ /// Note : FSP FVs except FSP-T FV are installed in IntelFsp2WrapperPkg in Dispatch mode.
+ ///
+ if (PcdGetBool (PcdFspWrapperBootMode)) {
+ DEBUG ((DEBUG_INFO, "Install FlashFvFspT - 0x%x, 0x%x\n", PcdGet32 (PcdFlashFvFspTBase), PcdGet32 (PcdFlashFvFspTSize)));
+ PeiServicesInstallFvInfo2Ppi (
+ &(((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32 (PcdFlashFvFspTBase))->FileSystemGuid),
+ (VOID *)(UINTN)PcdGet32 (PcdFlashFvFspTBase),
+ PcdGet32 (PcdFlashFvFspTSize),
+ NULL,
+ NULL,
+ 0
+ );
+ }
+
+ DEBUG ((DEBUG_INFO, "Install FlashFvSecurity - 0x%x, 0x%x\n", PcdGet32 (PcdFlashFvSecurityBase), PcdGet32 (PcdFlashFvSecuritySize)));
+ PeiServicesInstallFvInfo2Ppi (
+ &(((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32 (PcdFlashFvSecurityBase))->FileSystemGuid),
+ (VOID *)(UINTN)PcdGet32 (PcdFlashFvSecurityBase),
+ PcdGet32 (PcdFlashFvSecuritySize),
+ NULL,
+ NULL,
+ 0
+ );
+ if (PcdGet8 (PcdBootStage) >= 6) {
+ DEBUG ((
+ DEBUG_INFO,
+ "Install FlashFvAdvancedPreMemory - 0x%x, 0x%x\n",
+ PcdGet32 (PcdFlashFvAdvancedPreMemoryBase),
+ PcdGet32 (PcdFlashFvAdvancedPreMemorySize)
+ ));
+ PeiServicesInstallFvInfo2Ppi (
+ &(((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32 (PcdFlashFvAdvancedPreMemoryBase))->FileSystemGuid),
+ (VOID *)(UINTN)PcdGet32 (PcdFlashFvAdvancedPreMemoryBase),
+ PcdGet32 (PcdFlashFvAdvancedPreMemorySize),
+ NULL,
+ NULL,
+ 0
+ );
+ }
+}
+
+VOID
+ReportPostMemFv (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_BOOT_MODE BootMode;
+ EFI_HOB_FIRMWARE_VOLUME3 *Hob3;
+ EFI_HOB_FIRMWARE_VOLUME *Hob;
+
+ Status = PeiServicesGetBootMode (&BootMode);
+ ASSERT_EFI_ERROR (Status);
+
+ ///
+ /// Note : FSP FVs except FSP-T FV are installed in IntelFsp2WrapperPkg in Dispatch mode.
+ ///
+
+ ///
+ /// Build HOB for DXE
+ ///
+ if (BootMode == BOOT_IN_RECOVERY_MODE) {
+ ///
+ /// Prepare the recovery service
+ ///
+ } else {
+ DEBUG ((DEBUG_INFO, "Install FlashFvPostMemory - 0x%x, 0x%x\n", PcdGet32 (PcdFlashFvPostMemoryBase), PcdGet32 (PcdFlashFvPostMemorySize)));
+ PeiServicesInstallFvInfo2Ppi (
+ &(((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32 (PcdFlashFvPostMemoryBase))->FileSystemGuid),
+ (VOID *)(UINTN)PcdGet32 (PcdFlashFvPostMemoryBase),
+ PcdGet32 (PcdFlashFvPostMemorySize),
+ NULL,
+ NULL,
+ 0
+ );
+
+ if (PcdGet64 (PcdAmdFlashFvUefiBootBase) >= BASE_4GB) {
+ Hob = NULL;
+ Hob3 = NULL;
+ DEBUG ((DEBUG_INFO, "Found FvUefiBoot FV above 4GB, creating FV HOBs.\n"));
+ Status = PeiServicesCreateHob (EFI_HOB_TYPE_FV, sizeof (EFI_HOB_FIRMWARE_VOLUME), (VOID **)&Hob);
+ if (!EFI_ERROR (Status)) {
+ Hob->BaseAddress = PcdGet64 (PcdAmdFlashFvUefiBootBase);
+ Hob->Length = PcdGet32 (PcdFlashFvUefiBootSize);
+ }
+
+ Status = PeiServicesCreateHob (EFI_HOB_TYPE_FV3, sizeof (EFI_HOB_FIRMWARE_VOLUME3), (VOID **)&Hob3);
+ if (!EFI_ERROR (Status)) {
+ Hob3->BaseAddress = PcdGet64 (PcdAmdFlashFvUefiBootBase);
+ Hob3->Length = PcdGet32 (PcdFlashFvUefiBootSize);
+ Hob3->AuthenticationStatus = 0;
+ Hob3->ExtractedFv = FALSE;
+ }
+ } else {
+ DEBUG ((DEBUG_INFO, "Install FlashFvUefiBoot - 0x%lx, 0x%x\n", PcdGet64 (PcdAmdFlashFvUefiBootBase), PcdGet32 (PcdFlashFvUefiBootSize)));
+ PeiServicesInstallFvInfo2Ppi (
+ &(((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet64 (PcdAmdFlashFvUefiBootBase))->FileSystemGuid),
+ (VOID *)(UINTN)PcdGet64 (PcdAmdFlashFvUefiBootBase),
+ PcdGet32 (PcdFlashFvUefiBootSize),
+ NULL,
+ NULL,
+ 0
+ );
+ }
+
+ if (PcdGet64 (PcdAmdFlashFvOsBootBase) >= BASE_4GB) {
+ Hob = NULL;
+ Hob3 = NULL;
+ DEBUG ((DEBUG_INFO, "Found FvOsBoot FV above 4GB, creating FV HOBs.\n"));
+ Status = PeiServicesCreateHob (EFI_HOB_TYPE_FV, sizeof (EFI_HOB_FIRMWARE_VOLUME), (VOID **)&Hob);
+ if (!EFI_ERROR (Status)) {
+ Hob->BaseAddress = PcdGet64 (PcdAmdFlashFvOsBootBase);
+ Hob->Length = PcdGet32 (PcdFlashFvOsBootSize);
+ }
+
+ Status = PeiServicesCreateHob (EFI_HOB_TYPE_FV3, sizeof (EFI_HOB_FIRMWARE_VOLUME3), (VOID **)&Hob3);
+ if (!EFI_ERROR (Status)) {
+ Hob3->BaseAddress = PcdGet64 (PcdAmdFlashFvOsBootBase);
+ Hob3->Length = PcdGet32 (PcdFlashFvOsBootSize);
+ Hob3->AuthenticationStatus = 0;
+ Hob3->ExtractedFv = FALSE;
+ }
+ } else {
+ DEBUG ((DEBUG_INFO, "Install FlashFvOsBoot - 0x%lx, 0x%x\n", PcdGet64 (PcdAmdFlashFvOsBootBase), PcdGet32 (PcdFlashFvOsBootSize)));
+ PeiServicesInstallFvInfo2Ppi (
+ &(((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet64 (PcdAmdFlashFvOsBootBase))->FileSystemGuid),
+ (VOID *)(UINTN)PcdGet64 (PcdAmdFlashFvOsBootBase),
+ PcdGet32 (PcdFlashFvOsBootSize),
+ NULL,
+ NULL,
+ 0
+ );
+ }
+
+ if (PcdGet8 (PcdBootStage) >= 6) {
+ if (PcdGet64 (PcdAmdFlashFvAdvancedBase) >= BASE_4GB) {
+ Hob = NULL;
+ Hob3 = NULL;
+ DEBUG ((DEBUG_INFO, "Found FvAdvanced FV above 4GB, creating FV HOBs.\n"));
+ Status = PeiServicesCreateHob (EFI_HOB_TYPE_FV, sizeof (EFI_HOB_FIRMWARE_VOLUME), (VOID **)&Hob);
+ if (!EFI_ERROR (Status)) {
+ Hob->BaseAddress = PcdGet64 (PcdAmdFlashFvAdvancedBase);
+ Hob->Length = PcdGet32 (PcdFlashFvAdvancedSize);
+ }
+
+ Status = PeiServicesCreateHob (EFI_HOB_TYPE_FV3, sizeof (EFI_HOB_FIRMWARE_VOLUME3), (VOID **)&Hob3);
+ if (!EFI_ERROR (Status)) {
+ Hob3->BaseAddress = PcdGet64 (PcdAmdFlashFvAdvancedBase);
+ Hob3->Length = PcdGet32 (PcdFlashFvAdvancedSize);
+ Hob3->AuthenticationStatus = 0;
+ Hob3->ExtractedFv = FALSE;
+ }
+ } else {
+ DEBUG ((DEBUG_INFO, "Install FlashFvAdvanced - 0x%lx, 0x%x\n", PcdGet64 (PcdAmdFlashFvAdvancedBase), PcdGet32 (PcdFlashFvAdvancedSize)));
+ PeiServicesInstallFvInfo2Ppi (
+ &(((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet64 (PcdAmdFlashFvAdvancedBase))->FileSystemGuid),
+ (VOID *)(UINTN)PcdGet64 (PcdAmdFlashFvAdvancedBase),
+ PcdGet32 (PcdFlashFvAdvancedSize),
+ NULL,
+ NULL,
+ 0
+ );
+ }
+ }
+ }
+
+ if (PcdGet64 (PcdAmdFlashFvAdvancedSecurityBase) >= BASE_4GB) {
+ Hob = NULL;
+ Hob3 = NULL;
+ DEBUG ((DEBUG_INFO, "Found FvAdvancedSecurity FV above 4GB, creating FV HOBs.\n"));
+ Status = PeiServicesCreateHob (EFI_HOB_TYPE_FV, sizeof (EFI_HOB_FIRMWARE_VOLUME), (VOID **)&Hob);
+ if (!EFI_ERROR (Status)) {
+ Hob->BaseAddress = PcdGet64 (PcdAmdFlashFvAdvancedSecurityBase);
+ Hob->Length = PcdGet32 (PcdAmdFlashFvAdvancedSecuritySize);
+ }
+
+ Status = PeiServicesCreateHob (EFI_HOB_TYPE_FV3, sizeof (EFI_HOB_FIRMWARE_VOLUME3), (VOID **)&Hob3);
+ if (!EFI_ERROR (Status)) {
+ Hob3->BaseAddress = PcdGet64 (PcdAmdFlashFvAdvancedSecurityBase);
+ Hob3->Length = PcdGet32 (PcdAmdFlashFvAdvancedSecuritySize);
+ Hob3->AuthenticationStatus = 0;
+ Hob3->ExtractedFv = FALSE;
+ }
+ } else {
+ DEBUG ((DEBUG_INFO, "Install FvAdvancedSecurity - 0x%lx, 0x%x\n", PcdGet64 (PcdAmdFlashFvAdvancedSecurityBase), PcdGet32 (PcdAmdFlashFvAdvancedSecuritySize)));
+ PeiServicesInstallFvInfo2Ppi (
+ &(((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet64 (PcdAmdFlashFvAdvancedSecurityBase))->FileSystemGuid),
+ (VOID *)(UINTN)PcdGet64 (PcdAmdFlashFvAdvancedSecurityBase),
+ PcdGet32 (PcdAmdFlashFvAdvancedSecuritySize),
+ NULL,
+ NULL,
+ 0
+ );
+ }
+
+ //
+ // Report resource HOB for flash FV
+ //
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_MEMORY_MAPPED_IO,
+ (EFI_RESOURCE_ATTRIBUTE_PRESENT |
+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
+ EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE),
+ (UINTN)PcdGet32 (PcdFlashAreaBaseAddress),
+ (UINTN)PcdGet32 (PcdFlashAreaSize)
+ );
+ BuildMemoryAllocationHob (
+ (UINTN)PcdGet32 (PcdFlashAreaBaseAddress),
+ (UINTN)PcdGet32 (PcdFlashAreaSize),
+ EfiMemoryMappedIO
+ );
+}
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2 1/2] AMD/AmdMinBoardPkg: Implements PCI hotplug init protocol
2023-05-22 9:28 ` [PATCH v2 1/2] AMD/AmdMinBoardPkg: Implements PCI hotplug init protocol Abdul Lateef Attar
@ 2023-05-26 1:36 ` Chang, Abner
2023-05-29 14:35 ` Attar, AbdulLateef (Abdul Lateef)
2023-05-29 14:40 ` Chang, Abner
1 sibling, 1 reply; 7+ messages in thread
From: Chang, Abner @ 2023-05-26 1:36 UTC (permalink / raw)
To: Attar, AbdulLateef (Abdul Lateef), devel@edk2.groups.io
Cc: Attar, AbdulLateef (Abdul Lateef)
[AMD Official Use Only - General]
Hi Abdul,
Is this a duplicate patch?
There was a patch you sent: [edk2-devel] [PATCH 1/1] AMD/AmdMinBoardPkg: Implements PCI hotplug init protocol, they both create PciHotPlug.c and PciHotPlug.inf.
Thanks
Abner
> -----Original Message-----
> From: Abdul Lateef Attar <abdattar@amd.com>
> Sent: Monday, May 22, 2023 5:29 PM
> To: devel@edk2.groups.io
> Cc: Attar, AbdulLateef (Abdul Lateef) <AbdulLateef.Attar@amd.com>; Chang,
> Abner <Abner.Chang@amd.com>
> Subject: [PATCH v2 1/2] AMD/AmdMinBoardPkg: Implements PCI hotplug init
> protocol
>
> From: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
>
> Implements PCI hotplug init protocol.
> Adds resources padding based on PCD values.
>
> Cc: Abner Chang <abner.chang@amd.com>
>
> Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
> ---
> .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec | 16 +
> .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc | 14 +-
> .../PciHotPlug/PciHotPlugInit.inf | 39 +++
> .../PciHotPlug/PciHotPlugInit.c | 331 ++++++++++++++++++
> 4 files changed, 399 insertions(+), 1 deletion(-)
> create mode 100755
> Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> create mode 100755
> Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
>
> diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> index e37b02c4cf5a..65ba08545021 100644
> --- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> +++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> @@ -17,3 +17,19 @@ [Defines]
> PACKAGE_GUID = 44F9D761-9ECB-43DD-A5AC-177E5048701B
> PACKAGE_VERSION = 0.1
>
> +[Guids]
> + gAmdMinBoardPkgTokenSpaceGuid = {0xd4d23d79, 0x73bf, 0x460a,
> {0xa1, 0xc7, 0x85, 0xa3, 0xca, 0x71, 0xb9, 0x4c}}
> +
> +[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
> + #
> + # PCI HotPlug Resource Padding
> + #
> + # PCI bus padding, number of bus to reserve, default 2 bus
> +
> gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadBus|2|UINT8
> |0x10000003
> + # IO Resource padding in bytes, default 4KB
> +
> gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadIo|0x000010
> 00|UINT32|0x10000000
> + # Non-PreFetch Memory padding in bytes, default 1MB
> +
> gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadMem|0x0010
> 0000|UINT32|0x10000002
> + # PreFetch Memory padding in bytes, default 2MB
> +
> gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadPMem|0x002
> 00000|UINT32|0x10000001
> +
> diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> index 273cd74f7842..1a8407250c56 100644
> --- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> +++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> @@ -9,7 +9,7 @@
>
> [Defines]
> DSC_SPECIFICATION = 1.30
> - PLATFORM_GUID = 88F8A9AE-2FA0-4D58-A6F9-05F635C05F4E
> + PLATFORM_GUID = 939B559B-269B-4B8F-9637-44DF6575C1E2
> PLATFORM_NAME = AmdMinBoardPkg
> PLATFORM_VERSION = 0.1
> OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
> @@ -25,6 +25,16 @@ [Packages]
> [LibraryClasses]
> SpcrDeviceLib|AmdMinBoardPkg/Library/SpcrDeviceLib/SpcrDeviceLib.inf
>
> +[LibraryClasses.common]
> + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
> +
> BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRe
> pStr.inf
> + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
> +
> MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemor
> yAllocationLib.inf
> + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
> +
> RegisterFilterLib|MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.inf
> +
> UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBoo
> tServicesTableLib.inf
> +
> UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryP
> oint.inf
> +
> [LibraryClasses.common.PEIM]
>
> SetCacheMtrrLib|AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLi
> b.inf
>
> @@ -34,3 +44,5 @@ [Components]
> [Components.IA32]
> AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
>
> +[Components.X64]
> + AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> diff --git a/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> new file mode 100755
> index 000000000000..44564df38718
> --- /dev/null
> +++ b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> @@ -0,0 +1,39 @@
> +## @file
> +# This driver implements EFI_PCI_HOT_PLUG_INIT_PROTOCOL.
> +# Adds resource padding information, for PCIe hotplug purposes.
> +#
> +# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved
> +# SPDX-License-Identifier: BSD-2-Clause-Patent ##
> +
> +[Defines]
> + INF_VERSION = 1.29
> + BASE_NAME = PciHotPlugInit
> + FILE_GUID = 85F78A6D-6438-4BCC-B796-759A48D00C72
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 0.1
> + ENTRY_POINT = PciHotPlugInitialize
> +
> +[Sources]
> + PciHotPlugInit.c
> +
> +[Packages]
> + AmdMinBoardPkg/AmdMinBoardPkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> +
> +[LibraryClasses]
> + MemoryAllocationLib
> + UefiBootServicesTableLib
> + UefiDriverEntryPoint
> +
> +[Protocols]
> + gEfiPciHotPlugInitProtocolGuid
> +
> +[Pcd]
> + gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadBus
> + gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadIo
> + gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadMem
> + gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadPMem
> +
> +[Depex]
> + TRUE
> diff --git a/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
> b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
> new file mode 100755
> index 000000000000..a26ca16741b8
> --- /dev/null
> +++ b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
> @@ -0,0 +1,331 @@
> +/** @file
> + This file declares EFI PCI Hot Plug Init Protocol.
> +
> + This protocol provides the necessary functionality to initialize the Hot Plug
> + Controllers (HPCs) and the buses that they control. This protocol also
> provides
> + information regarding resource padding.
> +
> + @par Note:
> + This source has the reference of OVMF PciHotPluginit.c and Intel platform
> PciHotPlug.c.
> +
> + This protocol is required only on platforms that support one or more PCI
> Hot
> + Plug* slots or CardBus sockets.
> +
> + The EFI_PCI_HOT_PLUG_INIT_PROTOCOL provides a mechanism for the PCI
> bus enumerator
> + to properly initialize the HPCs and CardBus sockets that require initialization.
> + The HPC initialization takes place before the PCI enumeration process is
> complete.
> + There cannot be more than one instance of this protocol in a system. This
> protocol
> + is installed on its own separate handle.
> +
> + Because the system may include multiple HPCs, one instance of this protocol
> + should represent all of them. The protocol functions use the device path of
> + the HPC to identify the HPC. When the PCI bus enumerator finds a root HPC,
> it
> + will call EFI_PCI_HOT_PLUG_INIT_PROTOCOL.InitializeRootHpc(). If
> InitializeRootHpc()
> + is unable to initialize a root HPC, the PCI enumerator will ignore that root
> HPC
> + and continue the enumeration process. If the HPC is not initialized, the
> devices
> + that it controls may not be initialized, and no resource padding will be
> provided.
> +
> + From the standpoint of the PCI bus enumerator, HPCs are divided into the
> following
> + two classes:
> +
> + - Root HPC:
> + These HPCs must be initialized by calling InitializeRootHpc() during the
> + enumeration process. These HPCs will also require resource padding. The
> + platform code must have a priori knowledge of these devices and must
> know
> + how to initialize them. There may not be any way to access their PCI
> + configuration space before the PCI enumerator programs all the
> upstream
> + bridges and thus enables the path to these devices. The PCI bus
> enumerator
> + is responsible for determining the PCI bus address of the HPC before it
> + calls InitializeRootHpc().
> + - Nonroot HPC:
> + These HPCs will not need explicit initialization during enumeration
> process.
> + These HPCs will require resource padding. The platform code does not
> have
> + to have a priori knowledge of these devices.
> +
> + Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
> + Copyright (C) 2016, Red Hat, Inc.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> + @par Revision Reference:
> + This Protocol is defined in UEFI Platform Initialization Specification 1.2
> + Volume 5: Standards
> +
> +**/
> +
> +#include <Uefi/UefiBaseType.h>
> +#include <Uefi/UefiSpec.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Protocol/PciHotPlugInit.h>
> +
> +//
> +// The protocol interface this driver produces.
> +//
> +STATIC EFI_PCI_HOT_PLUG_INIT_PROTOCOL mPciHotPlugInit;
> +
> +/**
> + Returns a list of root Hot Plug Controllers (HPCs) that require initialization
> + during the boot process.
> +
> + This procedure returns a list of root HPCs. The PCI bus driver must initialize
> + these controllers during the boot process. The PCI bus driver may or may
> not be
> + able to detect these HPCs. If the platform includes a PCI-to-CardBus bridge,
> it
> + can be included in this list if it requires initialization. The HpcList must be
> + self consistent. An HPC cannot control any of its parent buses. Only one HPC
> can
> + control a PCI bus. Because this list includes only root HPCs, no HPC in the list
> + can be a child of another HPC. This policy must be enforced by the
> + EFI_PCI_HOT_PLUG_INIT_PROTOCOL. The PCI bus driver may not check for
> such
> + invalid conditions. The callee allocates the buffer HpcList
> +
> + @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL
> instance.
> + @param[out] HpcCount The number of root HPCs that were returned.
> + @param[out] HpcList The list of root HPCs. HpcCount defines the number
> of
> + elements in this list.
> +
> + @retval EFI_SUCCESS HpcList was returned.
> + @retval EFI_INVALID_PARAMETER HpcCount is NULL or HpcList is NULL.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +GetRootHpcList (
> + IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
> + OUT UINTN *HpcCount,
> + OUT EFI_HPC_LOCATION **HpcList
> + )
> +{
> + if ((HpcCount == NULL) || (HpcList == NULL)) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + //
> + // Platform BIOS not doing any extra/special HPC initialization
> + // Hence returning the HpcCount as zero and HpcList as NULL
> + //
> + *HpcCount = 0;
> + *HpcList = NULL;
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Initializes one root Hot Plug Controller (HPC). This process may causes
> + initialization of its subordinate buses.
> +
> + This function initializes the specified HPC. At the end of initialization,
> + the hot-plug slots or sockets (controlled by this HPC) are powered and are
> + connected to the bus. All the necessary registers in the HPC are set up. For
> + a Standard (PCI) Hot Plug Controller (SHPC), the registers that must be set
> + up are defined in the PCI Standard Hot Plug Controller and Subsystem
> + Specification.
> +
> + @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL
> instance.
> + @param[in] HpcDevicePath The device path to the HPC that is being
> initialized.
> + @param[in] HpcPciAddress The address of the HPC function on the PCI
> bus.
> + @param[in] Event The event that should be signaled when the HPC
> + initialization is complete. Set to NULL if the
> + caller wants to wait until the entire initialization
> + process is complete.
> + @param[out] HpcState The state of the HPC hardware. The state is
> + EFI_HPC_STATE_INITIALIZED or EFI_HPC_STATE_ENABLED.
> +
> + @retval EFI_UNSUPPORTED This instance of
> EFI_PCI_HOT_PLUG_INIT_PROTOCOL
> + does not support the specified HPC.
> + @retval EFI_INVALID_PARAMETER HpcState is NULL.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +InitializeRootHpc (
> + IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
> + IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
> + IN UINT64 HpcPciAddress,
> + IN EFI_EVENT Event, OPTIONAL
> + OUT EFI_HPC_STATE *HpcState
> + )
> +{
> + if (HpcState == NULL) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + //
> + // HPC is initialized by respective platform PI modules.
> + // Hence no extra initialization required.
> + //
> + return EFI_UNSUPPORTED;
> +}
> +
> +/**
> + Returns the resource padding that is required by the PCI bus that is
> controlled
> + by the specified Hot Plug Controller (HPC).
> +
> + This function returns the resource padding that is required by the PCI bus
> that
> + is controlled by the specified HPC. This member function is called for all the
> + root HPCs and nonroot HPCs that are detected by the PCI bus enumerator.
> This
> + function will be called before PCI resource allocation is completed. This
> function
> + must be called after all the root HPCs, with the possible exception of a
> + PCI-to-CardBus bridge, have completed initialization.
> +
> + @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL
> instance.
> + @param[in] HpcDevicePath The device path to the HPC.
> + @param[in] HpcPciAddress The address of the HPC function on the PCI
> bus.
> + @param[in] HpcState The state of the HPC hardware.
> + @param[out] Padding The amount of resource padding that is required
> by the
> + PCI bus under the control of the specified HPC.
> + @param[out] Attributes Describes how padding is accounted for. The
> padding
> + is returned in the form of ACPI 2.0 resource descriptors.
> +
> + @retval EFI_SUCCESS The resource padding was successfully
> returned.
> + @retval EFI_INVALID_PARAMETER HpcState or Padding or Attributes is
> NULL.
> + @retval EFI_OUT_OF_RESOURCES ACPI 2.0 resource descriptors for
> Padding
> + cannot be allocated due to insufficient resources.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +GetResourcePadding (
> + IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
> + IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
> + IN UINT64 HpcPciAddress,
> + OUT EFI_HPC_STATE *HpcState,
> + OUT VOID **Padding,
> + OUT EFI_HPC_PADDING_ATTRIBUTES *Attributes
> + )
> +{
> + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *PaddingResource;
> +
> + if ((HpcState == NULL) || (Padding == NULL) || (Attributes == NULL)) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + //
> + // Need total 5 resources
> + // 1 - IO resource
> + // 2 - Mem resource
> + // 3 - PMem resource
> + // 4 - Bus resource
> + // 5 - end tag resource
> + PaddingResource = AllocateZeroPool (4 * sizeof
> (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof
> (EFI_ACPI_END_TAG_DESCRIPTOR));
> + if (PaddingResource == NULL) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + *Padding = (VOID *)PaddingResource;
> +
> + //
> + // Padding for bus
> + //
> + *Attributes = EfiPaddingPciBus;
> +
> + PaddingResource->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
> + PaddingResource->Len = (UINT16)(
> + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
> + OFFSET_OF (
> + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
> + ResType
> + )
> + );
> + PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_BUS;
> + PaddingResource->GenFlag = 0x0;
> + PaddingResource->SpecificFlag = 0;
> + PaddingResource->AddrRangeMin = 0;
> + PaddingResource->AddrRangeMax = 0;
> + PaddingResource->AddrLen = PcdGet8 (PcdPciHotPlugResourcePadBus);
> +
> + //
> + // Padding for non-prefetchable memory
> + //
> + PaddingResource++;
> + PaddingResource->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
> + PaddingResource->Len = (UINT16)(
> + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
> + OFFSET_OF (
> + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
> + ResType
> + )
> + );
> + PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
> + PaddingResource->GenFlag = 0x0;
> + PaddingResource->AddrSpaceGranularity = 32;
> + PaddingResource->SpecificFlag =
> EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE;
> + PaddingResource->AddrRangeMin = 0;
> + PaddingResource->AddrLen = (UINT64)PcdGet32
> (PcdPciHotPlugResourcePadMem);
> + PaddingResource->AddrRangeMax = PaddingResource->AddrLen - 1;
> +
> + //
> + // Padding for prefetchable memory
> + //
> + PaddingResource++;
> + PaddingResource->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
> + PaddingResource->Len = (UINT16)(
> + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
> + OFFSET_OF (
> + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
> + ResType
> + )
> + );
> + PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
> + PaddingResource->GenFlag = 0x0;
> + PaddingResource->AddrSpaceGranularity = 32;
> + PaddingResource->SpecificFlag =
> EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
> + PaddingResource->AddrLen = (UINT64)PcdGet32
> (PcdPciHotPlugResourcePadPMem);
> + PaddingResource->AddrRangeMax = PaddingResource->AddrLen - 1;
> +
> + //
> + // Padding for I/O
> + //
> + PaddingResource++;
> + PaddingResource->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
> + PaddingResource->Len = (UINT16)(
> + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
> + OFFSET_OF (
> + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
> + ResType
> + )
> + );
> + PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
> + PaddingResource->GenFlag = 0x0;
> + PaddingResource->SpecificFlag = 0;
> + PaddingResource->AddrRangeMin = 0;
> + PaddingResource->AddrLen = (UINT64)PcdGet32
> (PcdPciHotPlugResourcePadIo);
> + PaddingResource->AddrRangeMax = PaddingResource->AddrLen - 1;
> +
> + //
> + // Terminate the entries.
> + //
> + PaddingResource++;
> + ((EFI_ACPI_END_TAG_DESCRIPTOR *)PaddingResource)->Desc =
> ACPI_END_TAG_DESCRIPTOR;
> + ((EFI_ACPI_END_TAG_DESCRIPTOR *)PaddingResource)->Checksum = 0x0;
> +
> + *HpcState = EFI_HPC_STATE_INITIALIZED | EFI_HPC_STATE_ENABLED;
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Entry point for this driver.
> +
> + @param[in] ImageHandle Image handle of this driver.
> + @param[in] SystemTable Pointer to SystemTable.
> +
> + @retval EFI_SUCCESS Driver has loaded successfully.
> + @return Error codes from lower level functions.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +PciHotPlugInitialize (
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE *SystemTable
> + )
> +{
> + mPciHotPlugInit.GetRootHpcList = GetRootHpcList;
> + mPciHotPlugInit.InitializeRootHpc = InitializeRootHpc;
> + mPciHotPlugInit.GetResourcePadding = GetResourcePadding;
> + return gBS->InstallMultipleProtocolInterfaces (
> + &ImageHandle,
> + &gEfiPciHotPlugInitProtocolGuid,
> + &mPciHotPlugInit,
> + NULL
> + );
> +}
> --
> 2.25.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 1/2] AMD/AmdMinBoardPkg: Implements PCI hotplug init protocol
2023-05-26 1:36 ` Chang, Abner
@ 2023-05-29 14:35 ` Attar, AbdulLateef (Abdul Lateef)
0 siblings, 0 replies; 7+ messages in thread
From: Attar, AbdulLateef (Abdul Lateef) @ 2023-05-29 14:35 UTC (permalink / raw)
To: Chang, Abner, devel@edk2.groups.io
[AMD Official Use Only - General]
Hi Abner,
Yes, its same patch series with V2 version.
Thanks
AbduL
-----Original Message-----
From: Chang, Abner <Abner.Chang@amd.com>
Sent: Friday, May 26, 2023 7:07 AM
To: Attar, AbdulLateef (Abdul Lateef) <AbdulLateef.Attar@amd.com>; devel@edk2.groups.io
Cc: Attar, AbdulLateef (Abdul Lateef) <AbdulLateef.Attar@amd.com>
Subject: RE: [PATCH v2 1/2] AMD/AmdMinBoardPkg: Implements PCI hotplug init protocol
[AMD Official Use Only - General]
Hi Abdul,
Is this a duplicate patch?
There was a patch you sent: [edk2-devel] [PATCH 1/1] AMD/AmdMinBoardPkg: Implements PCI hotplug init protocol, they both create PciHotPlug.c and PciHotPlug.inf.
Thanks
Abner
> -----Original Message-----
> From: Abdul Lateef Attar <abdattar@amd.com>
> Sent: Monday, May 22, 2023 5:29 PM
> To: devel@edk2.groups.io
> Cc: Attar, AbdulLateef (Abdul Lateef) <AbdulLateef.Attar@amd.com>;
> Chang, Abner <Abner.Chang@amd.com>
> Subject: [PATCH v2 1/2] AMD/AmdMinBoardPkg: Implements PCI hotplug
> init protocol
>
> From: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
>
> Implements PCI hotplug init protocol.
> Adds resources padding based on PCD values.
>
> Cc: Abner Chang <abner.chang@amd.com>
>
> Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
> ---
> .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec | 16 +
> .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc | 14 +-
> .../PciHotPlug/PciHotPlugInit.inf | 39 +++
> .../PciHotPlug/PciHotPlugInit.c | 331 ++++++++++++++++++
> 4 files changed, 399 insertions(+), 1 deletion(-) create mode 100755
> Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> create mode 100755
> Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
>
> diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> index e37b02c4cf5a..65ba08545021 100644
> --- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> +++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> @@ -17,3 +17,19 @@ [Defines]
> PACKAGE_GUID = 44F9D761-9ECB-43DD-A5AC-177E5048701B
> PACKAGE_VERSION = 0.1
>
> +[Guids]
> + gAmdMinBoardPkgTokenSpaceGuid = {0xd4d23d79, 0x73bf, 0x460a,
> {0xa1, 0xc7, 0x85, 0xa3, 0xca, 0x71, 0xb9, 0x4c}}
> +
> +[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
> + #
> + # PCI HotPlug Resource Padding
> + #
> + # PCI bus padding, number of bus to reserve, default 2 bus
> +
> gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadBus|2|UINT8
> |0x10000003
> + # IO Resource padding in bytes, default 4KB
> +
> gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadIo|0x000010
> 00|UINT32|0x10000000
> + # Non-PreFetch Memory padding in bytes, default 1MB
> +
> gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadMem|0x0010
> 0000|UINT32|0x10000002
> + # PreFetch Memory padding in bytes, default 2MB
> +
> gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadPMem|0x002
> 00000|UINT32|0x10000001
> +
> diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> index 273cd74f7842..1a8407250c56 100644
> --- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> +++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> @@ -9,7 +9,7 @@
>
> [Defines]
> DSC_SPECIFICATION = 1.30
> - PLATFORM_GUID = 88F8A9AE-2FA0-4D58-A6F9-05F635C05F4E
> + PLATFORM_GUID = 939B559B-269B-4B8F-9637-44DF6575C1E2
> PLATFORM_NAME = AmdMinBoardPkg
> PLATFORM_VERSION = 0.1
> OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
> @@ -25,6 +25,16 @@ [Packages]
> [LibraryClasses]
>
> SpcrDeviceLib|AmdMinBoardPkg/Library/SpcrDeviceLib/SpcrDeviceLib.inf
>
> +[LibraryClasses.common]
> + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
> +
> BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRe
> pStr.inf
> + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
> +
> MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemor
> yAllocationLib.inf
> + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
> +
> RegisterFilterLib|MdePkg/Library/RegisterFilterLibNull/RegisterFilterL
> RegisterFilterLib|ibNull.inf
> +
> UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiB
> UefiBootServicesTableLib|oo
> tServicesTableLib.inf
> +
> UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEnt
> UefiDriverEntryPoint|ryP
> oint.inf
> +
> [LibraryClasses.common.PEIM]
>
> SetCacheMtrrLib|AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLi
> b.inf
>
> @@ -34,3 +44,5 @@ [Components]
> [Components.IA32]
> AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
>
> +[Components.X64]
> + AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> diff --git a/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> new file mode 100755
> index 000000000000..44564df38718
> --- /dev/null
> +++ b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> @@ -0,0 +1,39 @@
> +## @file
> +# This driver implements EFI_PCI_HOT_PLUG_INIT_PROTOCOL.
> +# Adds resource padding information, for PCIe hotplug purposes.
> +#
> +# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved
> +# SPDX-License-Identifier: BSD-2-Clause-Patent ##
> +
> +[Defines]
> + INF_VERSION = 1.29
> + BASE_NAME = PciHotPlugInit
> + FILE_GUID = 85F78A6D-6438-4BCC-B796-759A48D00C72
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 0.1
> + ENTRY_POINT = PciHotPlugInitialize
> +
> +[Sources]
> + PciHotPlugInit.c
> +
> +[Packages]
> + AmdMinBoardPkg/AmdMinBoardPkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> +
> +[LibraryClasses]
> + MemoryAllocationLib
> + UefiBootServicesTableLib
> + UefiDriverEntryPoint
> +
> +[Protocols]
> + gEfiPciHotPlugInitProtocolGuid
> +
> +[Pcd]
> + gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadBus
> + gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadIo
> + gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadMem
> + gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadPMem
> +
> +[Depex]
> + TRUE
> diff --git a/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
> b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
> new file mode 100755
> index 000000000000..a26ca16741b8
> --- /dev/null
> +++ b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
> @@ -0,0 +1,331 @@
> +/** @file
> + This file declares EFI PCI Hot Plug Init Protocol.
> +
> + This protocol provides the necessary functionality to initialize
> + the Hot Plug Controllers (HPCs) and the buses that they control.
> + This protocol also
> provides
> + information regarding resource padding.
> +
> + @par Note:
> + This source has the reference of OVMF PciHotPluginit.c and Intel
> + platform
> PciHotPlug.c.
> +
> + This protocol is required only on platforms that support one or
> + more PCI
> Hot
> + Plug* slots or CardBus sockets.
> +
> + The EFI_PCI_HOT_PLUG_INIT_PROTOCOL provides a mechanism for the PCI
> bus enumerator
> + to properly initialize the HPCs and CardBus sockets that require initialization.
> + The HPC initialization takes place before the PCI enumeration
> + process is
> complete.
> + There cannot be more than one instance of this protocol in a
> + system. This
> protocol
> + is installed on its own separate handle.
> +
> + Because the system may include multiple HPCs, one instance of this
> + protocol should represent all of them. The protocol functions use
> + the device path of the HPC to identify the HPC. When the PCI bus
> + enumerator finds a root HPC,
> it
> + will call EFI_PCI_HOT_PLUG_INIT_PROTOCOL.InitializeRootHpc(). If
> InitializeRootHpc()
> + is unable to initialize a root HPC, the PCI enumerator will ignore
> + that root
> HPC
> + and continue the enumeration process. If the HPC is not
> + initialized, the
> devices
> + that it controls may not be initialized, and no resource padding
> + will be
> provided.
> +
> + From the standpoint of the PCI bus enumerator, HPCs are divided
> + into the
> following
> + two classes:
> +
> + - Root HPC:
> + These HPCs must be initialized by calling InitializeRootHpc() during the
> + enumeration process. These HPCs will also require resource padding. The
> + platform code must have a priori knowledge of these devices
> + and must
> know
> + how to initialize them. There may not be any way to access their PCI
> + configuration space before the PCI enumerator programs all
> + the
> upstream
> + bridges and thus enables the path to these devices. The PCI
> + bus
> enumerator
> + is responsible for determining the PCI bus address of the HPC before it
> + calls InitializeRootHpc().
> + - Nonroot HPC:
> + These HPCs will not need explicit initialization during
> + enumeration
> process.
> + These HPCs will require resource padding. The platform code
> + does not
> have
> + to have a priori knowledge of these devices.
> +
> + Copyright (c) 2007 - 2018, Intel Corporation. All rights
> + reserved.<BR> Copyright (C) 2016, Red Hat, Inc.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> + @par Revision Reference:
> + This Protocol is defined in UEFI Platform Initialization
> + Specification 1.2 Volume 5: Standards
> +
> +**/
> +
> +#include <Uefi/UefiBaseType.h>
> +#include <Uefi/UefiSpec.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/MemoryAllocationLib.h> #include
> +<Protocol/PciHotPlugInit.h>
> +
> +//
> +// The protocol interface this driver produces.
> +//
> +STATIC EFI_PCI_HOT_PLUG_INIT_PROTOCOL mPciHotPlugInit;
> +
> +/**
> + Returns a list of root Hot Plug Controllers (HPCs) that require
> +initialization
> + during the boot process.
> +
> + This procedure returns a list of root HPCs. The PCI bus driver must
> + initialize these controllers during the boot process. The PCI bus
> + driver may or may
> not be
> + able to detect these HPCs. If the platform includes a
> + PCI-to-CardBus bridge,
> it
> + can be included in this list if it requires initialization. The
> + HpcList must be self consistent. An HPC cannot control any of its
> + parent buses. Only one HPC
> can
> + control a PCI bus. Because this list includes only root HPCs, no
> + HPC in the list can be a child of another HPC. This policy must be enforced by the
> + EFI_PCI_HOT_PLUG_INIT_PROTOCOL. The PCI bus driver may not check for
> such
> + invalid conditions. The callee allocates the buffer HpcList
> +
> + @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL
> instance.
> + @param[out] HpcCount The number of root HPCs that were returned.
> + @param[out] HpcList The list of root HPCs. HpcCount defines the number
> of
> + elements in this list.
> +
> + @retval EFI_SUCCESS HpcList was returned.
> + @retval EFI_INVALID_PARAMETER HpcCount is NULL or HpcList is NULL.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +GetRootHpcList (
> + IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
> + OUT UINTN *HpcCount,
> + OUT EFI_HPC_LOCATION **HpcList
> + )
> +{
> + if ((HpcCount == NULL) || (HpcList == NULL)) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + //
> + // Platform BIOS not doing any extra/special HPC initialization //
> + Hence returning the HpcCount as zero and HpcList as NULL //
> + *HpcCount = 0; *HpcList = NULL;
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Initializes one root Hot Plug Controller (HPC). This process may
> +causes
> + initialization of its subordinate buses.
> +
> + This function initializes the specified HPC. At the end of
> + initialization, the hot-plug slots or sockets (controlled by this
> + HPC) are powered and are connected to the bus. All the necessary
> + registers in the HPC are set up. For a Standard (PCI) Hot Plug
> + Controller (SHPC), the registers that must be set up are defined in
> + the PCI Standard Hot Plug Controller and Subsystem Specification.
> +
> + @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL
> instance.
> + @param[in] HpcDevicePath The device path to the HPC that is being
> initialized.
> + @param[in] HpcPciAddress The address of the HPC function on the PCI
> bus.
> + @param[in] Event The event that should be signaled when the HPC
> + initialization is complete. Set to NULL if the
> + caller wants to wait until the entire initialization
> + process is complete.
> + @param[out] HpcState The state of the HPC hardware. The state is
> + EFI_HPC_STATE_INITIALIZED or EFI_HPC_STATE_ENABLED.
> +
> + @retval EFI_UNSUPPORTED This instance of
> EFI_PCI_HOT_PLUG_INIT_PROTOCOL
> + does not support the specified HPC.
> + @retval EFI_INVALID_PARAMETER HpcState is NULL.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +InitializeRootHpc (
> + IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
> + IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
> + IN UINT64 HpcPciAddress,
> + IN EFI_EVENT Event, OPTIONAL
> + OUT EFI_HPC_STATE *HpcState
> + )
> +{
> + if (HpcState == NULL) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + //
> + // HPC is initialized by respective platform PI modules.
> + // Hence no extra initialization required.
> + //
> + return EFI_UNSUPPORTED;
> +}
> +
> +/**
> + Returns the resource padding that is required by the PCI bus that
> +is
> controlled
> + by the specified Hot Plug Controller (HPC).
> +
> + This function returns the resource padding that is required by the
> + PCI bus
> that
> + is controlled by the specified HPC. This member function is called
> + for all the root HPCs and nonroot HPCs that are detected by the PCI bus enumerator.
> This
> + function will be called before PCI resource allocation is
> + completed. This
> function
> + must be called after all the root HPCs, with the possible exception
> + of a PCI-to-CardBus bridge, have completed initialization.
> +
> + @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL
> instance.
> + @param[in] HpcDevicePath The device path to the HPC.
> + @param[in] HpcPciAddress The address of the HPC function on the PCI
> bus.
> + @param[in] HpcState The state of the HPC hardware.
> + @param[out] Padding The amount of resource padding that is required
> by the
> + PCI bus under the control of the specified HPC.
> + @param[out] Attributes Describes how padding is accounted for. The
> padding
> + is returned in the form of ACPI 2.0 resource descriptors.
> +
> + @retval EFI_SUCCESS The resource padding was successfully
> returned.
> + @retval EFI_INVALID_PARAMETER HpcState or Padding or Attributes is
> NULL.
> + @retval EFI_OUT_OF_RESOURCES ACPI 2.0 resource descriptors for
> Padding
> + cannot be allocated due to insufficient resources.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +GetResourcePadding (
> + IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
> + IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
> + IN UINT64 HpcPciAddress,
> + OUT EFI_HPC_STATE *HpcState,
> + OUT VOID **Padding,
> + OUT EFI_HPC_PADDING_ATTRIBUTES *Attributes
> + )
> +{
> + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *PaddingResource;
> +
> + if ((HpcState == NULL) || (Padding == NULL) || (Attributes == NULL)) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + //
> + // Need total 5 resources
> + // 1 - IO resource
> + // 2 - Mem resource
> + // 3 - PMem resource
> + // 4 - Bus resource
> + // 5 - end tag resource
> + PaddingResource = AllocateZeroPool (4 * sizeof
> (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof
> (EFI_ACPI_END_TAG_DESCRIPTOR));
> + if (PaddingResource == NULL) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + *Padding = (VOID *)PaddingResource;
> +
> + //
> + // Padding for bus
> + //
> + *Attributes = EfiPaddingPciBus;
> +
> + PaddingResource->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
> + PaddingResource->Len = (UINT16)(
> + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
> + OFFSET_OF (
> + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
> + ResType
> + )
> + );
> + PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_BUS;
> + PaddingResource->GenFlag = 0x0;
> + PaddingResource->SpecificFlag = 0;
> + PaddingResource->AddrRangeMin = 0;
> + PaddingResource->AddrRangeMax = 0;
> + PaddingResource->AddrLen = PcdGet8 (PcdPciHotPlugResourcePadBus);
> +
> + //
> + // Padding for non-prefetchable memory // PaddingResource++;
> + PaddingResource->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
> + PaddingResource->Len = (UINT16)(
> + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
> + OFFSET_OF (
> + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
> + ResType
> + )
> + );
> + PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
> + PaddingResource->GenFlag = 0x0;
> + PaddingResource->AddrSpaceGranularity = 32;
> + PaddingResource->SpecificFlag =
> EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE;
> + PaddingResource->AddrRangeMin = 0;
> + PaddingResource->AddrLen = (UINT64)PcdGet32
> (PcdPciHotPlugResourcePadMem);
> + PaddingResource->AddrRangeMax = PaddingResource->AddrLen - 1;
> +
> + //
> + // Padding for prefetchable memory
> + //
> + PaddingResource++;
> + PaddingResource->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
> + PaddingResource->Len = (UINT16)(
> + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
> + OFFSET_OF (
> + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
> + ResType
> + )
> + );
> + PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
> + PaddingResource->GenFlag = 0x0;
> + PaddingResource->AddrSpaceGranularity = 32;
> + PaddingResource->SpecificFlag =
> EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
> + PaddingResource->AddrLen = (UINT64)PcdGet32
> (PcdPciHotPlugResourcePadPMem);
> + PaddingResource->AddrRangeMax = PaddingResource->AddrLen - 1;
> +
> + //
> + // Padding for I/O
> + //
> + PaddingResource++;
> + PaddingResource->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
> + PaddingResource->Len = (UINT16)(
> + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
> + OFFSET_OF (
> + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
> + ResType
> + )
> + );
> + PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
> + PaddingResource->GenFlag = 0x0;
> + PaddingResource->SpecificFlag = 0;
> + PaddingResource->AddrRangeMin = 0;
> + PaddingResource->AddrLen = (UINT64)PcdGet32
> (PcdPciHotPlugResourcePadIo);
> + PaddingResource->AddrRangeMax = PaddingResource->AddrLen - 1;
> +
> + //
> + // Terminate the entries.
> + //
> + PaddingResource++;
> + ((EFI_ACPI_END_TAG_DESCRIPTOR *)PaddingResource)->Desc =
> ACPI_END_TAG_DESCRIPTOR;
> + ((EFI_ACPI_END_TAG_DESCRIPTOR *)PaddingResource)->Checksum = 0x0;
> +
> + *HpcState = EFI_HPC_STATE_INITIALIZED | EFI_HPC_STATE_ENABLED;
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Entry point for this driver.
> +
> + @param[in] ImageHandle Image handle of this driver.
> + @param[in] SystemTable Pointer to SystemTable.
> +
> + @retval EFI_SUCCESS Driver has loaded successfully.
> + @return Error codes from lower level functions.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +PciHotPlugInitialize (
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE *SystemTable
> + )
> +{
> + mPciHotPlugInit.GetRootHpcList = GetRootHpcList;
> + mPciHotPlugInit.InitializeRootHpc = InitializeRootHpc;
> + mPciHotPlugInit.GetResourcePadding = GetResourcePadding;
> + return gBS->InstallMultipleProtocolInterfaces (
> + &ImageHandle,
> + &gEfiPciHotPlugInitProtocolGuid,
> + &mPciHotPlugInit,
> + NULL
> + );
> +}
> --
> 2.25.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 1/2] AMD/AmdMinBoardPkg: Implements PCI hotplug init protocol
2023-05-22 9:28 ` [PATCH v2 1/2] AMD/AmdMinBoardPkg: Implements PCI hotplug init protocol Abdul Lateef Attar
2023-05-26 1:36 ` Chang, Abner
@ 2023-05-29 14:40 ` Chang, Abner
1 sibling, 0 replies; 7+ messages in thread
From: Chang, Abner @ 2023-05-29 14:40 UTC (permalink / raw)
To: Attar, AbdulLateef (Abdul Lateef), devel@edk2.groups.io
Cc: Attar, AbdulLateef (Abdul Lateef)
[AMD Official Use Only - General]
Reviewed-by: Abner Chang <abner.chang@amd.com>
> -----Original Message-----
> From: Abdul Lateef Attar <abdattar@amd.com>
> Sent: Monday, May 22, 2023 5:29 PM
> To: devel@edk2.groups.io
> Cc: Attar, AbdulLateef (Abdul Lateef) <AbdulLateef.Attar@amd.com>; Chang,
> Abner <Abner.Chang@amd.com>
> Subject: [PATCH v2 1/2] AMD/AmdMinBoardPkg: Implements PCI hotplug init
> protocol
>
> From: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
>
> Implements PCI hotplug init protocol.
> Adds resources padding based on PCD values.
>
> Cc: Abner Chang <abner.chang@amd.com>
>
> Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
> ---
> .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec | 16 +
> .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc | 14 +-
> .../PciHotPlug/PciHotPlugInit.inf | 39 +++
> .../PciHotPlug/PciHotPlugInit.c | 331 ++++++++++++++++++
> 4 files changed, 399 insertions(+), 1 deletion(-)
> create mode 100755
> Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> create mode 100755
> Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
>
> diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> index e37b02c4cf5a..65ba08545021 100644
> --- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> +++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> @@ -17,3 +17,19 @@ [Defines]
> PACKAGE_GUID = 44F9D761-9ECB-43DD-A5AC-177E5048701B
> PACKAGE_VERSION = 0.1
>
> +[Guids]
> + gAmdMinBoardPkgTokenSpaceGuid = {0xd4d23d79, 0x73bf, 0x460a,
> {0xa1, 0xc7, 0x85, 0xa3, 0xca, 0x71, 0xb9, 0x4c}}
> +
> +[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
> + #
> + # PCI HotPlug Resource Padding
> + #
> + # PCI bus padding, number of bus to reserve, default 2 bus
> +
> gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadBus|2|UINT8
> |0x10000003
> + # IO Resource padding in bytes, default 4KB
> +
> gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadIo|0x000010
> 00|UINT32|0x10000000
> + # Non-PreFetch Memory padding in bytes, default 1MB
> +
> gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadMem|0x0010
> 0000|UINT32|0x10000002
> + # PreFetch Memory padding in bytes, default 2MB
> +
> gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadPMem|0x002
> 00000|UINT32|0x10000001
> +
> diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> index 273cd74f7842..1a8407250c56 100644
> --- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> +++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> @@ -9,7 +9,7 @@
>
> [Defines]
> DSC_SPECIFICATION = 1.30
> - PLATFORM_GUID = 88F8A9AE-2FA0-4D58-A6F9-05F635C05F4E
> + PLATFORM_GUID = 939B559B-269B-4B8F-9637-44DF6575C1E2
> PLATFORM_NAME = AmdMinBoardPkg
> PLATFORM_VERSION = 0.1
> OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
> @@ -25,6 +25,16 @@ [Packages]
> [LibraryClasses]
> SpcrDeviceLib|AmdMinBoardPkg/Library/SpcrDeviceLib/SpcrDeviceLib.inf
>
> +[LibraryClasses.common]
> + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
> +
> BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRe
> pStr.inf
> + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
> +
> MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemor
> yAllocationLib.inf
> + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
> +
> RegisterFilterLib|MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.inf
> +
> UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBoo
> tServicesTableLib.inf
> +
> UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryP
> oint.inf
> +
> [LibraryClasses.common.PEIM]
>
> SetCacheMtrrLib|AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLi
> b.inf
>
> @@ -34,3 +44,5 @@ [Components]
> [Components.IA32]
> AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
>
> +[Components.X64]
> + AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> diff --git a/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> new file mode 100755
> index 000000000000..44564df38718
> --- /dev/null
> +++ b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> @@ -0,0 +1,39 @@
> +## @file
> +# This driver implements EFI_PCI_HOT_PLUG_INIT_PROTOCOL.
> +# Adds resource padding information, for PCIe hotplug purposes.
> +#
> +# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved
> +# SPDX-License-Identifier: BSD-2-Clause-Patent ##
> +
> +[Defines]
> + INF_VERSION = 1.29
> + BASE_NAME = PciHotPlugInit
> + FILE_GUID = 85F78A6D-6438-4BCC-B796-759A48D00C72
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 0.1
> + ENTRY_POINT = PciHotPlugInitialize
> +
> +[Sources]
> + PciHotPlugInit.c
> +
> +[Packages]
> + AmdMinBoardPkg/AmdMinBoardPkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> +
> +[LibraryClasses]
> + MemoryAllocationLib
> + UefiBootServicesTableLib
> + UefiDriverEntryPoint
> +
> +[Protocols]
> + gEfiPciHotPlugInitProtocolGuid
> +
> +[Pcd]
> + gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadBus
> + gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadIo
> + gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadMem
> + gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadPMem
> +
> +[Depex]
> + TRUE
> diff --git a/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
> b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
> new file mode 100755
> index 000000000000..a26ca16741b8
> --- /dev/null
> +++ b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
> @@ -0,0 +1,331 @@
> +/** @file
> + This file declares EFI PCI Hot Plug Init Protocol.
> +
> + This protocol provides the necessary functionality to initialize the Hot Plug
> + Controllers (HPCs) and the buses that they control. This protocol also
> provides
> + information regarding resource padding.
> +
> + @par Note:
> + This source has the reference of OVMF PciHotPluginit.c and Intel platform
> PciHotPlug.c.
> +
> + This protocol is required only on platforms that support one or more PCI
> Hot
> + Plug* slots or CardBus sockets.
> +
> + The EFI_PCI_HOT_PLUG_INIT_PROTOCOL provides a mechanism for the PCI
> bus enumerator
> + to properly initialize the HPCs and CardBus sockets that require initialization.
> + The HPC initialization takes place before the PCI enumeration process is
> complete.
> + There cannot be more than one instance of this protocol in a system. This
> protocol
> + is installed on its own separate handle.
> +
> + Because the system may include multiple HPCs, one instance of this protocol
> + should represent all of them. The protocol functions use the device path of
> + the HPC to identify the HPC. When the PCI bus enumerator finds a root HPC,
> it
> + will call EFI_PCI_HOT_PLUG_INIT_PROTOCOL.InitializeRootHpc(). If
> InitializeRootHpc()
> + is unable to initialize a root HPC, the PCI enumerator will ignore that root
> HPC
> + and continue the enumeration process. If the HPC is not initialized, the
> devices
> + that it controls may not be initialized, and no resource padding will be
> provided.
> +
> + From the standpoint of the PCI bus enumerator, HPCs are divided into the
> following
> + two classes:
> +
> + - Root HPC:
> + These HPCs must be initialized by calling InitializeRootHpc() during the
> + enumeration process. These HPCs will also require resource padding. The
> + platform code must have a priori knowledge of these devices and must
> know
> + how to initialize them. There may not be any way to access their PCI
> + configuration space before the PCI enumerator programs all the
> upstream
> + bridges and thus enables the path to these devices. The PCI bus
> enumerator
> + is responsible for determining the PCI bus address of the HPC before it
> + calls InitializeRootHpc().
> + - Nonroot HPC:
> + These HPCs will not need explicit initialization during enumeration
> process.
> + These HPCs will require resource padding. The platform code does not
> have
> + to have a priori knowledge of these devices.
> +
> + Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
> + Copyright (C) 2016, Red Hat, Inc.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> + @par Revision Reference:
> + This Protocol is defined in UEFI Platform Initialization Specification 1.2
> + Volume 5: Standards
> +
> +**/
> +
> +#include <Uefi/UefiBaseType.h>
> +#include <Uefi/UefiSpec.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Protocol/PciHotPlugInit.h>
> +
> +//
> +// The protocol interface this driver produces.
> +//
> +STATIC EFI_PCI_HOT_PLUG_INIT_PROTOCOL mPciHotPlugInit;
> +
> +/**
> + Returns a list of root Hot Plug Controllers (HPCs) that require initialization
> + during the boot process.
> +
> + This procedure returns a list of root HPCs. The PCI bus driver must initialize
> + these controllers during the boot process. The PCI bus driver may or may
> not be
> + able to detect these HPCs. If the platform includes a PCI-to-CardBus bridge,
> it
> + can be included in this list if it requires initialization. The HpcList must be
> + self consistent. An HPC cannot control any of its parent buses. Only one HPC
> can
> + control a PCI bus. Because this list includes only root HPCs, no HPC in the list
> + can be a child of another HPC. This policy must be enforced by the
> + EFI_PCI_HOT_PLUG_INIT_PROTOCOL. The PCI bus driver may not check for
> such
> + invalid conditions. The callee allocates the buffer HpcList
> +
> + @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL
> instance.
> + @param[out] HpcCount The number of root HPCs that were returned.
> + @param[out] HpcList The list of root HPCs. HpcCount defines the number
> of
> + elements in this list.
> +
> + @retval EFI_SUCCESS HpcList was returned.
> + @retval EFI_INVALID_PARAMETER HpcCount is NULL or HpcList is NULL.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +GetRootHpcList (
> + IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
> + OUT UINTN *HpcCount,
> + OUT EFI_HPC_LOCATION **HpcList
> + )
> +{
> + if ((HpcCount == NULL) || (HpcList == NULL)) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + //
> + // Platform BIOS not doing any extra/special HPC initialization
> + // Hence returning the HpcCount as zero and HpcList as NULL
> + //
> + *HpcCount = 0;
> + *HpcList = NULL;
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Initializes one root Hot Plug Controller (HPC). This process may causes
> + initialization of its subordinate buses.
> +
> + This function initializes the specified HPC. At the end of initialization,
> + the hot-plug slots or sockets (controlled by this HPC) are powered and are
> + connected to the bus. All the necessary registers in the HPC are set up. For
> + a Standard (PCI) Hot Plug Controller (SHPC), the registers that must be set
> + up are defined in the PCI Standard Hot Plug Controller and Subsystem
> + Specification.
> +
> + @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL
> instance.
> + @param[in] HpcDevicePath The device path to the HPC that is being
> initialized.
> + @param[in] HpcPciAddress The address of the HPC function on the PCI
> bus.
> + @param[in] Event The event that should be signaled when the HPC
> + initialization is complete. Set to NULL if the
> + caller wants to wait until the entire initialization
> + process is complete.
> + @param[out] HpcState The state of the HPC hardware. The state is
> + EFI_HPC_STATE_INITIALIZED or EFI_HPC_STATE_ENABLED.
> +
> + @retval EFI_UNSUPPORTED This instance of
> EFI_PCI_HOT_PLUG_INIT_PROTOCOL
> + does not support the specified HPC.
> + @retval EFI_INVALID_PARAMETER HpcState is NULL.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +InitializeRootHpc (
> + IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
> + IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
> + IN UINT64 HpcPciAddress,
> + IN EFI_EVENT Event, OPTIONAL
> + OUT EFI_HPC_STATE *HpcState
> + )
> +{
> + if (HpcState == NULL) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + //
> + // HPC is initialized by respective platform PI modules.
> + // Hence no extra initialization required.
> + //
> + return EFI_UNSUPPORTED;
> +}
> +
> +/**
> + Returns the resource padding that is required by the PCI bus that is
> controlled
> + by the specified Hot Plug Controller (HPC).
> +
> + This function returns the resource padding that is required by the PCI bus
> that
> + is controlled by the specified HPC. This member function is called for all the
> + root HPCs and nonroot HPCs that are detected by the PCI bus enumerator.
> This
> + function will be called before PCI resource allocation is completed. This
> function
> + must be called after all the root HPCs, with the possible exception of a
> + PCI-to-CardBus bridge, have completed initialization.
> +
> + @param[in] This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL
> instance.
> + @param[in] HpcDevicePath The device path to the HPC.
> + @param[in] HpcPciAddress The address of the HPC function on the PCI
> bus.
> + @param[in] HpcState The state of the HPC hardware.
> + @param[out] Padding The amount of resource padding that is required
> by the
> + PCI bus under the control of the specified HPC.
> + @param[out] Attributes Describes how padding is accounted for. The
> padding
> + is returned in the form of ACPI 2.0 resource descriptors.
> +
> + @retval EFI_SUCCESS The resource padding was successfully
> returned.
> + @retval EFI_INVALID_PARAMETER HpcState or Padding or Attributes is
> NULL.
> + @retval EFI_OUT_OF_RESOURCES ACPI 2.0 resource descriptors for
> Padding
> + cannot be allocated due to insufficient resources.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +GetResourcePadding (
> + IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
> + IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
> + IN UINT64 HpcPciAddress,
> + OUT EFI_HPC_STATE *HpcState,
> + OUT VOID **Padding,
> + OUT EFI_HPC_PADDING_ATTRIBUTES *Attributes
> + )
> +{
> + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *PaddingResource;
> +
> + if ((HpcState == NULL) || (Padding == NULL) || (Attributes == NULL)) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + //
> + // Need total 5 resources
> + // 1 - IO resource
> + // 2 - Mem resource
> + // 3 - PMem resource
> + // 4 - Bus resource
> + // 5 - end tag resource
> + PaddingResource = AllocateZeroPool (4 * sizeof
> (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof
> (EFI_ACPI_END_TAG_DESCRIPTOR));
> + if (PaddingResource == NULL) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + *Padding = (VOID *)PaddingResource;
> +
> + //
> + // Padding for bus
> + //
> + *Attributes = EfiPaddingPciBus;
> +
> + PaddingResource->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
> + PaddingResource->Len = (UINT16)(
> + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
> + OFFSET_OF (
> + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
> + ResType
> + )
> + );
> + PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_BUS;
> + PaddingResource->GenFlag = 0x0;
> + PaddingResource->SpecificFlag = 0;
> + PaddingResource->AddrRangeMin = 0;
> + PaddingResource->AddrRangeMax = 0;
> + PaddingResource->AddrLen = PcdGet8 (PcdPciHotPlugResourcePadBus);
> +
> + //
> + // Padding for non-prefetchable memory
> + //
> + PaddingResource++;
> + PaddingResource->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
> + PaddingResource->Len = (UINT16)(
> + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
> + OFFSET_OF (
> + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
> + ResType
> + )
> + );
> + PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
> + PaddingResource->GenFlag = 0x0;
> + PaddingResource->AddrSpaceGranularity = 32;
> + PaddingResource->SpecificFlag =
> EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE;
> + PaddingResource->AddrRangeMin = 0;
> + PaddingResource->AddrLen = (UINT64)PcdGet32
> (PcdPciHotPlugResourcePadMem);
> + PaddingResource->AddrRangeMax = PaddingResource->AddrLen - 1;
> +
> + //
> + // Padding for prefetchable memory
> + //
> + PaddingResource++;
> + PaddingResource->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
> + PaddingResource->Len = (UINT16)(
> + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
> + OFFSET_OF (
> + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
> + ResType
> + )
> + );
> + PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
> + PaddingResource->GenFlag = 0x0;
> + PaddingResource->AddrSpaceGranularity = 32;
> + PaddingResource->SpecificFlag =
> EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
> + PaddingResource->AddrLen = (UINT64)PcdGet32
> (PcdPciHotPlugResourcePadPMem);
> + PaddingResource->AddrRangeMax = PaddingResource->AddrLen - 1;
> +
> + //
> + // Padding for I/O
> + //
> + PaddingResource++;
> + PaddingResource->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
> + PaddingResource->Len = (UINT16)(
> + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
> + OFFSET_OF (
> + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
> + ResType
> + )
> + );
> + PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
> + PaddingResource->GenFlag = 0x0;
> + PaddingResource->SpecificFlag = 0;
> + PaddingResource->AddrRangeMin = 0;
> + PaddingResource->AddrLen = (UINT64)PcdGet32
> (PcdPciHotPlugResourcePadIo);
> + PaddingResource->AddrRangeMax = PaddingResource->AddrLen - 1;
> +
> + //
> + // Terminate the entries.
> + //
> + PaddingResource++;
> + ((EFI_ACPI_END_TAG_DESCRIPTOR *)PaddingResource)->Desc =
> ACPI_END_TAG_DESCRIPTOR;
> + ((EFI_ACPI_END_TAG_DESCRIPTOR *)PaddingResource)->Checksum = 0x0;
> +
> + *HpcState = EFI_HPC_STATE_INITIALIZED | EFI_HPC_STATE_ENABLED;
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Entry point for this driver.
> +
> + @param[in] ImageHandle Image handle of this driver.
> + @param[in] SystemTable Pointer to SystemTable.
> +
> + @retval EFI_SUCCESS Driver has loaded successfully.
> + @return Error codes from lower level functions.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +PciHotPlugInitialize (
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE *SystemTable
> + )
> +{
> + mPciHotPlugInit.GetRootHpcList = GetRootHpcList;
> + mPciHotPlugInit.InitializeRootHpc = InitializeRootHpc;
> + mPciHotPlugInit.GetResourcePadding = GetResourcePadding;
> + return gBS->InstallMultipleProtocolInterfaces (
> + &ImageHandle,
> + &gEfiPciHotPlugInitProtocolGuid,
> + &mPciHotPlugInit,
> + NULL
> + );
> +}
> --
> 2.25.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 2/2] AMD/AmdMinBoardkPkg: Implements PeiReportFvLib Library
2023-05-22 9:28 ` [PATCH v2 2/2] AMD/AmdMinBoardkPkg: Implements PeiReportFvLib Library Abdul Lateef Attar
@ 2023-05-29 14:40 ` Chang, Abner
0 siblings, 0 replies; 7+ messages in thread
From: Chang, Abner @ 2023-05-29 14:40 UTC (permalink / raw)
To: Attar, AbdulLateef (Abdul Lateef), devel@edk2.groups.io
Cc: Attar, AbdulLateef (Abdul Lateef)
[AMD Official Use Only - General]
Reviewed-by: Abner Chang <abner.chang@amd.com>
> -----Original Message-----
> From: Abdul Lateef Attar <abdattar@amd.com>
> Sent: Monday, May 22, 2023 5:29 PM
> To: devel@edk2.groups.io
> Cc: Attar, AbdulLateef (Abdul Lateef) <AbdulLateef.Attar@amd.com>; Chang,
> Abner <Abner.Chang@amd.com>
> Subject: [PATCH v2 2/2] AMD/AmdMinBoardkPkg: Implements
> PeiReportFvLib Library
>
> Customize PeiReportFvLib library for AMD platforms by
> adding below changes.
> Installs Advanced Security FV.
> Adds facility to install FV above 4GB address space.
>
> Cc: Abner Chang <abner.chang@amd.com>
>
> Signed-off-by: Abdul Lateef Attar <abdattar@amd.com>
> ---
> .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec | 8 +
> .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc | 2 +
> .../Library/PeiReportFvLib/PeiReportFvLib.inf | 57 +++++
> .../Library/PeiReportFvLib/PeiReportFvLib.c | 239 ++++++++++++++++++
> 4 files changed, 306 insertions(+)
> create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
> create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.c
>
> diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> index 65ba08545021..03d1d77c34eb 100644
> --- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> +++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> @@ -33,3 +33,11 @@ [PcdsFixedAtBuild, PcdsPatchableInModule,
> PcdsDynamic, PcdsDynamicEx]
> # PreFetch Memory padding in bytes, default 2MB
>
> gAmdMinBoardPkgTokenSpaceGuid.PcdPciHotPlugResourcePadPMem|0x002
> 00000|UINT32|0x10000001
>
> + # PCDs to support loading of FV above 4GB address space
> + gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedBase
> |0x0000000000000000|UINT64|0x10000004
> + gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvOsBootBase
> |0x0000000000000000|UINT64|0x10000005
> + gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvUefiBootBase
> |0x0000000000000000|UINT64|0x10000006
> + gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecurityBase
> |0x0000000000000000|UINT64|0x10000007
> + gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecuritySize
> |0x00000000|UINT32|0x10000008
> +
> gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecurityOffset
> |0x00000000|UINT32|0x10000009
> +
> diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> index 1a8407250c56..be33089a45ef 100644
> --- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> +++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> @@ -24,6 +24,7 @@ [Packages]
>
> [LibraryClasses]
> SpcrDeviceLib|AmdMinBoardPkg/Library/SpcrDeviceLib/SpcrDeviceLib.inf
> + ReportFvLib|AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
>
> [LibraryClasses.common]
> BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
> @@ -43,6 +44,7 @@ [Components]
>
> [Components.IA32]
> AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
> + AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
>
> [Components.X64]
> AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> diff --git
> a/Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.in
> f
> b/Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.i
> nf
> new file mode 100644
> index 000000000000..23ee503c42be
> --- /dev/null
> +++
> b/Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.i
> nf
> @@ -0,0 +1,57 @@
> +### @file
> +# Component information file for the Report Firmware Volume (FV) library.
> +#
> +# Copyright (c) 2018 - 2020, Intel Corporation. All rights reserved.<BR>
> +# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +###
> +
> +[Defines]
> + INF_VERSION = 1.29
> + BASE_NAME = PeiReportFvLib
> + FILE_GUID = 3C207C28-DC43-4A3A-B572-6794C77AB519
> + VERSION_STRING = 1.0
> + MODULE_TYPE = PEIM
> + LIBRARY_CLASS = ReportFvLib
> +
> +[LibraryClasses]
> + BaseMemoryLib
> + DebugLib
> + HobLib
> + PeiServicesLib
> +
> +[Packages]
> + AmdMinBoardPkg/AmdMinBoardPkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> + MinPlatformPkg/MinPlatformPkg.dec
> +
> +[Sources]
> + PeiReportFvLib.c
> +
> +[Pcd]
> + gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedBase ##
> CONSUMES
> + gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecurityBase
> ## CONSUMES
> + gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecuritySize
> ## CONSUMES
> + gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvOsBootBase ##
> CONSUMES
> + gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvUefiBootBase ##
> CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdBootStage ## CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress ##
> CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase ##
> CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryBase ##
> CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize ##
> CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize ##
> CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase ##
> CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize ##
> CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase ##
> CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize ##
> CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase ##
> CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize ##
> CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase ##
> CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize ##
> CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase ##
> CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize ##
> CONSUMES
> + gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode ##
> CONSUMES
> diff --git
> a/Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.c
> b/Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.c
> new file mode 100644
> index 000000000000..f0b2abef611b
> --- /dev/null
> +++
> b/Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.c
> @@ -0,0 +1,239 @@
> +/** @file
> + Source code file for Report Firmware Volume (FV) library for AMD platforms.
> +
> + @par Note:
> + This source has the reference of MinPlatformPkgs's PeriReportFvLib.c
> module.
> +
> + Copyright (c) 2018 - 2020, Intel Corporation. All rights reserved.<BR>
> + Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include <Base.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/HobLib.h>
> +#include <Library/PeiServicesLib.h>
> +#include <Library/ReportFvLib.h>
> +#include <Guid/FirmwareFileSystem2.h>
> +#include <Ppi/FirmwareVolumeInfo.h>
> +
> +VOID
> +ReportPreMemFv (
> + VOID
> + )
> +{
> + ///
> + /// Note : FSP FVs except FSP-T FV are installed in IntelFsp2WrapperPkg in
> Dispatch mode.
> + ///
> + if (PcdGetBool (PcdFspWrapperBootMode)) {
> + DEBUG ((DEBUG_INFO, "Install FlashFvFspT - 0x%x, 0x%x\n", PcdGet32
> (PcdFlashFvFspTBase), PcdGet32 (PcdFlashFvFspTSize)));
> + PeiServicesInstallFvInfo2Ppi (
> + &(((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32
> (PcdFlashFvFspTBase))->FileSystemGuid),
> + (VOID *)(UINTN)PcdGet32 (PcdFlashFvFspTBase),
> + PcdGet32 (PcdFlashFvFspTSize),
> + NULL,
> + NULL,
> + 0
> + );
> + }
> +
> + DEBUG ((DEBUG_INFO, "Install FlashFvSecurity - 0x%x, 0x%x\n", PcdGet32
> (PcdFlashFvSecurityBase), PcdGet32 (PcdFlashFvSecuritySize)));
> + PeiServicesInstallFvInfo2Ppi (
> + &(((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32
> (PcdFlashFvSecurityBase))->FileSystemGuid),
> + (VOID *)(UINTN)PcdGet32 (PcdFlashFvSecurityBase),
> + PcdGet32 (PcdFlashFvSecuritySize),
> + NULL,
> + NULL,
> + 0
> + );
> + if (PcdGet8 (PcdBootStage) >= 6) {
> + DEBUG ((
> + DEBUG_INFO,
> + "Install FlashFvAdvancedPreMemory - 0x%x, 0x%x\n",
> + PcdGet32 (PcdFlashFvAdvancedPreMemoryBase),
> + PcdGet32 (PcdFlashFvAdvancedPreMemorySize)
> + ));
> + PeiServicesInstallFvInfo2Ppi (
> + &(((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32
> (PcdFlashFvAdvancedPreMemoryBase))->FileSystemGuid),
> + (VOID *)(UINTN)PcdGet32 (PcdFlashFvAdvancedPreMemoryBase),
> + PcdGet32 (PcdFlashFvAdvancedPreMemorySize),
> + NULL,
> + NULL,
> + 0
> + );
> + }
> +}
> +
> +VOID
> +ReportPostMemFv (
> + VOID
> + )
> +{
> + EFI_STATUS Status;
> + EFI_BOOT_MODE BootMode;
> + EFI_HOB_FIRMWARE_VOLUME3 *Hob3;
> + EFI_HOB_FIRMWARE_VOLUME *Hob;
> +
> + Status = PeiServicesGetBootMode (&BootMode);
> + ASSERT_EFI_ERROR (Status);
> +
> + ///
> + /// Note : FSP FVs except FSP-T FV are installed in IntelFsp2WrapperPkg in
> Dispatch mode.
> + ///
> +
> + ///
> + /// Build HOB for DXE
> + ///
> + if (BootMode == BOOT_IN_RECOVERY_MODE) {
> + ///
> + /// Prepare the recovery service
> + ///
> + } else {
> + DEBUG ((DEBUG_INFO, "Install FlashFvPostMemory - 0x%x, 0x%x\n",
> PcdGet32 (PcdFlashFvPostMemoryBase), PcdGet32
> (PcdFlashFvPostMemorySize)));
> + PeiServicesInstallFvInfo2Ppi (
> + &(((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32
> (PcdFlashFvPostMemoryBase))->FileSystemGuid),
> + (VOID *)(UINTN)PcdGet32 (PcdFlashFvPostMemoryBase),
> + PcdGet32 (PcdFlashFvPostMemorySize),
> + NULL,
> + NULL,
> + 0
> + );
> +
> + if (PcdGet64 (PcdAmdFlashFvUefiBootBase) >= BASE_4GB) {
> + Hob = NULL;
> + Hob3 = NULL;
> + DEBUG ((DEBUG_INFO, "Found FvUefiBoot FV above 4GB, creating FV
> HOBs.\n"));
> + Status = PeiServicesCreateHob (EFI_HOB_TYPE_FV, sizeof
> (EFI_HOB_FIRMWARE_VOLUME), (VOID **)&Hob);
> + if (!EFI_ERROR (Status)) {
> + Hob->BaseAddress = PcdGet64 (PcdAmdFlashFvUefiBootBase);
> + Hob->Length = PcdGet32 (PcdFlashFvUefiBootSize);
> + }
> +
> + Status = PeiServicesCreateHob (EFI_HOB_TYPE_FV3, sizeof
> (EFI_HOB_FIRMWARE_VOLUME3), (VOID **)&Hob3);
> + if (!EFI_ERROR (Status)) {
> + Hob3->BaseAddress = PcdGet64 (PcdAmdFlashFvUefiBootBase);
> + Hob3->Length = PcdGet32 (PcdFlashFvUefiBootSize);
> + Hob3->AuthenticationStatus = 0;
> + Hob3->ExtractedFv = FALSE;
> + }
> + } else {
> + DEBUG ((DEBUG_INFO, "Install FlashFvUefiBoot - 0x%lx, 0x%x\n",
> PcdGet64 (PcdAmdFlashFvUefiBootBase), PcdGet32
> (PcdFlashFvUefiBootSize)));
> + PeiServicesInstallFvInfo2Ppi (
> + &(((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet64
> (PcdAmdFlashFvUefiBootBase))->FileSystemGuid),
> + (VOID *)(UINTN)PcdGet64 (PcdAmdFlashFvUefiBootBase),
> + PcdGet32 (PcdFlashFvUefiBootSize),
> + NULL,
> + NULL,
> + 0
> + );
> + }
> +
> + if (PcdGet64 (PcdAmdFlashFvOsBootBase) >= BASE_4GB) {
> + Hob = NULL;
> + Hob3 = NULL;
> + DEBUG ((DEBUG_INFO, "Found FvOsBoot FV above 4GB, creating FV
> HOBs.\n"));
> + Status = PeiServicesCreateHob (EFI_HOB_TYPE_FV, sizeof
> (EFI_HOB_FIRMWARE_VOLUME), (VOID **)&Hob);
> + if (!EFI_ERROR (Status)) {
> + Hob->BaseAddress = PcdGet64 (PcdAmdFlashFvOsBootBase);
> + Hob->Length = PcdGet32 (PcdFlashFvOsBootSize);
> + }
> +
> + Status = PeiServicesCreateHob (EFI_HOB_TYPE_FV3, sizeof
> (EFI_HOB_FIRMWARE_VOLUME3), (VOID **)&Hob3);
> + if (!EFI_ERROR (Status)) {
> + Hob3->BaseAddress = PcdGet64 (PcdAmdFlashFvOsBootBase);
> + Hob3->Length = PcdGet32 (PcdFlashFvOsBootSize);
> + Hob3->AuthenticationStatus = 0;
> + Hob3->ExtractedFv = FALSE;
> + }
> + } else {
> + DEBUG ((DEBUG_INFO, "Install FlashFvOsBoot - 0x%lx, 0x%x\n",
> PcdGet64 (PcdAmdFlashFvOsBootBase), PcdGet32 (PcdFlashFvOsBootSize)));
> + PeiServicesInstallFvInfo2Ppi (
> + &(((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet64
> (PcdAmdFlashFvOsBootBase))->FileSystemGuid),
> + (VOID *)(UINTN)PcdGet64 (PcdAmdFlashFvOsBootBase),
> + PcdGet32 (PcdFlashFvOsBootSize),
> + NULL,
> + NULL,
> + 0
> + );
> + }
> +
> + if (PcdGet8 (PcdBootStage) >= 6) {
> + if (PcdGet64 (PcdAmdFlashFvAdvancedBase) >= BASE_4GB) {
> + Hob = NULL;
> + Hob3 = NULL;
> + DEBUG ((DEBUG_INFO, "Found FvAdvanced FV above 4GB, creating FV
> HOBs.\n"));
> + Status = PeiServicesCreateHob (EFI_HOB_TYPE_FV, sizeof
> (EFI_HOB_FIRMWARE_VOLUME), (VOID **)&Hob);
> + if (!EFI_ERROR (Status)) {
> + Hob->BaseAddress = PcdGet64 (PcdAmdFlashFvAdvancedBase);
> + Hob->Length = PcdGet32 (PcdFlashFvAdvancedSize);
> + }
> +
> + Status = PeiServicesCreateHob (EFI_HOB_TYPE_FV3, sizeof
> (EFI_HOB_FIRMWARE_VOLUME3), (VOID **)&Hob3);
> + if (!EFI_ERROR (Status)) {
> + Hob3->BaseAddress = PcdGet64 (PcdAmdFlashFvAdvancedBase);
> + Hob3->Length = PcdGet32 (PcdFlashFvAdvancedSize);
> + Hob3->AuthenticationStatus = 0;
> + Hob3->ExtractedFv = FALSE;
> + }
> + } else {
> + DEBUG ((DEBUG_INFO, "Install FlashFvAdvanced - 0x%lx, 0x%x\n",
> PcdGet64 (PcdAmdFlashFvAdvancedBase), PcdGet32
> (PcdFlashFvAdvancedSize)));
> + PeiServicesInstallFvInfo2Ppi (
> + &(((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet64
> (PcdAmdFlashFvAdvancedBase))->FileSystemGuid),
> + (VOID *)(UINTN)PcdGet64 (PcdAmdFlashFvAdvancedBase),
> + PcdGet32 (PcdFlashFvAdvancedSize),
> + NULL,
> + NULL,
> + 0
> + );
> + }
> + }
> + }
> +
> + if (PcdGet64 (PcdAmdFlashFvAdvancedSecurityBase) >= BASE_4GB) {
> + Hob = NULL;
> + Hob3 = NULL;
> + DEBUG ((DEBUG_INFO, "Found FvAdvancedSecurity FV above 4GB,
> creating FV HOBs.\n"));
> + Status = PeiServicesCreateHob (EFI_HOB_TYPE_FV, sizeof
> (EFI_HOB_FIRMWARE_VOLUME), (VOID **)&Hob);
> + if (!EFI_ERROR (Status)) {
> + Hob->BaseAddress = PcdGet64 (PcdAmdFlashFvAdvancedSecurityBase);
> + Hob->Length = PcdGet32 (PcdAmdFlashFvAdvancedSecuritySize);
> + }
> +
> + Status = PeiServicesCreateHob (EFI_HOB_TYPE_FV3, sizeof
> (EFI_HOB_FIRMWARE_VOLUME3), (VOID **)&Hob3);
> + if (!EFI_ERROR (Status)) {
> + Hob3->BaseAddress = PcdGet64
> (PcdAmdFlashFvAdvancedSecurityBase);
> + Hob3->Length = PcdGet32 (PcdAmdFlashFvAdvancedSecuritySize);
> + Hob3->AuthenticationStatus = 0;
> + Hob3->ExtractedFv = FALSE;
> + }
> + } else {
> + DEBUG ((DEBUG_INFO, "Install FvAdvancedSecurity - 0x%lx, 0x%x\n",
> PcdGet64 (PcdAmdFlashFvAdvancedSecurityBase), PcdGet32
> (PcdAmdFlashFvAdvancedSecuritySize)));
> + PeiServicesInstallFvInfo2Ppi (
> + &(((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet64
> (PcdAmdFlashFvAdvancedSecurityBase))->FileSystemGuid),
> + (VOID *)(UINTN)PcdGet64 (PcdAmdFlashFvAdvancedSecurityBase),
> + PcdGet32 (PcdAmdFlashFvAdvancedSecuritySize),
> + NULL,
> + NULL,
> + 0
> + );
> + }
> +
> + //
> + // Report resource HOB for flash FV
> + //
> + BuildResourceDescriptorHob (
> + EFI_RESOURCE_MEMORY_MAPPED_IO,
> + (EFI_RESOURCE_ATTRIBUTE_PRESENT |
> + EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
> + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE),
> + (UINTN)PcdGet32 (PcdFlashAreaBaseAddress),
> + (UINTN)PcdGet32 (PcdFlashAreaSize)
> + );
> + BuildMemoryAllocationHob (
> + (UINTN)PcdGet32 (PcdFlashAreaBaseAddress),
> + (UINTN)PcdGet32 (PcdFlashAreaSize),
> + EfiMemoryMappedIO
> + );
> +}
> --
> 2.25.1
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2023-05-29 14:40 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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2023-05-22 9:28 [PATCH v2 0/2] AMD/AmdMinBoardPkg: ReportFvLib library and Abdul Lateef Attar
2023-05-22 9:28 ` [PATCH v2 1/2] AMD/AmdMinBoardPkg: Implements PCI hotplug init protocol Abdul Lateef Attar
2023-05-26 1:36 ` Chang, Abner
2023-05-29 14:35 ` Attar, AbdulLateef (Abdul Lateef)
2023-05-29 14:40 ` Chang, Abner
2023-05-22 9:28 ` [PATCH v2 2/2] AMD/AmdMinBoardkPkg: Implements PeiReportFvLib Library Abdul Lateef Attar
2023-05-29 14:40 ` Chang, Abner
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