Re: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V4 14/34] UefiCpuPkg/CpuTimerLib: Add support for RISC-V

["Chang, Abner" <abner.chang@amd.com>]

[AMD Official Use Only - General]

Acked-by: Abner Chang <abner.chang@amd.com>

However, this one has the dependency with 13/34.

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Sunil V L
> via groups.io
> Sent: Saturday, October 15, 2022 12:48 AM
> To: devel@edk2.groups.io
> Cc: Eric Dong <eric.dong@intel.com>; Ray Ni <ray.ni@intel.com>; Rahul
> Kumar <rahul1.kumar@intel.com>; Daniel Schaefer
> <git@danielschaefer.me>
> Subject: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V4 14/34]
> UefiCpuPkg/CpuTimerLib: Add support for RISC-V
> 
> Caution: This message originated from an External Source. Use proper
> caution when opening attachments, clicking links, or responding.
> 
> 
> REF:
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugz
> illa.tianocore.org%2Fshow_bug.cgi%3Fid%3D4076&amp;data=05%7C01%7Ca
> bner.chang%40amd.com%7Ceaf8b2b498184b9f539908daae0436c0%7C3dd89
> 61fe4884e608e11a82d994e183d%7C0%7C0%7C638013630372412102%7CUnkn
> own%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik
> 1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&amp;sdata=MisyEM5LX8ruF
> SvIl%2FjeyVABYXm2GwS2qN8VITTbeE4%3D&amp;reserved=0
> 
> This is mostly copied from
> edk2-platforms/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib
> 
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Rahul Kumar <rahul1.kumar@intel.com>
> Cc: Daniel Schaefer <git@danielschaefer.me>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
>  UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf   |   3 +
>  UefiCpuPkg/Library/CpuTimerLib/RiscV64/CpuTimerLib.c | 199
> ++++++++++++++++++++
>  2 files changed, 202 insertions(+)
> 
> diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
> b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
> index 4b263965ed90..4492ee26caae 100644
> --- a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
> +++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
> @@ -22,6 +22,9 @@ [Sources.IA32, Sources.X64]
>    Ia32X64/CpuTimerLib.c
>    Ia32X64/BaseCpuTimerLib.c
> 
> +[Sources.RISCV64]
> +  RiscV64/CpuTimerLib.c
> +
>  [Packages]
>    MdePkg/MdePkg.dec
>    UefiCpuPkg/UefiCpuPkg.dec
> diff --git a/UefiCpuPkg/Library/CpuTimerLib/RiscV64/CpuTimerLib.c
> b/UefiCpuPkg/Library/CpuTimerLib/RiscV64/CpuTimerLib.c
> new file mode 100644
> index 000000000000..9c8efc0f3530
> --- /dev/null
> +++ b/UefiCpuPkg/Library/CpuTimerLib/RiscV64/CpuTimerLib.c
> @@ -0,0 +1,199 @@
> +/** @file
> +  RISC-V instance of Timer Library.
> +
> +  Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP.
> + All rights reserved.<BR>
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include <Uefi.h>
> +#include <Library/BaseLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/PcdLib.h>
> +#include <Register/RiscV64/RiscVImpl.h>
> +
> +/**
> +  Stalls the CPU for at least the given number of ticks.
> +
> +  Stalls the CPU for at least the given number of ticks. It's invoked
> + by
> +  MicroSecondDelay() and NanoSecondDelay().
> +
> +  @param  Delay     A period of time to delay in ticks.
> +
> +**/
> +VOID
> +InternalRiscVTimerDelay (
> +  IN UINT32  Delay
> +  )
> +{
> +  UINT32  Ticks;
> +  UINT32  Times;
> +
> +  Times  = Delay >> (RISCV_TIMER_COMPARE_BITS - 2);
> +  Delay &= ((1 << (RISCV_TIMER_COMPARE_BITS - 2)) - 1);
> +  do {
> +    //
> +    // The target timer count is calculated here
> +    //
> +    Ticks = RiscVReadTimer () + Delay;
> +    Delay = 1 << (RISCV_TIMER_COMPARE_BITS - 2);
> +    while (((Ticks - RiscVReadTimer ()) & (1 << (RISCV_TIMER_COMPARE_BITS
> - 1))) == 0) {
> +      CpuPause ();
> +    }
> +  } while (Times-- > 0);
> +}
> +
> +/**
> +  Stalls the CPU for at least the given number of microseconds.
> +
> +  Stalls the CPU for the number of microseconds specified by MicroSeconds.
> +
> +  @param  MicroSeconds  The minimum number of microseconds to delay.
> +
> +  @return MicroSeconds
> +
> +**/
> +UINTN
> +EFIAPI
> +MicroSecondDelay (
> +  IN UINTN  MicroSeconds
> +  )
> +{
> +  InternalRiscVTimerDelay (
> +    (UINT32)DivU64x32 (
> +              MultU64x32 (
> +                MicroSeconds,
> +                PcdGet64 (PcdCpuCoreCrystalClockFrequency)
> +                ),
> +              1000000u
> +              )
> +    );
> +  return MicroSeconds;
> +}
> +
> +/**
> +  Stalls the CPU for at least the given number of nanoseconds.
> +
> +  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
> +
> +  @param  NanoSeconds The minimum number of nanoseconds to delay.
> +
> +  @return NanoSeconds
> +
> +**/
> +UINTN
> +EFIAPI
> +NanoSecondDelay (
> +  IN UINTN  NanoSeconds
> +  )
> +{
> +  InternalRiscVTimerDelay (
> +    (UINT32)DivU64x32 (
> +              MultU64x32 (
> +                NanoSeconds,
> +                PcdGet64 (PcdCpuCoreCrystalClockFrequency)
> +                ),
> +              1000000000u
> +              )
> +    );
> +  return NanoSeconds;
> +}
> +
> +/**
> +  Retrieves the current value of a 64-bit free running performance counter.
> +
> +  Retrieves the current value of a 64-bit free running performance
> + counter. The  counter can either count up by 1 or count down by 1. If
> + the physical  performance counter counts by a larger increment, then
> + the counter values  must be translated. The properties of the counter
> + can be retrieved from  GetPerformanceCounterProperties().
> +
> +  @return The current value of the free running performance counter.
> +
> +**/
> +UINT64
> +EFIAPI
> +GetPerformanceCounter (
> +  VOID
> +  )
> +{
> +  return (UINT64)RiscVReadTimer ();
> +}
> +
> +/**return
> +  Retrieves the 64-bit frequency in Hz and the range of performance
> +counter
> +  values.
> +
> +  If StartValue is not NULL, then the value that the performance
> + counter starts  with immediately after is it rolls over is returned in
> + StartValue. If  EndValue is not NULL, then the value that the
> + performance counter end with  immediately before it rolls over is
> + returned in EndValue. The 64-bit  frequency of the performance counter
> + in Hz is always returned. If StartValue  is less than EndValue, then
> + the performance counter counts up. If StartValue  is greater than
> + EndValue, then the performance counter counts down. For  example, a
> + 64-bit free running counter that counts up would have a StartValue  of
> + 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
> that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
> +
> +  @param  StartValue  The value the performance counter starts with when
> it
> +                      rolls over.
> +  @param  EndValue    The value that the performance counter ends with
> before
> +                      it rolls over.
> +
> +  @return The frequency in Hz.
> +
> +**/
> +UINT64
> +EFIAPI
> +GetPerformanceCounterProperties (
> +  OUT      UINT64 *StartValue, OPTIONAL
> +  OUT      UINT64                    *EndValue     OPTIONAL
> +  )
> +{
> +  if (StartValue != NULL) {
> +    *StartValue = 0;
> +  }
> +
> +  if (EndValue != NULL) {
> +    *EndValue = 32 - 1;
> +  }
> +
> +  return PcdGet64 (PcdCpuCoreCrystalClockFrequency);
> +}
> +
> +/**
> +  Converts elapsed ticks of performance counter to time in nanoseconds.
> +
> +  This function converts the elapsed ticks of running performance
> + counter to  time value in unit of nanoseconds.
> +
> +  @param  Ticks     The number of elapsed ticks of running performance
> counter.
> +
> +  @return The elapsed time in nanoseconds.
> +
> +**/
> +UINT64
> +EFIAPI
> +GetTimeInNanoSecond (
> +  IN      UINT64  Ticks
> +  )
> +{
> +  UINT64  NanoSeconds;
> +  UINT32  Remainder;
> +
> +  //
> +  //          Ticks
> +  // Time = --------- x 1,000,000,000
> +  //        Frequency
> +  //
> +  NanoSeconds = MultU64x32 (DivU64x32Remainder (Ticks, PcdGet64
> + (PcdCpuCoreCrystalClockFrequency), &Remainder), 1000000000u);
> +
> +  //
> +  // Frequency < 0x100000000, so Remainder < 0x100000000, then
> + (Remainder * 1,000,000,000)  // will not overflow 64-bit.
> +  //
> +  NanoSeconds += DivU64x32 (MultU64x32 ((UINT64)Remainder,
> + 1000000000u), PcdGet64 (PcdCpuCoreCrystalClockFrequency));
> +
> +  return NanoSeconds;
> +}
> --
> 2.38.0
> 
> 
> 
> 
>