From: "Chang, Abner" <abner.chang@amd.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>,
"Attar, AbdulLateef (Abdul Lateef)" <AbdulLateef.Attar@amd.com>
Cc: "Grimes, Paul" <Paul.Grimes@amd.com>,
"Kirkendall, Garrett" <Garrett.Kirkendall@amd.com>,
Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
Rahul Kumar <rahul1.kumar@intel.com>
Subject: Re: [edk2-devel] [PATCH v2 5/6] UefiCpuPkg: Initial implementation of AMD's SmmCpuFeaturesLib
Date: Sun, 15 Jan 2023 04:50:03 +0000 [thread overview]
Message-ID: <MN2PR12MB39666F441DA59F40C61BA9CAEAC09@MN2PR12MB3966.namprd12.prod.outlook.com> (raw)
In-Reply-To: <606bd9523bc41116e845066c788185941518976a.1673417268.git.abdattar@amd.com>
[AMD Official Use Only - General]
Same comment as 4/6.
Please have AmdSmmCpuFeatureLib.c under SmmCpuFeatureLib.
Thanks
Abner
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Abdul
> Lateef Attar via groups.io
> Sent: Wednesday, January 11, 2023 2:16 PM
> To: devel@edk2.groups.io
> Cc: Attar, AbdulLateef (Abdul Lateef) <AbdulLateef.Attar@amd.com>;
> Grimes, Paul <Paul.Grimes@amd.com>; Kirkendall, Garrett
> <Garrett.Kirkendall@amd.com>; Chang, Abner <Abner.Chang@amd.com>;
> Eric Dong <eric.dong@intel.com>; Ray Ni <ray.ni@intel.com>; Rahul Kumar
> <rahul1.kumar@intel.com>
> Subject: [edk2-devel] [PATCH v2 5/6] UefiCpuPkg: Initial implementation of
> AMD's SmmCpuFeaturesLib
>
> Caution: This message originated from an External Source. Use proper
> caution when opening attachments, clicking links, or responding.
>
>
> From: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
>
> BZ:
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugz
> illa.tianocore.org%2Fshow_bug.cgi%3Fid%3D4182&data=05%7C01%7Cabner.
> chang%40amd.com%7Caee2000763a74d2ed6a308daf39b9189%7C3dd8961fe4
> 884e608e11a82d994e183d%7C0%7C0%7C638090146744031405%7CUnknown
> %7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha
> WwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=Wnv%2B%2BMaUiyF0gq
> USzQCrcHcdkUVwZ5L%2BaDzjEvcjQS0%3D&reserved=0
>
> Adds initial defination for AMD's SmmCpuFeaturesLib library implementation.
> All function's body either empty or just returns value. Its initial skeleton of
> library implementation.
>
> Cc: Paul Grimes <paul.grimes@amd.com>
> Cc: Garrett Kirkendall <garrett.kirkendall@amd.com>
> Cc: Abner Chang <abner.chang@amd.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Rahul Kumar <rahul1.kumar@intel.com>
> Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
> ---
> UefiCpuPkg/UefiCpuPkg.dsc | 8 +
> .../AmdSmmCpuFeaturesLib.inf | 33 ++
> .../SmmCpuFeaturesLib/Amd/SmmCpuFeaturesLib.c | 345
> ++++++++++++++++++
> 3 files changed, 386 insertions(+)
> create mode 100644
> UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.inf
> create mode 100644
> UefiCpuPkg/Library/SmmCpuFeaturesLib/Amd/SmmCpuFeaturesLib.c
>
> diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc index
> 99f7532ce00b..1833d35fb354 100644
> --- a/UefiCpuPkg/UefiCpuPkg.dsc
> +++ b/UefiCpuPkg/UefiCpuPkg.dsc
> @@ -178,6 +178,13 @@ [Components.IA32, Components.X64]
> <LibraryClasses>
>
>
> SmmCpuFeaturesLib|UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFea
> turesLibStm.inf
>
> }
>
> + UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf {
>
> + <Defines>
>
> + FILE_GUID = B7242C74-BD21-49EE-84B4-07162E8C080D
>
> + <LibraryClasses>
>
> +
> +
> SmmCpuFeaturesLib|UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCp
> uFeatur
> + esLib.inf
>
> +
> +
> SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull
> /Smm
> + CpuPlatformHookLibNull.inf
>
> + }
>
> UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
>
> UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
>
> UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf
>
> @@ -194,6 +201,7 @@ [Components.IA32, Components.X64]
>
> UnitTestResultReportLib|UnitTestFrameworkPkg/Library/UnitTestResultRep
> ortLib/UnitTestResultReportLibConOut.inf
>
> }
>
>
> UefiCpuPkg/Library/SmmSmramSaveStateLib/AmdSmmSmramSaveStateLib.
> inf
>
> + UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.inf
>
>
>
> [Components.X64]
>
>
> UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/DxeCpuExceptionHan
> dlerLibUnitTest.inf
>
> diff --git
> a/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.inf
> b/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.inf
> new file mode 100644
> index 000000000000..547b9cf15b84
> --- /dev/null
> +++
> b/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.inf
> @@ -0,0 +1,33 @@
> +## @file
>
> +# The CPU specific programming for PiSmmCpuDxeSmm module.
>
> +#
>
> +# Copyright (c) 2009 - 2016, Intel Corporation. All rights
> +reserved.<BR>
>
> +# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights
> +reserved.<BR>
>
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +#
>
> +##
>
> +
>
> +[Defines]
>
> + INF_VERSION = 0x00010005
>
> + BASE_NAME = SmmCpuFeaturesLib
>
> + MODULE_UNI_FILE = SmmCpuFeaturesLib.uni
>
> + FILE_GUID = 5849E964-78EC-428E-8CBD-848A7E359134
>
> + MODULE_TYPE = DXE_SMM_DRIVER
>
> + VERSION_STRING = 1.0
>
> + LIBRARY_CLASS = SmmCpuFeaturesLib
>
> + CONSTRUCTOR = SmmCpuFeaturesLibConstructor
>
> +
>
> +[Sources]
>
> + SmmCpuFeaturesLib.c
>
> + SmmCpuFeaturesLibCommon.c
>
> + Amd/SmmCpuFeaturesLib.c
>
> +
>
> +[Packages]
>
> + MdePkg/MdePkg.dec
>
> + UefiCpuPkg/UefiCpuPkg.dec
>
> +
>
> +[LibraryClasses]
>
> + BaseLib
>
> + PcdLib
>
> + MemoryAllocationLib
>
> + DebugLib
>
> diff --git
> a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Amd/SmmCpuFeaturesLib.c
> b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Amd/SmmCpuFeaturesLib.c
> new file mode 100644
> index 000000000000..c74e1a0c0c5b
> --- /dev/null
> +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Amd/SmmCpuFeaturesLib.c
> @@ -0,0 +1,345 @@
> +/** @file
>
> +Implementation specific to the SmmCpuFeatureLib library instance
>
> +for AMD based platforms.
>
> +
>
> +Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
>
> +Copyright (c) Microsoft Corporation.<BR>
>
> +Copyright (C) 2023 Advanced Micro Devices, Inc. All rights
> +reserved.<BR>
>
> +SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +
>
> +**/
>
> +
>
> +#include <Library/SmmCpuFeaturesLib.h>
>
> +#include <Uefi/UefiBaseType.h>
>
> +
>
> +/**
>
> + Read an SMM Save State register on the target processor. If this
> + function
>
> + returns EFI_UNSUPPORTED, then the caller is responsible for reading
> + the
>
> + SMM Save Sate register.
>
> +
>
> + @param[in] CpuIndex The index of the CPU to read the SMM Save
> + State. The
>
> + value must be between 0 and the NumberOfCpus
> + field in
>
> + the System Management System Table (SMST).
>
> + @param[in] Register The SMM Save State register to read.
>
> + @param[in] Width The number of bytes to read from the CPU save
> state.
>
> + @param[out] Buffer Upon return, this holds the CPU register value read
>
> + from the save state.
>
> +
>
> + @retval EFI_SUCCESS The register was read from Save State.
>
> + @retval EFI_INVALID_PARAMTER Buffer is NULL.
>
> + @retval EFI_UNSUPPORTED This function does not support reading
> Register.
>
> +
>
> +**/
>
> +EFI_STATUS
>
> +EFIAPI
>
> +SmmCpuFeaturesReadSaveStateRegister (
>
> + IN UINTN CpuIndex,
>
> + IN EFI_SMM_SAVE_STATE_REGISTER Register,
>
> + IN UINTN Width,
>
> + OUT VOID *Buffer
>
> + )
>
> +{
>
> + return EFI_SUCCESS;
>
> +}
>
> +
>
> +/**
>
> + Writes an SMM Save State register on the target processor. If this
> + function
>
> + returns EFI_UNSUPPORTED, then the caller is responsible for writing
> + the
>
> + SMM Save Sate register.
>
> +
>
> + @param[in] CpuIndex The index of the CPU to write the SMM Save
> + State. The
>
> + value must be between 0 and the NumberOfCpus
> + field in
>
> + the System Management System Table (SMST).
>
> + @param[in] Register The SMM Save State register to write.
>
> + @param[in] Width The number of bytes to write to the CPU save state.
>
> + @param[in] Buffer Upon entry, this holds the new CPU register value.
>
> +
>
> + @retval EFI_SUCCESS The register was written to Save State.
>
> + @retval EFI_INVALID_PARAMTER Buffer is NULL.
>
> + @retval EFI_UNSUPPORTED This function does not support writing
> Register.
>
> +**/
>
> +EFI_STATUS
>
> +EFIAPI
>
> +SmmCpuFeaturesWriteSaveStateRegister (
>
> + IN UINTN CpuIndex,
>
> + IN EFI_SMM_SAVE_STATE_REGISTER Register,
>
> + IN UINTN Width,
>
> + IN CONST VOID *Buffer
>
> + )
>
> +{
>
> + return EFI_SUCCESS;
>
> +}
>
> +
>
> +/**
>
> + Performs library initialization.
>
> +
>
> + This initialization function contains common functionality shared
> + betwen all
>
> + library instance constructors.
>
> +
>
> +**/
>
> +VOID
>
> +CpuFeaturesLibInitialization (
>
> + VOID
>
> + )
>
> +{
>
> +}
>
> +
>
> +/**
>
> + Called during the very first SMI into System Management Mode to
> + initialize
>
> + CPU features, including SMBASE, for the currently executing CPU.
> + Since this
>
> + is the first SMI, the SMRAM Save State Map is at the default address
> + of
>
> + AMD_SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET.
> The currently
> + executing
>
> + CPU is specified by CpuIndex and CpuIndex can be used to access
> + information
>
> + about the currently executing CPU in the ProcessorInfo array and the
>
> + HotPlugCpuData data structure.
>
> +
>
> + @param[in] CpuIndex The index of the CPU to initialize. The value
>
> + must be between 0 and the NumberOfCpus
> + field in
>
> + the System Management System Table (SMST).
>
> + @param[in] IsMonarch TRUE if the CpuIndex is the index of the CPU
> that
>
> + was elected as monarch during System
> + Management
>
> + Mode initialization.
>
> + FALSE if the CpuIndex is not the index of
> + the CPU
>
> + that was elected as monarch during System
>
> + Management Mode initialization.
>
> + @param[in] ProcessorInfo Pointer to an array of
> EFI_PROCESSOR_INFORMATION
>
> + structures. ProcessorInfo[CpuIndex]
> + contains the
>
> + information for the currently executing CPU.
>
> + @param[in] CpuHotPlugData Pointer to the CPU_HOT_PLUG_DATA
> structure
> + that
>
> + contains the ApidId and SmBase arrays.
>
> +**/
>
> +VOID
>
> +EFIAPI
>
> +SmmCpuFeaturesInitializeProcessor (
>
> + IN UINTN CpuIndex,
>
> + IN BOOLEAN IsMonarch,
>
> + IN EFI_PROCESSOR_INFORMATION *ProcessorInfo,
>
> + IN CPU_HOT_PLUG_DATA *CpuHotPlugData
>
> + )
>
> +{
>
> +}
>
> +
>
> +/**
>
> + This function updates the SMRAM save state on the currently executing
> + CPU
>
> + to resume execution at a specific address after an RSM instruction.
> + This
>
> + function must evaluate the SMRAM save state to determine the
> + execution mode
>
> + the RSM instruction resumes and update the resume execution address
> + with
>
> + either NewInstructionPointer32 or NewInstructionPoint. The auto HALT
> + restart
>
> + flag in the SMRAM save state must always be cleared. This function
> + returns
>
> + the value of the instruction pointer from the SMRAM save state that
> + was
>
> + replaced. If this function returns 0, then the SMRAM save state was
> + not
>
> + modified.
>
> +
>
> + This function is called during the very first SMI on each CPU after
>
> + SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution
> + mode
>
> + to signal that the SMBASE of each CPU has been updated before the
> + default
>
> + SMBASE address is used for the first SMI to the next CPU.
>
> +
>
> + @param[in] CpuIndex The index of the CPU to hook. The value
>
> + must be between 0 and the
> + NumberOfCpus
>
> + field in the System Management
> + System Table
>
> + (SMST).
>
> + @param[in] CpuState Pointer to SMRAM Save State Map for the
>
> + currently executing CPU.
>
> + @param[in] NewInstructionPointer32 Instruction pointer to use if
> + resuming to
>
> + 32-bit execution mode from 64-bit SMM.
>
> + @param[in] NewInstructionPointer Instruction pointer to use if resuming
> to
>
> + same execution mode as SMM.
>
> +
>
> + @retval 0 This function did modify the SMRAM save state.
>
> + @retval > 0 The original instruction pointer value from the SMRAM
> + save state
>
> + before it was replaced.
>
> +**/
>
> +UINT64
>
> +EFIAPI
>
> +SmmCpuFeaturesHookReturnFromSmm (
>
> + IN UINTN CpuIndex,
>
> + IN SMRAM_SAVE_STATE_MAP *CpuState,
>
> + IN UINT64 NewInstructionPointer32,
>
> + IN UINT64 NewInstructionPointer
>
> + )
>
> +{
>
> + return 0;
>
> +}
>
> +
>
> +/**
>
> + Return the size, in bytes, of a custom SMI Handler in bytes. If 0 is
>
> + returned, then a custom SMI handler is not provided by this library,
>
> + and the default SMI handler must be used.
>
> +
>
> + @retval 0 Use the default SMI handler.
>
> + @retval > 0 Use the SMI handler installed by
> + SmmCpuFeaturesInstallSmiHandler()
>
> + The caller is required to allocate enough SMRAM for each
> + CPU to
>
> + support the size of the custom SMI handler.
>
> +**/
>
> +UINTN
>
> +EFIAPI
>
> +SmmCpuFeaturesGetSmiHandlerSize (
>
> + VOID
>
> + )
>
> +{
>
> + return 0;
>
> +}
>
> +
>
> +/**
>
> + Install a custom SMI handler for the CPU specified by CpuIndex. This
> + function
>
> + is only called if SmmCpuFeaturesGetSmiHandlerSize() returns a size is
> + greater
>
> + than zero and is called by the CPU that was elected as monarch during
> + System
>
> + Management Mode initialization.
>
> +
>
> + @param[in] CpuIndex The index of the CPU to install the custom SMI
> handler.
>
> + The value must be between 0 and the
> + NumberOfCpus field
>
> + in the System Management System Table (SMST).
>
> + @param[in] SmBase The SMBASE address for the CPU specified by
> CpuIndex.
>
> + @param[in] SmiStack The stack to use when an SMI is processed by the
>
> + the CPU specified by CpuIndex.
>
> + @param[in] StackSize The size, in bytes, if the stack used when an
> + SMI is
>
> + processed by the CPU specified by CpuIndex.
>
> + @param[in] GdtBase The base address of the GDT to use when an SMI is
>
> + processed by the CPU specified by CpuIndex.
>
> + @param[in] GdtSize The size, in bytes, of the GDT used when an SMI is
>
> + processed by the CPU specified by CpuIndex.
>
> + @param[in] IdtBase The base address of the IDT to use when an SMI is
>
> + processed by the CPU specified by CpuIndex.
>
> + @param[in] IdtSize The size, in bytes, of the IDT used when an SMI is
>
> + processed by the CPU specified by CpuIndex.
>
> + @param[in] Cr3 The base address of the page tables to use when an
> SMI
>
> + is processed by the CPU specified by CpuIndex.
>
> +**/
>
> +VOID
>
> +EFIAPI
>
> +SmmCpuFeaturesInstallSmiHandler (
>
> + IN UINTN CpuIndex,
>
> + IN UINT32 SmBase,
>
> + IN VOID *SmiStack,
>
> + IN UINTN StackSize,
>
> + IN UINTN GdtBase,
>
> + IN UINTN GdtSize,
>
> + IN UINTN IdtBase,
>
> + IN UINTN IdtSize,
>
> + IN UINT32 Cr3
>
> + )
>
> +{
>
> +}
>
> +
>
> +/**
>
> + Determines if MTRR registers must be configured to set SMRAM
> + cache-ability
>
> + when executing in System Management Mode.
>
> +
>
> + @retval TRUE MTRR registers must be configured to set SMRAM cache-
> ability.
>
> + @retval FALSE MTRR registers do not need to be configured to set
> + SMRAM
>
> + cache-ability.
>
> +**/
>
> +BOOLEAN
>
> +EFIAPI
>
> +SmmCpuFeaturesNeedConfigureMtrrs (
>
> + VOID
>
> + )
>
> +{
>
> + return FALSE;
>
> +}
>
> +
>
> +/**
>
> + Disable SMRR register if SMRR is supported and
> + SmmCpuFeaturesNeedConfigureMtrrs()
>
> + returns TRUE.
>
> +**/
>
> +VOID
>
> +EFIAPI
>
> +SmmCpuFeaturesDisableSmrr (
>
> + VOID
>
> + )
>
> +{
>
> +}
>
> +
>
> +/**
>
> + Enable SMRR register if SMRR is supported and
> + SmmCpuFeaturesNeedConfigureMtrrs()
>
> + returns TRUE.
>
> +**/
>
> +VOID
>
> +EFIAPI
>
> +SmmCpuFeaturesReenableSmrr (
>
> + VOID
>
> + )
>
> +{
>
> +}
>
> +
>
> +/**
>
> + Processor specific hook point each time a CPU enters System Management
> Mode.
>
> +
>
> + @param[in] CpuIndex The index of the CPU that has entered SMM. The
> + value
>
> + must be between 0 and the NumberOfCpus field in
> + the
>
> + System Management System Table (SMST).
>
> +**/
>
> +VOID
>
> +EFIAPI
>
> +SmmCpuFeaturesRendezvousEntry (
>
> + IN UINTN CpuIndex
>
> + )
>
> +{
>
> +}
>
> +
>
> +/**
>
> + Returns the current value of the SMM register for the specified CPU.
>
> + If the SMM register is not supported, then 0 is returned.
>
> +
>
> + @param[in] CpuIndex The index of the CPU to read the SMM register.
> + The
>
> + value must be between 0 and the NumberOfCpus
> + field in
>
> + the System Management System Table (SMST).
>
> + @param[in] RegName Identifies the SMM register to read.
>
> +
>
> + @return The value of the SMM register specified by RegName from the
> + CPU
>
> + specified by CpuIndex.
>
> +**/
>
> +UINT64
>
> +EFIAPI
>
> +SmmCpuFeaturesGetSmmRegister (
>
> + IN UINTN CpuIndex,
>
> + IN SMM_REG_NAME RegName
>
> + )
>
> +{
>
> + return 0;
>
> +}
>
> +
>
> +/**
>
> + Sets the value of an SMM register on a specified CPU.
>
> + If the SMM register is not supported, then no action is performed.
>
> +
>
> + @param[in] CpuIndex The index of the CPU to write the SMM register.
> + The
>
> + value must be between 0 and the NumberOfCpus
> + field in
>
> + the System Management System Table (SMST).
>
> + @param[in] RegName Identifies the SMM register to write.
>
> + registers are read-only.
>
> + @param[in] Value The value to write to the SMM register.
>
> +**/
>
> +VOID
>
> +EFIAPI
>
> +SmmCpuFeaturesSetSmmRegister (
>
> + IN UINTN CpuIndex,
>
> + IN SMM_REG_NAME RegName,
>
> + IN UINT64 Value
>
> + )
>
> +{
>
> +}
>
> +
>
> +/**
>
> + Check to see if an SMM register is supported by a specified CPU.
>
> +
>
> + @param[in] CpuIndex The index of the CPU to check for SMM register
> support.
>
> + The value must be between 0 and the NumberOfCpus
> + field
>
> + in the System Management System Table (SMST).
>
> + @param[in] RegName Identifies the SMM register to check for support.
>
> +
>
> + @retval TRUE The SMM register specified by RegName is supported by
> the CPU
>
> + specified by CpuIndex.
>
> + @retval FALSE The SMM register specified by RegName is not supported
> + by the
>
> + CPU specified by CpuIndex.
>
> +**/
>
> +BOOLEAN
>
> +EFIAPI
>
> +SmmCpuFeaturesIsSmmRegisterSupported (
>
> + IN UINTN CpuIndex,
>
> + IN SMM_REG_NAME RegName
>
> + )
>
> +{
>
> + return FALSE;
>
> +}
>
> --
> 2.25.1
>
>
>
>
>
next prev parent reply other threads:[~2023-01-15 4:50 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-11 6:15 [PATCH v2 0/6] Adds AmdSmmCpuFeaturesLib Abdul Lateef Attar
2023-01-11 6:15 ` [PATCH v2 1/6] UefiCpuPkg/SmmCpuFeaturesLib: Restructure arch-dependent code Abdul Lateef Attar
2023-01-15 4:22 ` [edk2-devel] " Chang, Abner
2023-01-11 6:15 ` [PATCH v2 2/6] MdePkg: Adds AMD SMRAM save state map Abdul Lateef Attar
2023-01-14 15:24 ` [edk2-devel] " Chang, Abner
2023-01-11 6:15 ` [PATCH v2 3/6] UefiCpuPkg: Adds SmmSmramSaveStateLib library class Abdul Lateef Attar
2023-01-15 4:26 ` [edk2-devel] " Chang, Abner
2023-03-13 1:55 ` Ni, Ray
2023-01-11 6:15 ` [PATCH v2 4/6] UefiCpuPkg: Implements " Abdul Lateef Attar
2023-01-15 4:45 ` [edk2-devel] " Chang, Abner
2023-01-16 4:36 ` Attar, AbdulLateef (Abdul Lateef)
2023-01-16 5:44 ` Chang, Abner
2023-01-11 6:15 ` [PATCH v2 5/6] UefiCpuPkg: Initial implementation of AMD's SmmCpuFeaturesLib Abdul Lateef Attar
2023-01-15 4:50 ` Chang, Abner [this message]
2023-01-11 6:15 ` [PATCH v2 6/6] UefiCpuPkg: Implements SmmCpuFeaturesLib for AMD Family Abdul Lateef Attar
2023-01-15 4:52 ` Chang, Abner
2023-01-12 13:04 ` [edk2-devel] [PATCH v2 0/6] Adds AmdSmmCpuFeaturesLib Laszlo Ersek
2023-01-13 8:57 ` Ni, Ray
2023-01-13 15:24 ` Attar, AbdulLateef (Abdul Lateef)
2023-01-13 9:09 ` Chang, Abner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=MN2PR12MB39666F441DA59F40C61BA9CAEAC09@MN2PR12MB3966.namprd12.prod.outlook.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox