Due to the definition difference of SMRAM Save State,
SmmBase config in SMRAM Save State for AMD is also different.
This patch provides the AmdSmmRelocationLib library instance
to handle the SMRAM Save State difference.
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
---
...mmRelocationLib.inf => AmdSmmRelocationLib.inf} | 5 +-
...SaveStateConfig.c => AmdSmramSaveStateConfig.c} | 93 ++++++++++------------
UefiCpuPkg/UefiCpuPkg.dsc | 1 +
3 files changed, 46 insertions(+), 53 deletions(-)
copy UefiCpuPkg/Library/SmmRelocationLib/{SmmRelocationLib.inf => AmdSmmRelocationLib.inf} (89%)
copy UefiCpuPkg/Library/SmmRelocationLib/{SmramSaveStateConfig.c => AmdSmramSaveStateConfig.c} (50%)
diff --git a/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.inf b/UefiCpuPkg/Library/SmmRelocationLib/AmdSmmRelocationLib.inf
similarity index 89%
copy from UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.inf
copy to UefiCpuPkg/Library/SmmRelocationLib/AmdSmmRelocationLib.inf
index 6581fa2dad..710cd1948b 100644
--- a/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.inf
+++ b/UefiCpuPkg/Library/SmmRelocationLib/AmdSmmRelocationLib.inf
@@ -13,18 +13,18 @@
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = SmmRelocationLib
- FILE_GUID = 853E97B3-790C-4EA3-945C-8F622FC47FE8
+ FILE_GUID = 65C74DCD-0D09-494A-8BFF-A64226EB8054
MODULE_TYPE = PEIM
VERSION_STRING = 1.0
LIBRARY_CLASS = SmmRelocationLib
[Sources]
InternalSmmRelocationLib.h
- SmramSaveStateConfig.c
+ AmdSmramSaveStateConfig.c
SmmRelocationLib.c
[Sources.Ia32]
Ia32/Semaphore.c
Ia32/SmmInit.nasm
@@ -40,11 +40,10 @@
[LibraryClasses]
BaseLib
BaseMemoryLib
CpuExceptionHandlerLib
- CpuLib
DebugLib
HobLib
LocalApicLib
MemoryAllocationLib
PcdLib
diff --git a/UefiCpuPkg/Library/SmmRelocationLib/SmramSaveStateConfig.c b/UefiCpuPkg/Library/SmmRelocationLib/AmdSmramSaveStateConfig.c
similarity index 50%
copy from UefiCpuPkg/Library/SmmRelocationLib/SmramSaveStateConfig.c
copy to UefiCpuPkg/Library/SmmRelocationLib/AmdSmramSaveStateConfig.c
index fb69b2b5c5..95a1ce8d46 100644
--- a/UefiCpuPkg/Library/SmmRelocationLib/SmramSaveStateConfig.c
+++ b/UefiCpuPkg/Library/SmmRelocationLib/AmdSmramSaveStateConfig.c
@@ -1,14 +1,17 @@
/** @file
Config SMRAM Save State for SmmBases Relocation.
+ Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.<BR>
Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "InternalSmmRelocationLib.h"
-#include <Library/CpuLib.h>
+#include <Register/Amd/SmramSaveStateMap.h>
+
+#define EFER_ADDRESS 0XC0000080ul
/**
Determine the mode of the CPU at the time an SMI occurs
@retval EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT 32 bit.
@@ -18,44 +21,18 @@
UINT8
CheckMmSaveStateRegisterLma (
VOID
)
{
- CPUID_VERSION_INFO_EAX RegEax;
- CPUID_EXTENDED_CPU_SIG_EDX RegEdx;
- UINTN FamilyId;
- UINTN ModelId;
- UINT32 Eax;
- UINT8 SmmSaveStateRegisterLma;
-
- //
- // Determine the mode of the CPU at the time an SMI occurs
- // Intel(R) 64 and IA-32 Architectures Software Developer's Manual
- // Volume 3C, Section 34.4.1.1
- //
- RegEax.Uint32 = GetCpuFamilyModel ();
- FamilyId = RegEax.Bits.FamilyId;
- ModelId = RegEax.Bits.Model;
- if ((FamilyId == 0x06) || (FamilyId == 0x0f)) {
- ModelId = ModelId | RegEax.Bits.ExtendedModelId << 4;
- }
+ UINT8 SmmSaveStateRegisterLma;
+ UINT32 LMAValue;
- RegEdx.Uint32 = 0;
- AsmCpuid (CPUID_EXTENDED_FUNCTION, &Eax, NULL, NULL, NULL);
- if (Eax >= CPUID_EXTENDED_CPU_SIG) {
- AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &(RegEdx.Uint32));
- }
-
- SmmSaveStateRegisterLma = EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT;
- if (RegEdx.Bits.LM) {
- SmmSaveStateRegisterLma = EFI_MM_SAVE_STATE_REGISTER_LMA_64BIT;
- }
+ SmmSaveStateRegisterLma = EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT;
- if (FamilyId == 0x06) {
- if ((ModelId == 0x17) || (ModelId == 0x0f) || (ModelId == 0x1c)) {
- SmmSaveStateRegisterLma = EFI_MM_SAVE_STATE_REGISTER_LMA_64BIT;
- }
+ LMAValue = (UINT32)AsmReadMsr64 (EFER_ADDRESS) & LMA;
+ if (LMAValue) {
+ SmmSaveStateRegisterLma = EFI_SMM_SAVE_STATE_REGISTER_LMA_64BIT;
}
return SmmSaveStateRegisterLma;
}
@@ -73,18 +50,32 @@ EFIAPI
ConfigureSmBase (
IN UINTN CpuIndex,
IN OUT SMRAM_SAVE_STATE_MAP *CpuState
)
{
- CpuState->x86.SMBASE = (UINT32)mSmBaseForAllCpus[CpuIndex];
+ AMD_SMRAM_SAVE_STATE_MAP *AmdCpuState;
+
+ AmdCpuState = (AMD_SMRAM_SAVE_STATE_MAP *)CpuState;
+
+ AmdCpuState->x64.SMBASE = (UINT32)mSmBaseForAllCpus[CpuIndex];
}
/**
- Hook the code executed immediately after an RSM instruction on the currently
- executing CPU. The mode of code executed immediately after RSM must be
- detected, and the appropriate hook must be selected. Always clear the auto
- HALT restart flag if it is set.
+ This function updates the SMRAM save state on the currently executing CPU
+ to resume execution at a specific address after an RSM instruction. This
+ function must evaluate the SMRAM save state to determine the execution mode
+ the RSM instruction resumes and update the resume execution address with
+ either NewInstructionPointer32 or NewInstructionPoint. The auto HALT restart
+ flag in the SMRAM save state must always be cleared. This function returns
+ the value of the instruction pointer from the SMRAM save state that was
+ replaced. If this function returns 0, then the SMRAM save state was not
+ modified.
+
+ This function is called during the very first SMI on each CPU after
+ SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mode
+ to signal that the SMBASE of each CPU has been updated before the default
+ SMBASE address is used for the first SMI to the next CPU.
@param[in] CpuIndex The processor index for the currently
executing CPU.
@param[in,out] CpuState Pointer to SMRAM Save State Map for the
currently executing CPU.
@@ -103,37 +94,39 @@ HookReturnFromSmm (
IN OUT SMRAM_SAVE_STATE_MAP *CpuState,
IN UINT64 NewInstructionPointer32,
IN UINT64 NewInstructionPointer
)
{
- UINT64 OriginalInstructionPointer;
+ UINT64 OriginalInstructionPointer;
+ AMD_SMRAM_SAVE_STATE_MAP *AmdCpuState;
- if (CheckMmSaveStateRegisterLma () == EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT) {
- OriginalInstructionPointer = (UINT64)CpuState->x86._EIP;
- CpuState->x86._EIP = (UINT32)NewInstructionPointer;
+ AmdCpuState = (AMD_SMRAM_SAVE_STATE_MAP *)CpuState;
+ if (CheckMmSaveStateRegisterLma () == EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT) {
+ OriginalInstructionPointer = (UINT64)AmdCpuState->x86._EIP;
+ AmdCpuState->x86._EIP = (UINT32)NewInstructionPointer;
//
// Clear the auto HALT restart flag so the RSM instruction returns
// program control to the instruction following the HLT instruction.
//
- if ((CpuState->x86.AutoHALTRestart & BIT0) != 0) {
- CpuState->x86.AutoHALTRestart &= ~BIT0;
+ if ((AmdCpuState->x86.AutoHALTRestart & BIT0) != 0) {
+ AmdCpuState->x86.AutoHALTRestart &= ~BIT0;
}
} else {
- OriginalInstructionPointer = CpuState->x64._RIP;
- if ((CpuState->x64.IA32_EFER & LMA) == 0) {
- CpuState->x64._RIP = (UINT32)NewInstructionPointer32;
+ OriginalInstructionPointer = AmdCpuState->x64._RIP;
+ if ((AmdCpuState->x64.EFER & LMA) == 0) {
+ AmdCpuState->x64._RIP = (UINT32)NewInstructionPointer32;
} else {
- CpuState->x64._RIP = (UINT32)NewInstructionPointer;
+ AmdCpuState->x64._RIP = (UINT32)NewInstructionPointer;
}
//
// Clear the auto HALT restart flag so the RSM instruction returns
// program control to the instruction following the HLT instruction.
//
- if ((CpuState->x64.AutoHALTRestart & BIT0) != 0) {
- CpuState->x64.AutoHALTRestart &= ~BIT0;
+ if ((AmdCpuState->x64.AutoHALTRestart & BIT0) != 0) {
+ AmdCpuState->x64.AutoHALTRestart &= ~BIT0;
}
}
return OriginalInstructionPointer;
}
diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index dd2ad398c0..0c5fdcffde 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -195,10 +195,11 @@
}
UefiCpuPkg/Library/MmSaveStateLib/AmdMmSaveStateLib.inf
UefiCpuPkg/Library/MmSaveStateLib/IntelMmSaveStateLib.inf
UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.inf
UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.inf
+ UefiCpuPkg/Library/SmmRelocationLib/AmdSmmRelocationLib.inf
[Components.X64]
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/DxeCpuExceptionHandlerLibUnitTest.inf
[Components.RISCV64]
--
2.16.2.windows.1