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domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io --_000_MN6PR11MB82442144ACE23890C70E90C88CE22MN6PR11MB8244namp_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Ray Ni Thanks, Ray ________________________________ From: Tan, Dun Sent: Friday, May 10, 2024 18:08 To: devel@edk2.groups.io Cc: Ni, Ray ; Laszlo Ersek ; Kumar, Ra= hul R ; Gerd Hoffmann ; Wu, Jia= xin Subject: [PATCH 16/18] UefiCpuPkg:Remove code to wakeup AP and relocate ap After the code to load mtrr setting, set register table, handle APIC setting and Interrupt after INIT-SIPI-SIPI is moved, the InitializeCpuProcedure() only contains following code logic: 1.Bsp runs ExecuteFirstSmiInit(). 2.Bsp transfers AP to safe hlt-loop During S3 boot, since APs will be relocated to new safe buffer by the callback of gEdkiiEndOfS3ResumeGuid in PeiMpLib, Bsp doesn't need to transfer AP to safe hlt-loop any more. SmmRestoreCpu() in CpuS3 only needs to runs the ExecuteFirstSmiInit() on BSP. So remove code to wakeup AP by INIT-SIPI-SIPI and remove code to relocate ap to safe hlt-loop. Signed-off-by: Dun Tan Cc: Ray Ni Cc: Laszlo Ersek Cc: Rahul Kumar Cc: Gerd Hoffmann Cc: Jiaxin Wu --- UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 292 +++++++++-------------= ---------------------------------------------------------------------------= ---------------------------------------------------------------------------= ---------------------------------------------------------------------------= --------------------------------------------- UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.nasm | 153 ----------------------= ---------------------------------------------------------------------------= -------------------------------------------------------- UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c | 27 ----------------------= ----- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 3 --- UefiCpuPkg/PiSmmCpuDxeSmm/X64/MpFuncs.nasm | 189 ----------------------= ---------------------------------------------------------------------------= ---------------------------------------------------------------------------= ----------------- UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c | 28 ----------------------= ------ 6 files changed, 9 insertions(+), 683 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/= CpuS3.c index 65fe903fd3..e84bc14de0 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -8,30 +8,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include "PiSmmCpuDxeSmm.h" #include -#include - -#pragma pack(1) -typedef struct { - UINTN Lock; - VOID *StackStart; - UINTN StackSize; - VOID *ApFunction; - IA32_DESCRIPTOR GdtrProfile; - IA32_DESCRIPTOR IdtrProfile; - UINT32 BufferStart; - UINT32 Cr3; - UINTN InitializeFloatingPointUnitsAddress; -} MP_CPU_EXCHANGE_INFO; -#pragma pack() - -typedef struct { - UINT8 *RendezvousFunnelAddress; - UINTN PModeEntryOffset; - UINTN FlatJumpOffset; - UINTN Size; - UINTN LModeEntryOffset; - UINTN LongJumpOffset; -} MP_ASSEMBLY_ADDRESS_MAP; // // Flags used when program the register. @@ -44,31 +20,11 @@ typedef struct { // package level semap= hore. } PROGRAM_CPU_REGISTER_FLAGS; -// -// Signal that SMM BASE relocation is complete. -// -volatile BOOLEAN mInitApsAfterSmmBaseReloc; - -/** - Get starting address and size of the rendezvous entry for APs. - Information for fixing a jump instruction in the code is also returned. - - @param AddressMap Output buffer for address map information. -**/ -VOID * -EFIAPI -AsmGetAddressMap ( - MP_ASSEMBLY_ADDRESS_MAP *AddressMap - ); - #define LEGACY_REGION_SIZE (2 * 0x1000) #define LEGACY_REGION_BASE (0xA0000 - LEGACY_REGION_SIZE) -PROGRAM_CPU_REGISTER_FLAGS mCpuFlags; -ACPI_CPU_DATA mAcpiCpuData; -volatile UINT32 mNumberToFinish; -MP_CPU_EXCHANGE_INFO *mExchangeInfo; -BOOLEAN mRestoreSmmConfigurationInS3 =3D FALSE; +ACPI_CPU_DATA mAcpiCpuData; +BOOLEAN mRestoreSmmConfigurationInS3 =3D FALSE; // // S3 boot flag @@ -82,191 +38,6 @@ SMM_S3_RESUME_STATE *mSmmS3ResumeState =3D NULL; BOOLEAN mAcpiS3Enable =3D TRUE; -UINT8 *mApHltLoopCode =3D NULL; -UINT8 mApHltLoopCodeTemplate[] =3D { - 0x8B, 0x44, 0x24, 0x04, // mov eax, dword ptr [esp+4] - 0xF0, 0xFF, 0x08, // lock dec dword ptr [eax] - 0xFA, // cli - 0xF4, // hlt - 0xEB, 0xFC // jmp $-2 -}; - -/** - The function is invoked before SMBASE relocation in S3 path to restores = CPU status. - - The function is invoked before SMBASE relocation in S3 path. It does fir= st time microcode load - and restores MTRRs for both BSP and APs. - - @param IsBsp The CPU this function executes on is BSP or not. - -**/ -VOID -InitializeCpuBeforeRebase ( - IN BOOLEAN IsBsp - ) -{ - // - // Count down the number with lock mechanism. - // - InterlockedDecrement (&mNumberToFinish); - - if (IsBsp) { - // - // Bsp wait here till all AP finish the initialization before rebase - // - while (mNumberToFinish > 0) { - CpuPause (); - } - } -} - -/** - The function is invoked after SMBASE relocation in S3 path to restores C= PU status. - - The function is invoked after SMBASE relocation in S3 path. It restores = configuration according to - data saved by normal boot path for both BSP and APs. - - @param IsBsp The CPU this function executes on is BSP or not. - -**/ -VOID -InitializeCpuAfterRebase ( - IN BOOLEAN IsBsp - ) -{ - UINTN TopOfStack; - UINT8 Stack[128]; - - if (mSmmS3ResumeState->MpService2Ppi =3D=3D 0) { - if (IsBsp) { - while (mNumberToFinish > 0) { - CpuPause (); - } - } else { - // - // Place AP into the safe code, count down the number with lock mech= anism in the safe code. - // - TopOfStack =3D (UINTN)Stack + sizeof (Stack); - TopOfStack &=3D ~(UINTN)(CPU_STACK_ALIGNMENT - 1); - CopyMem ((VOID *)(UINTN)mApHltLoopCode, mApHltLoopCodeTemplate, size= of (mApHltLoopCodeTemplate)); - TransferApToSafeState ((UINTN)mApHltLoopCode, TopOfStack, (UINTN)&mN= umberToFinish); - } - } -} - -/** - Cpu initialization procedure. - - @param[in,out] Buffer The pointer to private data buffer. - -**/ -VOID -EFIAPI -InitializeCpuProcedure ( - IN OUT VOID *Buffer - ) -{ - BOOLEAN IsBsp; - - IsBsp =3D (BOOLEAN)(mBspApicId =3D=3D GetApicId ()); - - // - // Skip initialization if mAcpiCpuData is not valid - // - if (mAcpiCpuData.NumberOfCpus > 0) { - // - // First time microcode load and restore MTRRs - // - InitializeCpuBeforeRebase (IsBsp); - } - - if (IsBsp) { - // - // Issue SMI IPI (All Excluding Self SMM IPI + BSP SMM IPI) to execut= e first SMI init. - // - ExecuteFirstSmiInit (); - } - - // - // Skip initialization if mAcpiCpuData is not valid - // - if (mAcpiCpuData.NumberOfCpus > 0) { - if (IsBsp) { - // - // mNumberToFinish should be set before AP executes InitializeCpuAft= erRebase() - // - mNumberToFinish =3D (UINT32)(mNumberOfCpus - 1); - // - // Signal that SMM base relocation is complete and to continue initi= alization for all APs. - // - mInitApsAfterSmmBaseReloc =3D TRUE; - } else { - // - // AP Wait for BSP to signal SMM Base relocation done. - // - while (!mInitApsAfterSmmBaseReloc) { - CpuPause (); - } - } - - // - // Restore MSRs for BSP and all APs - // - InitializeCpuAfterRebase (IsBsp); - } -} - -/** - Prepares startup vector for APs. - - This function prepares startup vector for APs. - - @param WorkingBuffer The address of the work buffer. -**/ -VOID -PrepareApStartupVector ( - EFI_PHYSICAL_ADDRESS WorkingBuffer - ) -{ - EFI_PHYSICAL_ADDRESS StartupVector; - MP_ASSEMBLY_ADDRESS_MAP AddressMap; - - // - // Get the address map of startup code for AP, - // including code size, and offset of long jump instructions to redirect= . - // - ZeroMem (&AddressMap, sizeof (AddressMap)); - AsmGetAddressMap (&AddressMap); - - StartupVector =3D WorkingBuffer; - - // - // Copy AP startup code to startup vector, and then redirect the long ju= mp - // instructions for mode switching. - // - CopyMem ((VOID *)(UINTN)StartupVector, AddressMap.RendezvousFunnelAddres= s, AddressMap.Size); - *(UINT32 *)(UINTN)(StartupVector + AddressMap.FlatJumpOffset + 3) =3D (U= INT32)(StartupVector + AddressMap.PModeEntryOffset); - if (AddressMap.LongJumpOffset !=3D 0) { - *(UINT32 *)(UINTN)(StartupVector + AddressMap.LongJumpOffset + 2) =3D = (UINT32)(StartupVector + AddressMap.LModeEntryOffset); - } - - // - // Get the start address of exchange data between BSP and AP. - // - mExchangeInfo =3D (MP_CPU_EXCHANGE_INFO *)(UINTN)(StartupVector + Addres= sMap.Size); - ZeroMem ((VOID *)mExchangeInfo, sizeof (MP_CPU_EXCHANGE_INFO)); - - CopyMem ((VOID *)(UINTN)&mExchangeInfo->GdtrProfile, (VOID *)(UINTN)mAcp= iCpuData.GdtrProfile, sizeof (IA32_DESCRIPTOR)); - CopyMem ((VOID *)(UINTN)&mExchangeInfo->IdtrProfile, (VOID *)(UINTN)mAcp= iCpuData.IdtrProfile, sizeof (IA32_DESCRIPTOR)); - - mExchangeInfo->StackStart =3D (VOID *)(UINTN)mA= cpiCpuData.StackAddress; - mExchangeInfo->StackSize =3D mAcpiCpuData.Stac= kSize; - mExchangeInfo->BufferStart =3D (UINT32)StartupVe= ctor; - mExchangeInfo->Cr3 =3D (UINT32)(AsmReadC= r3 ()); - mExchangeInfo->InitializeFloatingPointUnitsAddress =3D (UINTN)Initialize= FloatingPointUnits; - mExchangeInfo->ApFunction =3D (VOID *)(UINTN)In= itializeCpuProcedure; -} - /** Restore SMM Configuration in S3 boot path. @@ -315,12 +86,11 @@ SmmRestoreCpu ( VOID ) { - SMM_S3_RESUME_STATE *SmmS3ResumeState; - IA32_DESCRIPTOR Ia32Idtr; - IA32_DESCRIPTOR X64Idtr; - IA32_IDT_GATE_DESCRIPTOR IdtEntryTable[EXCEPTION_VECTOR_NUMBER]; - EFI_STATUS Status; - EDKII_PEI_MP_SERVICES2_PPI *Mp2ServicePpi; + SMM_S3_RESUME_STATE *SmmS3ResumeState; + IA32_DESCRIPTOR Ia32Idtr; + IA32_DESCRIPTOR X64Idtr; + IA32_IDT_GATE_DESCRIPTOR IdtEntryTable[EXCEPTION_VECTOR_NUMBER]; + EFI_STATUS Status; DEBUG ((DEBUG_INFO, "SmmRestoreCpu()\n")); @@ -369,38 +139,10 @@ SmmRestoreCpu ( } } - mBspApicId =3D GetApicId (); // - // Skip AP initialization if mAcpiCpuData is not valid + // Issue SMI IPI (All Excluding Self SMM IPI + BSP SMM IPI) to execute = first SMI init. // - if (mAcpiCpuData.NumberOfCpus > 0) { - if (FeaturePcdGet (PcdCpuHotPlugSupport)) { - ASSERT (mNumberOfCpus <=3D mAcpiCpuData.NumberOfCpus); - } else { - ASSERT (mNumberOfCpus =3D=3D mAcpiCpuData.NumberOfCpus); - } - - mNumberToFinish =3D (UINT32)mNumberOfCpus; - - // - // Execute code for before SmmBaseReloc. Note: This flag is maintained= across S3 boots. - // - mInitApsAfterSmmBaseReloc =3D FALSE; - - if (mSmmS3ResumeState->MpService2Ppi !=3D 0) { - Mp2ServicePpi =3D (EDKII_PEI_MP_SERVICES2_PPI *)(UINTN)mSmmS3ResumeS= tate->MpService2Ppi; - Mp2ServicePpi->StartupAllCPUs (Mp2ServicePpi, InitializeCpuProcedure= , 0, NULL); - } else { - PrepareApStartupVector (mAcpiCpuData.StartupVector); - // - // Send INIT IPI - SIPI to all APs - // - SendInitSipiSipiAllExcludingSelf ((UINT32)mAcpiCpuData.StartupVector= ); - InitializeCpuProcedure (NULL); - } - } else { - InitializeCpuProcedure (NULL); - } + ExecuteFirstSmiInit (); // // Set a flag to restore SMM configuration in S3 path. @@ -471,8 +213,6 @@ InitSmmS3ResumeState ( VOID *GuidHob; EFI_SMRAM_DESCRIPTOR *SmramDescriptor; SMM_S3_RESUME_STATE *SmmS3ResumeState; - EFI_PHYSICAL_ADDRESS Address; - EFI_STATUS Status; if (!mAcpiS3Enable) { return; @@ -524,20 +264,6 @@ InitSmmS3ResumeState ( // InitSmmS3Cr3 (); } - - // - // Allocate safe memory in ACPI NVS for AP to execute hlt loop in - // protected mode on S3 path - // - Address =3D BASE_4GB - 1; - Status =3D gBS->AllocatePages ( - AllocateMaxAddress, - EfiACPIMemoryNVS, - EFI_SIZE_TO_PAGES (sizeof (mApHltLoopCodeTemplate)), - &Address - ); - ASSERT_EFI_ERROR (Status); - mApHltLoopCode =3D (UINT8 *)(UINTN)Address; } /** diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.nasm b/UefiCpuPkg/PiSmm= CpuDxeSmm/Ia32/MpFuncs.nasm deleted file mode 100644 index dbd1418c0d..0000000000 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.nasm +++ /dev/null @@ -1,153 +0,0 @@ -;-------------------------------------------------------------------------= ----- ; -; Copyright (c) 2016, Intel Corporation. All rights reserved.
-; SPDX-License-Identifier: BSD-2-Clause-Patent -; -; Module Name: -; -; MpFuncs.nasm -; -; Abstract: -; -; This is the assembly code for Multi-processor S3 support -; -;-------------------------------------------------------------------------= ------ - -SECTION .text - -extern ASM_PFX(InitializeFloatingPointUnits) - -%define VacantFlag 0x0 -%define NotVacantFlag 0xff - -%define LockLocation RendezvousFunnelProcEnd - RendezvousFunnelProcStart -%define StackStart LockLocation + 0x4 -%define StackSize LockLocation + 0x8 -%define RendezvousProc LockLocation + 0xC -%define GdtrProfile LockLocation + 0x10 -%define IdtrProfile LockLocation + 0x16 -%define BufferStart LockLocation + 0x1C - -;-------------------------------------------------------------------------= ------------ -;RendezvousFunnelProc procedure follows. All APs execute their procedure.= This -;procedure serializes all the AP processors through an Init sequence. It m= ust be -;noted that APs arrive here very raw...ie: real mode, no stack. -;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PR= OC -;IS IN MACHINE CODE. -;-------------------------------------------------------------------------= ------------ -;RendezvousFunnelProc (&WakeUpBuffer,MemAddress); - -BITS 16 -global ASM_PFX(RendezvousFunnelProc) -ASM_PFX(RendezvousFunnelProc): -RendezvousFunnelProcStart: - -; At this point CS =3D 0x(vv00) and ip=3D 0x0. - - mov ax, cs - mov ds, ax - mov es, ax - mov ss, ax - xor ax, ax - mov fs, ax - mov gs, ax - -flat32Start: - - mov si, BufferStart - mov edx,dword [si] ; EDX is keeping the start addr= ess of wakeup buffer - - mov si, GdtrProfile -o32 lgdt [cs:si] - - mov si, IdtrProfile -o32 lidt [cs:si] - - xor ax, ax - mov ds, ax - - mov eax, cr0 ; Get control register 0 - or eax, 0x000000001 ; Set PE bit (bit #0) - mov cr0, eax - -FLAT32_JUMP: - -a32 jmp dword 0x20:0x0 - -BITS 32 -PMODE_ENTRY: ; protected mode entry point - - mov ax, 0x8 -o16 mov ds, ax -o16 mov es, ax -o16 mov fs, ax -o16 mov gs, ax -o16 mov ss, ax ; Flat mode setup. - - mov esi, edx - - mov edi, esi - add edi, LockLocation - mov al, NotVacantFlag -TestLock: - xchg byte [edi], al - cmp al, NotVacantFlag - jz TestLock - -ProgramStack: - - mov edi, esi - add edi, StackSize - mov eax, dword [edi] - mov edi, esi - add edi, StackStart - add eax, dword [edi] - mov esp, eax - mov dword [edi], eax - -Releaselock: - - mov al, VacantFlag - mov edi, esi - add edi, LockLocation - xchg byte [edi], al - - ; - ; Call assembly function to initialize FPU. - ; - mov ebx, ASM_PFX(InitializeFloatingPointUnits) - call ebx - ; - ; Call C Function - ; - mov edi, esi - add edi, RendezvousProc - mov eax, dword [edi] - - test eax, eax - jz GoToSleep - call eax ; Call C function - -GoToSleep: - cli - hlt - jmp $-2 - -RendezvousFunnelProcEnd: -;-------------------------------------------------------------------------= ------------ -; AsmGetAddressMap (&AddressMap); -;-------------------------------------------------------------------------= ------------ -global ASM_PFX(AsmGetAddressMap) -ASM_PFX(AsmGetAddressMap): - - pushad - mov ebp,esp - - mov ebx, dword [ebp+0x24] - mov dword [ebx], RendezvousFunnelProcStart - mov dword [ebx+0x4], PMODE_ENTRY - RendezvousFunnelProcSta= rt - mov dword [ebx+0x8], FLAT32_JUMP - RendezvousFunnelProcSta= rt - mov dword [ebx+0xc], RendezvousFunnelProcEnd - RendezvousF= unnelProcStart - - popad - ret - diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c b/UefiCpuPkg/PiS= mmCpuDxeSmm/Ia32/SmmFuncsArch.c index 636dc8d92f..6a701dd88d 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c @@ -141,33 +141,6 @@ InitGdt ( return GdtTssTables; } -/** - Transfer AP to safe hlt-loop after it finished restore CPU features on S= 3 patch. - - @param[in] ApHltLoopCode The address of the safe hlt-loop funct= ion. - @param[in] TopOfStack A pointer to the new stack to use for = the ApHltLoopCode. - @param[in] NumberToFinishAddress Address of Semaphore of APs finish cou= nt. - -**/ -VOID -TransferApToSafeState ( - IN UINTN ApHltLoopCode, - IN UINTN TopOfStack, - IN UINTN NumberToFinishAddress - ) -{ - SwitchStack ( - (SWITCH_STACK_ENTRY_POINT)ApHltLoopCode, - (VOID *)NumberToFinishAddress, - NULL, - (VOID *)TopOfStack - ); - // - // It should never reach here - // - ASSERT (FALSE); -} - /** Initialize the shadow stack related data structure. diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf b/UefiCpuPkg/PiSm= mCpuDxeSmm/PiSmmCpuDxeSmm.inf index 3354f94a64..f83579025b 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf @@ -53,7 +53,6 @@ Ia32/SmmProfileArch.h Ia32/SmiEntry.nasm Ia32/SmiException.nasm - Ia32/MpFuncs.nasm Ia32/Cet.nasm [Sources.X64] @@ -63,7 +62,6 @@ X64/SmmProfileArch.h X64/SmiEntry.nasm X64/SmiException.nasm - X64/MpFuncs.nasm X64/Cet.nasm [Packages] @@ -136,7 +134,6 @@ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileSize ## SOME= TIMES_CONSUMES gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize ## CONS= UMES gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout ## CONS= UMES - gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress ## SOME= TIMES_CONSUMES gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress ## SOME= TIMES_PRODUCES gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable ## CONS= UMES gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode ## CONS= UMES diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/MpFuncs.nasm b/UefiCpuPkg/PiSmmC= puDxeSmm/X64/MpFuncs.nasm deleted file mode 100644 index a12538f72b..0000000000 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/MpFuncs.nasm +++ /dev/null @@ -1,189 +0,0 @@ -;-------------------------------------------------------------------------= ----- ; -; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
-; SPDX-License-Identifier: BSD-2-Clause-Patent -; -; Module Name: -; -; MpFuncs.nasm -; -; Abstract: -; -; This is the assembly code for Multi-processor S3 support -; -;-------------------------------------------------------------------------= ------ - -%define VacantFlag 0x0 -%define NotVacantFlag 0xff - -%define LockLocation RendezvousFunnelProcEnd - RendezvousFunnelProcStart -%define StackStartAddressLocation LockLocation + 0x8 -%define StackSizeLocation LockLocation + 0x10 -%define CProcedureLocation LockLocation + 0x18 -%define GdtrLocation LockLocation + 0x20 -%define IdtrLocation LockLocation + 0x2A -%define BufferStartLocation LockLocation + 0x34 -%define Cr3OffsetLocation LockLocation + 0x38 -%define InitializeFloatingPointUnitsAddress LockLocation + 0x3C - -;-------------------------------------------------------------------------= ------------ -;RendezvousFunnelProc procedure follows. All APs execute their procedure.= This -;procedure serializes all the AP processors through an Init sequence. It m= ust be -;noted that APs arrive here very raw...ie: real mode, no stack. -;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PR= OC -;IS IN MACHINE CODE. -;-------------------------------------------------------------------------= ------------ -;RendezvousFunnelProc (&WakeUpBuffer,MemAddress); - -;text SEGMENT -DEFAULT REL -SECTION .text - -BITS 16 -global ASM_PFX(RendezvousFunnelProc) -ASM_PFX(RendezvousFunnelProc): -RendezvousFunnelProcStart: - -; At this point CS =3D 0x(vv00) and ip=3D 0x0. - - mov ax, cs - mov ds, ax - mov es, ax - mov ss, ax - xor ax, ax - mov fs, ax - mov gs, ax - -flat32Start: - - mov si, BufferStartLocation - mov edx,dword [si] ; EDX is keeping the start addr= ess of wakeup buffer - - mov si, Cr3OffsetLocation - mov ecx,dword [si] ; ECX is keeping the value of C= R3 - - mov si, GdtrLocation -o32 lgdt [cs:si] - - mov si, IdtrLocation -o32 lidt [cs:si] - - xor ax, ax - mov ds, ax - - mov eax, cr0 ; Get control register 0 - or eax, 0x000000001 ; Set PE bit (bit #0) - mov cr0, eax - -FLAT32_JUMP: - -a32 jmp dword 0x20:0x0 - -BITS 32 -PMODE_ENTRY: ; protected mode entry point - - mov ax, 0x18 -o16 mov ds, ax -o16 mov es, ax -o16 mov fs, ax -o16 mov gs, ax -o16 mov ss, ax ; Flat mode setup. - - mov eax, cr4 - bts eax, 5 - mov cr4, eax - - mov cr3, ecx - - mov esi, edx ; Save wakeup buffer addres= s - - mov ecx, 0xc0000080 ; EFER MSR number. - rdmsr ; Read EFER. - bts eax, 8 ; Set LME=3D1. - wrmsr ; Write EFER. - - mov eax, cr0 ; Read CR0. - bts eax, 31 ; Set PG=3D1. - mov cr0, eax ; Write CR0. - -LONG_JUMP: - -a16 jmp dword 0x38:0x0 - -BITS 64 -LongModeStart: - - mov ax, 0x30 -o16 mov ds, ax -o16 mov es, ax -o16 mov ss, ax - - mov edi, esi - add edi, LockLocation - mov al, NotVacantFlag -TestLock: - xchg byte [edi], al - cmp al, NotVacantFlag - jz TestLock - -ProgramStack: - - mov edi, esi - add edi, StackSizeLocation - mov rax, qword [edi] - mov edi, esi - add edi, StackStartAddressLocation - add rax, qword [edi] - mov rsp, rax - mov qword [edi], rax - -Releaselock: - - mov al, VacantFlag - mov edi, esi - add edi, LockLocation - xchg byte [edi], al - - ; - ; Call assembly function to initialize FPU. - ; - mov rax, qword [esi + InitializeFloatingPointUnitsAddress] - sub rsp, 0x20 - call rax - add rsp, 0x20 - - ; - ; Call C Function - ; - mov edi, esi - add edi, CProcedureLocation - mov rax, qword [edi] - - test rax, rax - jz GoToSleep - - sub rsp, 0x20 - call rax - add rsp, 0x20 - -GoToSleep: - cli - hlt - jmp $-2 - -RendezvousFunnelProcEnd: - -;-------------------------------------------------------------------------= ------------ -; AsmGetAddressMap (&AddressMap); -;-------------------------------------------------------------------------= ------------ -; comments here for definition of address map -global ASM_PFX(AsmGetAddressMap) -ASM_PFX(AsmGetAddressMap): - lea rax, [RendezvousFunnelProcStart] - mov qword [rcx], rax - mov qword [rcx+0x8], PMODE_ENTRY - RendezvousFunnelProcSta= rt - mov qword [rcx+0x10], FLAT32_JUMP - RendezvousFunnelProcSt= art - mov qword [rcx+0x18], RendezvousFunnelProcEnd - Rendezvous= FunnelProcStart - mov qword [rcx+0x20], LongModeStart - RendezvousFunnelProc= Start - mov qword [rcx+0x28], LONG_JUMP - RendezvousFunnelProcStar= t - ret - diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c b/UefiCpuPkg/PiSm= mCpuDxeSmm/X64/SmmFuncsArch.c index c4f21e2155..3b1c37de8c 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c @@ -132,34 +132,6 @@ GetProtectedModeCS ( return Index * 8; } -/** - Transfer AP to safe hlt-loop after it finished restore CPU features on S= 3 patch. - - @param[in] ApHltLoopCode The address of the safe hlt-loop funct= ion. - @param[in] TopOfStack A pointer to the new stack to use for = the ApHltLoopCode. - @param[in] NumberToFinishAddress Address of Semaphore of APs finish cou= nt. - -**/ -VOID -TransferApToSafeState ( - IN UINTN ApHltLoopCode, - IN UINTN TopOfStack, - IN UINTN NumberToFinishAddress - ) -{ - AsmDisablePaging64 ( - GetProtectedModeCS (), - (UINT32)ApHltLoopCode, - (UINT32)NumberToFinishAddress, - 0, - (UINT32)TopOfStack - ); - // - // It should never reach here - // - ASSERT (FALSE); -} - /** Initialize the shadow stack related data structure. -- 2.31.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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Reviewed-by: Ray Ni <ray.ni@intel.com>

Thanks,
Ray
From: Tan, Dun <dun.tan@= intel.com>
Sent: Friday, May 10, 2024 18:08
To: devel@edk2.groups.io <devel@edk2.groups.io>
Cc: Ni, Ray <ray.ni@intel.com>; Laszlo Ersek <lersek@redhat= .com>; Kumar, Rahul R <rahul.r.kumar@intel.com>; Gerd Hoffmann <= ;kraxel@redhat.com>; Wu, Jiaxin <jiaxin.wu@intel.com>
Subject: [PATCH 16/18] UefiCpuPkg:Remove code to wakeup AP and reloc= ate ap
 
After the code to load mtrr setting, set register = table,
handle APIC setting and Interrupt after INIT-SIPI-SIPI
is moved, the InitializeCpuProcedure() only contains
following code logic:
1.Bsp runs ExecuteFirstSmiInit().
2.Bsp transfers AP to safe hlt-loop

During S3 boot, since APs will be relocated to new safe
buffer by the callback of gEdkiiEndOfS3ResumeGuid in
PeiMpLib, Bsp doesn't need to transfer AP to safe hlt-loop
any more. SmmRestoreCpu() in CpuS3 only needs to runs the
ExecuteFirstSmiInit() on BSP. So remove code to wakeup
AP by INIT-SIPI-SIPI and remove code to relocate ap to
safe hlt-loop.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
---
 UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c      =        | 292 +++++++++-----------------------= ---------------------------------------------------------------------------= ---------------------------------------------------------------------------= ---------------------------------------------------------------------------= -----------------------------------
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.nasm   | 153 -------= ---------------------------------------------------------------------------= -----------------------------------------------------------------------
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c |  27 ------------= ---------------
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf  |   3 --= -
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/MpFuncs.nasm    | 189 --= ---------------------------------------------------------------------------= ---------------------------------------------------------------------------= -------------------------------------
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c  |  28 -------= ---------------------
 6 files changed, 9 insertions(+), 683 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/= CpuS3.c
index 65fe903fd3..e84bc14de0 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -8,30 +8,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 
 #include "PiSmmCpuDxeSmm.h"
 #include <PiPei.h>
-#include <Ppi/MpServices2.h>
-
-#pragma pack(1)
-typedef struct {
-  UINTN          &n= bsp;   Lock;
-  VOID          &nb= sp;    *StackStart;
-  UINTN          &n= bsp;   StackSize;
-  VOID          &nb= sp;    *ApFunction;
-  IA32_DESCRIPTOR    GdtrProfile;
-  IA32_DESCRIPTOR    IdtrProfile;
-  UINT32          &= nbsp;  BufferStart;
-  UINT32          &= nbsp;  Cr3;
-  UINTN          &n= bsp;   InitializeFloatingPointUnitsAddress;
-} MP_CPU_EXCHANGE_INFO;
-#pragma pack()
-
-typedef struct {
-  UINT8    *RendezvousFunnelAddress;
-  UINTN    PModeEntryOffset;
-  UINTN    FlatJumpOffset;
-  UINTN    Size;
-  UINTN    LModeEntryOffset;
-  UINTN    LongJumpOffset;
-} MP_ASSEMBLY_ADDRESS_MAP;
 
 //
 // Flags used when program the register.
@@ -44,31 +20,11 @@ typedef struct {
            &nb= sp;            =             &nb= sp;            =    // package level semaphore.
 } PROGRAM_CPU_REGISTER_FLAGS;
 
-//
-// Signal that SMM BASE relocation is complete.
-//
-volatile BOOLEAN  mInitApsAfterSmmBaseReloc;
-
-/**
-  Get starting address and size of the rendezvous entry for APs.
-  Information for fixing a jump instruction in the code is also retur= ned.
-
-  @param AddressMap  Output buffer for address map information.<= br> -**/
-VOID *
-EFIAPI
-AsmGetAddressMap (
-  MP_ASSEMBLY_ADDRESS_MAP  *AddressMap
-  );
-
 #define LEGACY_REGION_SIZE  (2 * 0x1000)
 #define LEGACY_REGION_BASE  (0xA0000 - LEGACY_REGION_SIZE)
 
-PROGRAM_CPU_REGISTER_FLAGS  mCpuFlags;
-ACPI_CPU_DATA          &= nbsp;    mAcpiCpuData;
-volatile UINT32          = ;   mNumberToFinish;
-MP_CPU_EXCHANGE_INFO        *mExchangeI= nfo;
-BOOLEAN           &= nbsp;         mRestoreSmmConfigurat= ionInS3 =3D FALSE;
+ACPI_CPU_DATA  mAcpiCpuData;
+BOOLEAN        mRestoreSmmConfiguration= InS3 =3D FALSE;
 
 //
 // S3 boot flag
@@ -82,191 +38,6 @@ SMM_S3_RESUME_STATE  *mSmmS3ResumeState =3D NULL;<= br>  
 BOOLEAN  mAcpiS3Enable =3D TRUE;
 
-UINT8  *mApHltLoopCode        = ;  =3D NULL;
-UINT8  mApHltLoopCodeTemplate[] =3D {
-  0x8B, 0x44, 0x24, 0x04, // mov  eax, dword ptr [esp+4]
-  0xF0, 0xFF, 0x08,       // lock dec&n= bsp; dword ptr [eax]
-  0xFA,          &n= bsp;        // cli
-  0xF4,          &n= bsp;        // hlt
-  0xEB, 0xFC         &nb= sp;    // jmp $-2
-};
-
-/**
-  The function is invoked before SMBASE relocation in S3 path to rest= ores CPU status.
-
-  The function is invoked before SMBASE relocation in S3 path. It doe= s first time microcode load
-  and restores MTRRs for both BSP and APs.
-
-  @param   IsBsp   The CPU this function executes= on is BSP or not.
-
-**/
-VOID
-InitializeCpuBeforeRebase (
-  IN BOOLEAN  IsBsp
-  )
-{
-  //
-  // Count down the number with lock mechanism.
-  //
-  InterlockedDecrement (&mNumberToFinish);
-
-  if (IsBsp) {
-    //
-    // Bsp wait here till all AP finish the initialization = before rebase
-    //
-    while (mNumberToFinish > 0) {
-      CpuPause ();
-    }
-  }
-}
-
-/**
-  The function is invoked after SMBASE relocation in S3 path to resto= res CPU status.
-
-  The function is invoked after SMBASE relocation in S3 path. It rest= ores configuration according to
-  data saved by normal boot path for both BSP and APs.
-
-  @param   IsBsp   The CPU this function executes= on is BSP or not.
-
-**/
-VOID
-InitializeCpuAfterRebase (
-  IN BOOLEAN  IsBsp
-  )
-{
-  UINTN  TopOfStack;
-  UINT8  Stack[128];
-
-  if (mSmmS3ResumeState->MpService2Ppi =3D=3D 0) {
-    if (IsBsp) {
-      while (mNumberToFinish > 0) {
-        CpuPause ();
-      }
-    } else {
-      //
-      // Place AP into the safe code, count down = the number with lock mechanism in the safe code.
-      //
-      TopOfStack  =3D (UINTN)Stack + sizeof = (Stack);
-      TopOfStack &=3D ~(UINTN)(CPU_STACK_ALIG= NMENT - 1);
-      CopyMem ((VOID *)(UINTN)mApHltLoopCode, mAp= HltLoopCodeTemplate, sizeof (mApHltLoopCodeTemplate));
-      TransferApToSafeState ((UINTN)mApHltLoopCod= e, TopOfStack, (UINTN)&mNumberToFinish);
-    }
-  }
-}
-
-/**
-  Cpu initialization procedure.
-
-  @param[in,out] Buffer  The pointer to private data buffer.
-
-**/
-VOID
-EFIAPI
-InitializeCpuProcedure (
-  IN OUT VOID  *Buffer
-  )
-{
-  BOOLEAN  IsBsp;
-
-  IsBsp =3D  (BOOLEAN)(mBspApicId =3D=3D GetApicId ());
-
-  //
-  // Skip initialization if mAcpiCpuData is not valid
-  //
-  if (mAcpiCpuData.NumberOfCpus > 0) {
-    //
-    // First time microcode load and restore MTRRs
-    //
-    InitializeCpuBeforeRebase (IsBsp);
-  }
-
-  if (IsBsp) {
-    //
-    // Issue SMI IPI (All Excluding  Self SMM IPI + BS= P SMM IPI) to execute first SMI init.
-    //
-    ExecuteFirstSmiInit ();
-  }
-
-  //
-  // Skip initialization if mAcpiCpuData is not valid
-  //
-  if (mAcpiCpuData.NumberOfCpus > 0) {
-    if (IsBsp) {
-      //
-      // mNumberToFinish should be set before AP = executes InitializeCpuAfterRebase()
-      //
-      mNumberToFinish =3D (UINT32)(mNumberOfCpus = - 1);
-      //
-      // Signal that SMM base relocation is compl= ete and to continue initialization for all APs.
-      //
-      mInitApsAfterSmmBaseReloc =3D TRUE;
-    } else {
-      //
-      // AP Wait for BSP to signal SMM Base reloc= ation done.
-      //
-      while (!mInitApsAfterSmmBaseReloc) {
-        CpuPause ();
-      }
-    }
-
-    //
-    // Restore MSRs for BSP and all APs
-    //
-    InitializeCpuAfterRebase (IsBsp);
-  }
-}
-
-/**
-  Prepares startup vector for APs.
-
-  This function prepares startup vector for APs.
-
-  @param  WorkingBuffer  The address of the work buffer. -**/
-VOID
-PrepareApStartupVector (
-  EFI_PHYSICAL_ADDRESS  WorkingBuffer
-  )
-{
-  EFI_PHYSICAL_ADDRESS     StartupVector;
-  MP_ASSEMBLY_ADDRESS_MAP  AddressMap;
-
-  //
-  // Get the address map of startup code for AP,
-  // including code size, and offset of long jump instructions to red= irect.
-  //
-  ZeroMem (&AddressMap, sizeof (AddressMap));
-  AsmGetAddressMap (&AddressMap);
-
-  StartupVector =3D WorkingBuffer;
-
-  //
-  // Copy AP startup code to startup vector, and then redirect the lo= ng jump
-  // instructions for mode switching.
-  //
-  CopyMem ((VOID *)(UINTN)StartupVector, AddressMap.RendezvousFunnelA= ddress, AddressMap.Size);
-  *(UINT32 *)(UINTN)(StartupVector + AddressMap.FlatJumpOffset + 3) = =3D (UINT32)(StartupVector + AddressMap.PModeEntryOffset);
-  if (AddressMap.LongJumpOffset !=3D 0) {
-    *(UINT32 *)(UINTN)(StartupVector + AddressMap.LongJumpO= ffset + 2) =3D (UINT32)(StartupVector + AddressMap.LModeEntryOffset);
-  }
-
-  //
-  // Get the start address of exchange data between BSP and AP.
-  //
-  mExchangeInfo =3D (MP_CPU_EXCHANGE_INFO *)(UINTN)(StartupVector + A= ddressMap.Size);
-  ZeroMem ((VOID *)mExchangeInfo, sizeof (MP_CPU_EXCHANGE_INFO));
-
-  CopyMem ((VOID *)(UINTN)&mExchangeInfo->GdtrProfile, (VOID *= )(UINTN)mAcpiCpuData.GdtrProfile, sizeof (IA32_DESCRIPTOR));
-  CopyMem ((VOID *)(UINTN)&mExchangeInfo->IdtrProfile, (VOID *= )(UINTN)mAcpiCpuData.IdtrProfile, sizeof (IA32_DESCRIPTOR));
-
-  mExchangeInfo->StackStart      &nb= sp;            =        =3D (VOID *)(UINTN)mAcpiCpuData.StackA= ddress;
-  mExchangeInfo->StackSize      &nbs= p;            &= nbsp;       =3D mAcpiCpuData.StackSize;
-  mExchangeInfo->BufferStart      &n= bsp;            = ;      =3D (UINT32)StartupVector;
-  mExchangeInfo->Cr3       &nbs= p;            &= nbsp;            =3D= (UINT32)(AsmReadCr3 ());
-  mExchangeInfo->InitializeFloatingPointUnitsAddress =3D (UINTN)In= itializeFloatingPointUnits;
-  mExchangeInfo->ApFunction      &nb= sp;            =        =3D (VOID *)(UINTN)InitializeCpuProced= ure;
-}
-
 /**
   Restore SMM Configuration in S3 boot path.
 
@@ -315,12 +86,11 @@ SmmRestoreCpu (
   VOID
   )
 {
-  SMM_S3_RESUME_STATE        = *SmmS3ResumeState;
-  IA32_DESCRIPTOR        &nbs= p;    Ia32Idtr;
-  IA32_DESCRIPTOR        &nbs= p;    X64Idtr;
-  IA32_IDT_GATE_DESCRIPTOR    IdtEntryTable[EXCEPTION_= VECTOR_NUMBER];
-  EFI_STATUS         &nb= sp;        Status;
-  EDKII_PEI_MP_SERVICES2_PPI  *Mp2ServicePpi;
+  SMM_S3_RESUME_STATE       *SmmS3Resum= eState;
+  IA32_DESCRIPTOR        &nbs= p;  Ia32Idtr;
+  IA32_DESCRIPTOR        &nbs= p;  X64Idtr;
+  IA32_IDT_GATE_DESCRIPTOR  IdtEntryTable[EXCEPTION_VECTOR_NUMBE= R];
+  EFI_STATUS         &nb= sp;      Status;
 
   DEBUG ((DEBUG_INFO, "SmmRestoreCpu()\n"));
 
@@ -369,38 +139,10 @@ SmmRestoreCpu (
     }
   }
 
-  mBspApicId =3D GetApicId ();
   //
-  // Skip AP initialization if mAcpiCpuData is not valid
+  // Issue SMI IPI (All Excluding  Self SMM IPI + BSP SMM IPI) t= o execute first SMI init.
   //
-  if (mAcpiCpuData.NumberOfCpus > 0) {
-    if (FeaturePcdGet (PcdCpuHotPlugSupport)) {
-      ASSERT (mNumberOfCpus <=3D mAcpiCpuData.= NumberOfCpus);
-    } else {
-      ASSERT (mNumberOfCpus =3D=3D mAcpiCpuData.N= umberOfCpus);
-    }
-
-    mNumberToFinish =3D (UINT32)mNumberOfCpus;
-
-    //
-    // Execute code for before SmmBaseReloc. Note: This fla= g is maintained across S3 boots.
-    //
-    mInitApsAfterSmmBaseReloc =3D FALSE;
-
-    if (mSmmS3ResumeState->MpService2Ppi !=3D 0) {
-      Mp2ServicePpi =3D (EDKII_PEI_MP_SERVICES2_P= PI *)(UINTN)mSmmS3ResumeState->MpService2Ppi;
-      Mp2ServicePpi->StartupAllCPUs (Mp2Servic= ePpi, InitializeCpuProcedure, 0, NULL);
-    } else {
-      PrepareApStartupVector (mAcpiCpuData.Startu= pVector);
-      //
-      // Send INIT IPI - SIPI to all APs
-      //
-      SendInitSipiSipiAllExcludingSelf ((UINT32)m= AcpiCpuData.StartupVector);
-      InitializeCpuProcedure (NULL);
-    }
-  } else {
-    InitializeCpuProcedure (NULL);
-  }
+  ExecuteFirstSmiInit ();
 
   //
   // Set a flag to restore SMM configuration in S3 path.
@@ -471,8 +213,6 @@ InitSmmS3ResumeState (
   VOID         &nbs= p;        *GuidHob;
   EFI_SMRAM_DESCRIPTOR  *SmramDescriptor;
   SMM_S3_RESUME_STATE   *SmmS3ResumeState;
-  EFI_PHYSICAL_ADDRESS  Address;
-  EFI_STATUS         &nb= sp;  Status;
 
   if (!mAcpiS3Enable) {
     return;
@@ -524,20 +264,6 @@ InitSmmS3ResumeState (
     //
     InitSmmS3Cr3 ();
   }
-
-  //
-  // Allocate safe memory in ACPI NVS for AP to execute hlt loop in -  // protected mode on S3 path
-  //
-  Address =3D BASE_4GB - 1;
-  Status  =3D gBS->AllocatePages (
-            &n= bsp;      AllocateMaxAddress,
-            &n= bsp;      EfiACPIMemoryNVS,
-            &n= bsp;      EFI_SIZE_TO_PAGES (sizeof (mApHltLoopCod= eTemplate)),
-            &n= bsp;      &Address
-            &n= bsp;      );
-  ASSERT_EFI_ERROR (Status);
-  mApHltLoopCode =3D (UINT8 *)(UINTN)Address;
 }
 
 /**
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.nasm b/UefiCpuPkg/PiSmm= CpuDxeSmm/Ia32/MpFuncs.nasm
deleted file mode 100644
index dbd1418c0d..0000000000
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.nasm
+++ /dev/null
@@ -1,153 +0,0 @@
-;-------------------------------------------------------------------------= ----- ;
-; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR> -; SPDX-License-Identifier: BSD-2-Clause-Patent
-;
-; Module Name:
-;
-;   MpFuncs.nasm
-;
-; Abstract:
-;
-;   This is the assembly code for Multi-processor S3 support
-;
-;-------------------------------------------------------------------------= ------
-
-SECTION .text
-
-extern ASM_PFX(InitializeFloatingPointUnits)
-
-%define VacantFlag 0x0
-%define NotVacantFlag 0xff
-
-%define LockLocation RendezvousFunnelProcEnd - RendezvousFunnelProcStart -%define StackStart LockLocation + 0x4
-%define StackSize LockLocation + 0x8
-%define RendezvousProc LockLocation + 0xC
-%define GdtrProfile LockLocation + 0x10
-%define IdtrProfile LockLocation + 0x16
-%define BufferStart LockLocation + 0x1C
-
-;-------------------------------------------------------------------------= ------------
-;RendezvousFunnelProc  procedure follows. All APs execute their proce= dure. This
-;procedure serializes all the AP processors through an Init sequence. It m= ust be
-;noted that APs arrive here very raw...ie: real mode, no stack.
-;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PR= OC
-;IS IN MACHINE CODE.
-;-------------------------------------------------------------------------= ------------
-;RendezvousFunnelProc (&WakeUpBuffer,MemAddress);
-
-BITS 16
-global ASM_PFX(RendezvousFunnelProc)
-ASM_PFX(RendezvousFunnelProc):
-RendezvousFunnelProcStart:
-
-; At this point CS =3D 0x(vv00) and ip=3D 0x0.
-
-        mov    &nbs= p;   ax,  cs
-        mov    &nbs= p;   ds,  ax
-        mov    &nbs= p;   es,  ax
-        mov    &nbs= p;   ss,  ax
-        xor    &nbs= p;   ax,  ax
-        mov    &nbs= p;   fs,  ax
-        mov    &nbs= p;   gs,  ax
-
-flat32Start:
-
-        mov    &nbs= p;   si, BufferStart
-        mov    &nbs= p;   edx,dword [si]       &nbs= p;  ; EDX is keeping the start address of wakeup buffer
-
-        mov    &nbs= p;   si, GdtrProfile
-o32     lgdt       [cs:s= i]
-
-        mov    &nbs= p;   si, IdtrProfile
-o32     lidt       [cs:s= i]
-
-        xor    &nbs= p;   ax,  ax
-        mov    &nbs= p;   ds,  ax
-
-        mov    &nbs= p;   eax, cr0        &nbs= p;           ; Get contro= l register 0
-        or     = ;    eax, 0x000000001      &nb= sp;     ; Set PE bit (bit #0)
-        mov    &nbs= p;   cr0, eax
-
-FLAT32_JUMP:
-
-a32     jmp   dword 0x20:0x0
-
-BITS 32
-PMODE_ENTRY:          &n= bsp;            = ;  ; protected mode entry point
-
-        mov    &nbs= p;    ax,  0x8
-o16     mov       &= nbsp; ds,  ax
-o16     mov       &= nbsp; es,  ax
-o16     mov       &= nbsp; fs,  ax
-o16     mov       &= nbsp; gs,  ax
-o16     mov       &= nbsp; ss,  ax         &nb= sp; ; Flat mode setup.
-
-        mov    &nbs= p;    esi, edx
-
-        mov    &nbs= p;    edi, esi
-        add    &nbs= p;    edi, LockLocation
-        mov    &nbs= p;    al,  NotVacantFlag
-TestLock:
-        xchg    &nb= sp;   byte [edi], al
-        cmp    &nbs= p;    al, NotVacantFlag
-        jz     = ;     TestLock
-
-ProgramStack:
-
-        mov    &nbs= p;    edi, esi
-        add    &nbs= p;    edi, StackSize
-        mov    &nbs= p;    eax, dword [edi]
-        mov    &nbs= p;    edi, esi
-        add    &nbs= p;    edi, StackStart
-        add    &nbs= p;    eax, dword [edi]
-        mov    &nbs= p;    esp, eax
-        mov    &nbs= p;    dword [edi], eax
-
-Releaselock:
-
-        mov    &nbs= p;    al,  VacantFlag
-        mov    &nbs= p;    edi, esi
-        add    &nbs= p;    edi, LockLocation
-        xchg    &nb= sp;   byte [edi], al
-
-        ;
-        ; Call assembly function to ini= tialize FPU.
-        ;
-        mov    &nbs= p;    ebx, ASM_PFX(InitializeFloatingPointUnits)
-        call    &nb= sp;   ebx
-        ;
-        ; Call C Function
-        ;
-        mov    &nbs= p;    edi, esi
-        add    &nbs= p;    edi, RendezvousProc
-        mov    &nbs= p;    eax, dword [edi]
-
-        test    &nb= sp;   eax, eax
-        jz     = ;     GoToSleep
-        call    &nb= sp;   eax         &n= bsp;            = ;     ; Call C function
-
-GoToSleep:
-        cli
-        hlt
-        jmp    &nbs= p;    $-2
-
-RendezvousFunnelProcEnd:
-;-------------------------------------------------------------------------= ------------
-;  AsmGetAddressMap (&AddressMap);
-;-------------------------------------------------------------------------= ------------
-global ASM_PFX(AsmGetAddressMap)
-ASM_PFX(AsmGetAddressMap):
-
-        pushad
-        mov    &nbs= p;    ebp,esp
-
-        mov    &nbs= p;    ebx, dword [ebp+0x24]
-        mov    &nbs= p;    dword [ebx], RendezvousFunnelProcStart
-        mov    &nbs= p;    dword [ebx+0x4], PMODE_ENTRY - RendezvousFunnelProcSta= rt
-        mov    &nbs= p;    dword [ebx+0x8], FLAT32_JUMP - RendezvousFunnelProcSta= rt
-        mov    &nbs= p;    dword [ebx+0xc], RendezvousFunnelProcEnd - RendezvousF= unnelProcStart
-
-        popad
-        ret
-
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c b/UefiCpuPkg/PiS= mmCpuDxeSmm/Ia32/SmmFuncsArch.c
index 636dc8d92f..6a701dd88d 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c
@@ -141,33 +141,6 @@ InitGdt (
   return GdtTssTables;
 }
 
-/**
-  Transfer AP to safe hlt-loop after it finished restore CPU features= on S3 patch.
-
-  @param[in] ApHltLoopCode       &= nbsp;  The address of the safe hlt-loop function.
-  @param[in] TopOfStack       &nbs= p;     A pointer to the new stack to use for the ApHltL= oopCode.
-  @param[in] NumberToFinishAddress  Address of Semaphore of APs = finish count.
-
-**/
-VOID
-TransferApToSafeState (
-  IN UINTN  ApHltLoopCode,
-  IN UINTN  TopOfStack,
-  IN UINTN  NumberToFinishAddress
-  )
-{
-  SwitchStack (
-    (SWITCH_STACK_ENTRY_POINT)ApHltLoopCode,
-    (VOID *)NumberToFinishAddress,
-    NULL,
-    (VOID *)TopOfStack
-    );
-  //
-  // It should never reach here
-  //
-  ASSERT (FALSE);
-}
-
 /**
   Initialize the shadow stack related data structure.
 
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf b/UefiCpuPkg/PiSm= mCpuDxeSmm/PiSmmCpuDxeSmm.inf
index 3354f94a64..f83579025b 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
@@ -53,7 +53,6 @@
   Ia32/SmmProfileArch.h
   Ia32/SmiEntry.nasm
   Ia32/SmiException.nasm
-  Ia32/MpFuncs.nasm
   Ia32/Cet.nasm
 
 [Sources.X64]
@@ -63,7 +62,6 @@
   X64/SmmProfileArch.h
   X64/SmiEntry.nasm
   X64/SmiException.nasm
-  X64/MpFuncs.nasm
   X64/Cet.nasm
 
 [Packages]
@@ -136,7 +134,6 @@
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileSize  &nbs= p;            &= nbsp;   ## SOMETIMES_CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize   =             &nb= sp;     ## CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout  &n= bsp;            = ;  ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress   &nbs= p;            &= nbsp;   ## SOMETIMES_CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress  =              ##= SOMETIMES_PRODUCES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable =         ## CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode   &= nbsp;           &nbs= p;      ## CONSUMES
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/MpFuncs.nasm b/UefiCpuPkg/PiSmmC= puDxeSmm/X64/MpFuncs.nasm
deleted file mode 100644
index a12538f72b..0000000000
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/MpFuncs.nasm
+++ /dev/null
@@ -1,189 +0,0 @@
-;-------------------------------------------------------------------------= ----- ;
-; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR= >
-; SPDX-License-Identifier: BSD-2-Clause-Patent
-;
-; Module Name:
-;
-;   MpFuncs.nasm
-;
-; Abstract:
-;
-;   This is the assembly code for Multi-processor S3 support
-;
-;-------------------------------------------------------------------------= ------
-
-%define VacantFlag 0x0
-%define NotVacantFlag 0xff
-
-%define LockLocation RendezvousFunnelProcEnd - RendezvousFunnelProcStart -%define StackStartAddressLocation LockLocation + 0x8
-%define StackSizeLocation LockLocation + 0x10
-%define CProcedureLocation LockLocation + 0x18
-%define GdtrLocation LockLocation + 0x20
-%define IdtrLocation LockLocation + 0x2A
-%define BufferStartLocation LockLocation + 0x34
-%define Cr3OffsetLocation LockLocation + 0x38
-%define InitializeFloatingPointUnitsAddress LockLocation + 0x3C
-
-;-------------------------------------------------------------------------= ------------
-;RendezvousFunnelProc  procedure follows. All APs execute their proce= dure. This
-;procedure serializes all the AP processors through an Init sequence. It m= ust be
-;noted that APs arrive here very raw...ie: real mode, no stack.
-;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PR= OC
-;IS IN MACHINE CODE.
-;-------------------------------------------------------------------------= ------------
-;RendezvousFunnelProc (&WakeUpBuffer,MemAddress);
-
-;text      SEGMENT
-DEFAULT REL
-SECTION .text
-
-BITS 16
-global ASM_PFX(RendezvousFunnelProc)
-ASM_PFX(RendezvousFunnelProc):
-RendezvousFunnelProcStart:
-
-; At this point CS =3D 0x(vv00) and ip=3D 0x0.
-
-        mov    &nbs= p;   ax,  cs
-        mov    &nbs= p;   ds,  ax
-        mov    &nbs= p;   es,  ax
-        mov    &nbs= p;   ss,  ax
-        xor    &nbs= p;   ax,  ax
-        mov    &nbs= p;   fs,  ax
-        mov    &nbs= p;   gs,  ax
-
-flat32Start:
-
-        mov    &nbs= p;   si, BufferStartLocation
-        mov    &nbs= p;   edx,dword [si]       &nbs= p;  ; EDX is keeping the start address of wakeup buffer
-
-        mov    &nbs= p;   si, Cr3OffsetLocation
-        mov    &nbs= p;   ecx,dword [si]       &nbs= p;  ; ECX is keeping the value of CR3
-
-        mov    &nbs= p;   si, GdtrLocation
-o32     lgdt       [cs:s= i]
-
-        mov    &nbs= p;   si, IdtrLocation
-o32     lidt       [cs:s= i]
-
-        xor    &nbs= p;   ax,  ax
-        mov    &nbs= p;   ds,  ax
-
-        mov    &nbs= p;   eax, cr0        &nbs= p;           ; Get contro= l register 0
-        or     = ;    eax, 0x000000001      &nb= sp;     ; Set PE bit (bit #0)
-        mov    &nbs= p;   cr0, eax
-
-FLAT32_JUMP:
-
-a32     jmp   dword 0x20:0x0
-
-BITS 32
-PMODE_ENTRY:          &n= bsp;            = ;  ; protected mode entry point
-
-        mov    &nbs= p;   ax,  0x18
-o16     mov        = ds,  ax
-o16     mov        = es,  ax
-o16     mov        = fs,  ax
-o16     mov        = gs,  ax
-o16     mov        = ss,  ax          &nb= sp;          ; Flat mode setup= .
-
-        mov    &nbs= p;   eax, cr4
-        bts    &nbs= p;   eax, 5
-        mov    &nbs= p;   cr4, eax
-
-        mov    &nbs= p;   cr3, ecx
-
-        mov    &nbs= p;   esi, edx        &nbs= p;           ; Save wakeu= p buffer address
-
-        mov    &nbs= p;   ecx, 0xc0000080       &nb= sp;     ; EFER MSR number.
-        rdmsr    &n= bsp;            = ;            &n= bsp;    ; Read EFER.
-        bts    &nbs= p;   eax, 8         =              ; = Set LME=3D1.
-        wrmsr    &n= bsp;            = ;            &n= bsp;    ; Write EFER.
-
-        mov    &nbs= p;   eax, cr0        &nbs= p;           ; Read CR0.<= br> -        bts    &nbs= p;   eax, 31         = ;            ; Set P= G=3D1.
-        mov    &nbs= p;   cr0, eax        &nbs= p;           ; Write CR0.=
-
-LONG_JUMP:
-
-a16     jmp   dword 0x38:0x0
-
-BITS 64
-LongModeStart:
-
-        mov    &nbs= p;    ax,  0x30
-o16     mov       &= nbsp; ds,  ax
-o16     mov       &= nbsp; es,  ax
-o16     mov       &= nbsp; ss,  ax
-
-        mov  edi, esi
-        add  edi, LockLocation
-        mov  al,  NotVacantFl= ag
-TestLock:
-        xchg byte [edi], al
-        cmp  al, NotVacantFlag
-        jz   TestLock
-
-ProgramStack:
-
-        mov  edi, esi
-        add  edi, StackSizeLocatio= n
-        mov  rax, qword [edi]
-        mov  edi, esi
-        add  edi, StackStartAddres= sLocation
-        add  rax, qword [edi]
-        mov  rsp, rax
-        mov  qword [edi], rax
-
-Releaselock:
-
-        mov  al,  VacantFlag<= br> -        mov  edi, esi
-        add  edi, LockLocation
-        xchg byte [edi], al
-
-        ;
-        ; Call assembly function to ini= tialize FPU.
-        ;
-        mov    &nbs= p;    rax, qword [esi + InitializeFloatingPointUnitsAddress]=
-        sub    &nbs= p;    rsp, 0x20
-        call    &nb= sp;   rax
-        add    &nbs= p;    rsp, 0x20
-
-        ;
-        ; Call C Function
-        ;
-        mov    &nbs= p;    edi, esi
-        add    &nbs= p;    edi, CProcedureLocation
-        mov    &nbs= p;    rax, qword [edi]
-
-        test    &nb= sp;   rax, rax
-        jz     = ;     GoToSleep
-
-        sub    &nbs= p;    rsp, 0x20
-        call    &nb= sp;   rax
-        add    &nbs= p;    rsp, 0x20
-
-GoToSleep:
-        cli
-        hlt
-        jmp    &nbs= p;    $-2
-
-RendezvousFunnelProcEnd:
-
-;-------------------------------------------------------------------------= ------------
-;  AsmGetAddressMap (&AddressMap);
-;-------------------------------------------------------------------------= ------------
-; comments here for definition of address map
-global ASM_PFX(AsmGetAddressMap)
-ASM_PFX(AsmGetAddressMap):
-        lea    &nbs= p;    rax, [RendezvousFunnelProcStart]
-        mov    &nbs= p;    qword [rcx], rax
-        mov    &nbs= p;    qword [rcx+0x8], PMODE_ENTRY - RendezvousFunnelProcSta= rt
-        mov    &nbs= p;    qword [rcx+0x10], FLAT32_JUMP - RendezvousFunnelProcSt= art
-        mov    &nbs= p;    qword [rcx+0x18], RendezvousFunnelProcEnd - Rendezvous= FunnelProcStart
-        mov    &nbs= p;    qword [rcx+0x20], LongModeStart - RendezvousFunnelProc= Start
-        mov    &nbs= p;    qword [rcx+0x28], LONG_JUMP - RendezvousFunnelProcStar= t
-        ret
-
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c b/UefiCpuPkg/PiSm= mCpuDxeSmm/X64/SmmFuncsArch.c
index c4f21e2155..3b1c37de8c 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c
@@ -132,34 +132,6 @@ GetProtectedModeCS (
   return Index * 8;
 }
 
-/**
-  Transfer AP to safe hlt-loop after it finished restore CPU features= on S3 patch.
-
-  @param[in] ApHltLoopCode       &= nbsp;  The address of the safe hlt-loop function.
-  @param[in] TopOfStack       &nbs= p;     A pointer to the new stack to use for the ApHltL= oopCode.
-  @param[in] NumberToFinishAddress  Address of Semaphore of APs = finish count.
-
-**/
-VOID
-TransferApToSafeState (
-  IN UINTN  ApHltLoopCode,
-  IN UINTN  TopOfStack,
-  IN UINTN  NumberToFinishAddress
-  )
-{
-  AsmDisablePaging64 (
-    GetProtectedModeCS (),
-    (UINT32)ApHltLoopCode,
-    (UINT32)NumberToFinishAddress,
-    0,
-    (UINT32)TopOfStack
-    );
-  //
-  // It should never reach here
-  //
-  ASSERT (FALSE);
-}
-
 /**
   Initialize the shadow stack related data structure.
 
--
2.31.1.windows.1

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