* [edk2-devel] [Patch V3 1/3] UefiCpuPkg/MpInitLib: Eliminate redundant microcode loading in DXE.
2023-11-22 6:08 [edk2-devel] [Patch V3 0/3] UefiCpuPkg/MpInitLib: Eliminate redundant microcode loading in DXE Yuanhao Xie
@ 2023-11-22 6:08 ` Yuanhao Xie
2023-11-23 1:18 ` Ni, Ray
2023-11-23 1:18 ` Ni, Ray
2023-11-22 6:08 ` [edk2-devel] [Patch V3 2/3] UefiCpuPkg/MpInitLib: Store MTRRs settings only when CpuCount>1 Yuanhao Xie
2023-11-22 6:08 ` [edk2-devel] [Patch V3 3/3] UefiCpuPkg/MpInitLib: Extract Dump Microcode Revision as function Yuanhao Xie
2 siblings, 2 replies; 10+ messages in thread
From: Yuanhao Xie @ 2023-11-22 6:08 UTC (permalink / raw)
To: devel; +Cc: xieyuanh, Ray Ni, Eric Dong, Rahul Kumar, Tom Lendacky,
Laszlo Ersek
The DXE stage's Microcode loading process has been elimincated by:
1. Let ShadowMicrocodeUpdatePatch and MicrocodeDetect for BSP performed
only during the PEI phase. DXE skip those actions.
2. BSP in DXE WakeUpAp only for synchronizing MTRR settings, not loading
microcode.
Synchronizing the MTRR table to the AP is always essential.
During the DXE phase, it cannot be omitted like loading microcode,
as the PEI and DXE may be in different bit modes.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
---
UefiCpuPkg/Library/MpInitLib/MpLib.c | 38 +++++++++++++++++++++++---------------
1 file changed, 23 insertions(+), 15 deletions(-)
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 9a6ec5db5c..c26a17e1db 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -451,12 +451,19 @@ ApInitializeSync (
CpuMpData = (CPU_MP_DATA *)Buffer;
Status = GetProcessorNumber (CpuMpData, &ProcessorNumber);
ASSERT_EFI_ERROR (Status);
+ ASSERT (CpuMpData->InitFlag == ApInitReconfig || CpuMpData->InitFlag == ApInitDone);
+ if (CpuMpData->InitFlag != ApInitReconfig) {
+ //
+ // Load microcode on AP for PEI phase.
+ // During the DXE phase, it cannot omitted.
+ //
+ MicrocodeDetect (CpuMpData, ProcessorNumber);
+ }
+
//
- // Load microcode on AP
- //
- MicrocodeDetect (CpuMpData, ProcessorNumber);
- //
- // Sync BSP's MTRR table to AP
+ // Synchronizing the MTRR table to the AP is always essential.
+ // During the DXE phase, it cannot be omitted like loading microcode,
+ // as the PEI and DXE may be in different bit modes.
//
MtrrSetAllMtrrs (&CpuMpData->MtrrTable);
}
@@ -2224,29 +2231,25 @@ MpInitLibInitialize (
}
}
- if (!GetMicrocodePatchInfoFromHob (
- &CpuMpData->MicrocodePatchAddress,
- &CpuMpData->MicrocodePatchRegionSize
- ))
- {
+ if (MpHandOff == NULL) {
//
// The microcode patch information cache HOB does not exist, which means
// the microcode patches data has not been loaded into memory yet
//
ShadowMicrocodeUpdatePatch (CpuMpData);
+ //
+ // Detect and apply Microcode on BSP
+ //
+ MicrocodeDetect (CpuMpData, CpuMpData->BspNumber);
}
- //
- // Detect and apply Microcode on BSP
- //
- MicrocodeDetect (CpuMpData, CpuMpData->BspNumber);
//
// Store BSP's MTRR setting
//
MtrrGetAllMtrrs (&CpuMpData->MtrrTable);
//
- // Wakeup APs to do some AP initialize sync (Microcode & MTRR)
+ // Wakeup APs to do some AP initialize sync (MTRR and/or Microcode).
//
if (CpuMpData->CpuCount > 1) {
if (MpHandOff != NULL) {
@@ -2258,6 +2261,11 @@ MpInitLibInitialize (
CpuMpData->InitFlag = ApInitReconfig;
}
+ //
+ // Wake up the AP to perform some AP initialization synchronization.
+ // 1. For PEI stage, load microcode and synchronize MTRR,
+ // 2. For the DXE phase, only synchronize MTRR.
+ //
WakeUpAP (CpuMpData, TRUE, 0, ApInitializeSync, CpuMpData, TRUE);
//
// Wait for all APs finished initialization
--
2.39.1.windows.1
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^ permalink raw reply related [flat|nested] 10+ messages in thread* [edk2-devel] [Patch V3 2/3] UefiCpuPkg/MpInitLib: Store MTRRs settings only when CpuCount>1
2023-11-22 6:08 [edk2-devel] [Patch V3 0/3] UefiCpuPkg/MpInitLib: Eliminate redundant microcode loading in DXE Yuanhao Xie
2023-11-22 6:08 ` [edk2-devel] [Patch V3 1/3] " Yuanhao Xie
@ 2023-11-22 6:08 ` Yuanhao Xie
2023-11-23 1:21 ` Ni, Ray
2023-11-22 6:08 ` [edk2-devel] [Patch V3 3/3] UefiCpuPkg/MpInitLib: Extract Dump Microcode Revision as function Yuanhao Xie
2 siblings, 1 reply; 10+ messages in thread
From: Yuanhao Xie @ 2023-11-22 6:08 UTC (permalink / raw)
To: devel; +Cc: xieyuanh, Ray Ni, Eric Dong, Rahul Kumar, Tom Lendacky,
Laszlo Ersek
Store BSP's MTRR setting only when CpuCount>1.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
---
UefiCpuPkg/Library/MpInitLib/MpLib.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index c26a17e1db..538095d3bb 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -2243,15 +2243,14 @@ MpInitLibInitialize (
MicrocodeDetect (CpuMpData, CpuMpData->BspNumber);
}
- //
- // Store BSP's MTRR setting
- //
- MtrrGetAllMtrrs (&CpuMpData->MtrrTable);
-
//
// Wakeup APs to do some AP initialize sync (MTRR and/or Microcode).
//
if (CpuMpData->CpuCount > 1) {
+ //
+ // Store BSP's MTRR setting
+ //
+ MtrrGetAllMtrrs (&CpuMpData->MtrrTable);
if (MpHandOff != NULL) {
//
// Only needs to use this flag for DXE phase to update the wake up
--
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^ permalink raw reply related [flat|nested] 10+ messages in thread* [edk2-devel] [Patch V3 3/3] UefiCpuPkg/MpInitLib: Extract Dump Microcode Revision as function.
2023-11-22 6:08 [edk2-devel] [Patch V3 0/3] UefiCpuPkg/MpInitLib: Eliminate redundant microcode loading in DXE Yuanhao Xie
2023-11-22 6:08 ` [edk2-devel] [Patch V3 1/3] " Yuanhao Xie
2023-11-22 6:08 ` [edk2-devel] [Patch V3 2/3] UefiCpuPkg/MpInitLib: Store MTRRs settings only when CpuCount>1 Yuanhao Xie
@ 2023-11-22 6:08 ` Yuanhao Xie
2023-11-23 1:23 ` Ni, Ray
2 siblings, 1 reply; 10+ messages in thread
From: Yuanhao Xie @ 2023-11-22 6:08 UTC (permalink / raw)
To: devel; +Cc: xieyuanh, Ray Ni, Eric Dong, Rahul Kumar, Tom Lendacky,
Laszlo Ersek
There is no functional changes, only extract DumpMicrocodeRevision since
only in PEI BSP will detect, apply microcode, and APs will sync
microcode.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
---
UefiCpuPkg/Library/MpInitLib/Microcode.c | 91 +++++++++++++++++++++++++++++++++++++++++++++----------------------------------------------
UefiCpuPkg/Library/MpInitLib/MpLib.c | 31 ++-----------------------------
UefiCpuPkg/Library/MpInitLib/MpLib.h | 31 ++++++++++---------------------
3 files changed, 57 insertions(+), 96 deletions(-)
diff --git a/UefiCpuPkg/Library/MpInitLib/Microcode.c b/UefiCpuPkg/Library/MpInitLib/Microcode.c
index 11720560af..c0ca85543a 100644
--- a/UefiCpuPkg/Library/MpInitLib/Microcode.c
+++ b/UefiCpuPkg/Library/MpInitLib/Microcode.c
@@ -322,65 +322,64 @@ OnExit:
}
/**
- Shadow the required microcode patches data into memory.
+ Dump the microcode revision for each core.
- @param[in, out] CpuMpData The pointer to CPU MP Data structure.
-**/
+ @param[in] CpuMpData Pointer to CPU MP Data
+ **/
VOID
-ShadowMicrocodeUpdatePatch (
- IN OUT CPU_MP_DATA *CpuMpData
+DumpMicrocodeRevision (
+ IN CPU_MP_DATA *CpuMpData
)
{
- EFI_STATUS Status;
+ UINT32 ThreadId;
+ UINT32 ExpectedMicrocodeRevision;
+ CPU_INFO_IN_HOB *CpuInfoInHob;
+ UINTN Index;
- Status = PlatformShadowMicrocode (CpuMpData);
- if (EFI_ERROR (Status)) {
- ShadowMicrocodePatchByPcd (CpuMpData);
+ //
+ // Dump the microcode revision for each core.
+ //
+ DEBUG_CODE_BEGIN ();
+ CpuInfoInHob = (CPU_INFO_IN_HOB *)(UINTN)CpuMpData->CpuInfoInHob;
+ for (Index = 0; Index < CpuMpData->CpuCount; Index++) {
+ GetProcessorLocationByApicId (CpuInfoInHob[Index].InitialApicId, NULL, NULL, &ThreadId);
+ if (ThreadId == 0) {
+ //
+ // MicrocodeDetect() loads microcode in first thread of each core, so,
+ // CpuMpData->CpuData[Index].MicrocodeEntryAddr is initialized only for first thread of each core.
+ //
+ ExpectedMicrocodeRevision = 0;
+ if (CpuMpData->CpuData[Index].MicrocodeEntryAddr != 0) {
+ ExpectedMicrocodeRevision = ((CPU_MICROCODE_HEADER *)(UINTN)CpuMpData->CpuData[Index].MicrocodeEntryAddr)->UpdateRevision;
+ }
+
+ DEBUG ((
+ DEBUG_INFO,
+ "CPU[%04d]: Microcode revision = %08x, expected = %08x\n",
+ Index,
+ CpuMpData->CpuData[Index].MicrocodeRevision,
+ ExpectedMicrocodeRevision
+ ));
+ }
}
+
+ DEBUG_CODE_END ();
}
/**
- Get the cached microcode patch base address and size from the microcode patch
- information cache HOB.
-
- @param[out] Address Base address of the microcode patches data.
- It will be updated if the microcode patch
- information cache HOB is found.
- @param[out] RegionSize Size of the microcode patches data.
- It will be updated if the microcode patch
- information cache HOB is found.
-
- @retval TRUE The microcode patch information cache HOB is found.
- @retval FALSE The microcode patch information cache HOB is not found.
+ Shadow the required microcode patches data into memory.
+ @param[in, out] CpuMpData The pointer to CPU MP Data structure.
**/
-BOOLEAN
-GetMicrocodePatchInfoFromHob (
- UINT64 *Address,
- UINT64 *RegionSize
+VOID
+ShadowMicrocodeUpdatePatch (
+ IN OUT CPU_MP_DATA *CpuMpData
)
{
- EFI_HOB_GUID_TYPE *GuidHob;
- EDKII_MICROCODE_PATCH_HOB *MicrocodePathHob;
+ EFI_STATUS Status;
- GuidHob = GetFirstGuidHob (&gEdkiiMicrocodePatchHobGuid);
- if (GuidHob == NULL) {
- DEBUG ((DEBUG_INFO, "%a: Microcode patch cache HOB is not found.\n", __func__));
- return FALSE;
+ Status = PlatformShadowMicrocode (CpuMpData);
+ if (EFI_ERROR (Status)) {
+ ShadowMicrocodePatchByPcd (CpuMpData);
}
-
- MicrocodePathHob = GET_GUID_HOB_DATA (GuidHob);
-
- *Address = MicrocodePathHob->MicrocodePatchAddress;
- *RegionSize = MicrocodePathHob->MicrocodePatchRegionSize;
-
- DEBUG ((
- DEBUG_INFO,
- "%a: MicrocodeBase = 0x%lx, MicrocodeSize = 0x%lx\n",
- __func__,
- *Address,
- *RegionSize
- ));
-
- return TRUE;
}
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 538095d3bb..2fd96bf0bc 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -2282,37 +2282,10 @@ MpInitLibInitialize (
}
}
- //
- // Dump the microcode revision for each core.
- //
- DEBUG_CODE_BEGIN ();
- UINT32 ThreadId;
- UINT32 ExpectedMicrocodeRevision;
-
- CpuInfoInHob = (CPU_INFO_IN_HOB *)(UINTN)CpuMpData->CpuInfoInHob;
- for (Index = 0; Index < CpuMpData->CpuCount; Index++) {
- GetProcessorLocationByApicId (CpuInfoInHob[Index].InitialApicId, NULL, NULL, &ThreadId);
- if (ThreadId == 0) {
- //
- // MicrocodeDetect() loads microcode in first thread of each core, so,
- // CpuMpData->CpuData[Index].MicrocodeEntryAddr is initialized only for first thread of each core.
- //
- ExpectedMicrocodeRevision = 0;
- if (CpuMpData->CpuData[Index].MicrocodeEntryAddr != 0) {
- ExpectedMicrocodeRevision = ((CPU_MICROCODE_HEADER *)(UINTN)CpuMpData->CpuData[Index].MicrocodeEntryAddr)->UpdateRevision;
- }
-
- DEBUG ((
- DEBUG_INFO,
- "CPU[%04d]: Microcode revision = %08x, expected = %08x\n",
- Index,
- CpuMpData->CpuData[Index].MicrocodeRevision,
- ExpectedMicrocodeRevision
- ));
- }
+ if (MpHandOff == NULL) {
+ DumpMicrocodeRevision (CpuMpData);
}
- DEBUG_CODE_END ();
//
// Initialize global data for MP support
//
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 763db4963d..fd302e6845 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -735,34 +735,23 @@ MicrocodeDetect (
);
/**
- Shadow the required microcode patches data into memory.
+ Dump the microcode revision for each core.
- @param[in, out] CpuMpData The pointer to CPU MP Data structure.
-**/
+ @param[in] CpuMpData Pointer to CPU MP Data
+ **/
VOID
-ShadowMicrocodeUpdatePatch (
- IN OUT CPU_MP_DATA *CpuMpData
+DumpMicrocodeRevision (
+ IN CPU_MP_DATA *CpuMpData
);
/**
- Get the cached microcode patch base address and size from the microcode patch
- information cache HOB.
-
- @param[out] Address Base address of the microcode patches data.
- It will be updated if the microcode patch
- information cache HOB is found.
- @param[out] RegionSize Size of the microcode patches data.
- It will be updated if the microcode patch
- information cache HOB is found.
-
- @retval TRUE The microcode patch information cache HOB is found.
- @retval FALSE The microcode patch information cache HOB is not found.
+ Shadow the required microcode patches data into memory.
+ @param[in, out] CpuMpData The pointer to CPU MP Data structure.
**/
-BOOLEAN
-GetMicrocodePatchInfoFromHob (
- UINT64 *Address,
- UINT64 *RegionSize
+VOID
+ShadowMicrocodeUpdatePatch (
+ IN OUT CPU_MP_DATA *CpuMpData
);
/**
--
2.39.1.windows.1
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