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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Thanks for the change. But it doesn't highlight another impact due to this change: CET logic is re= moved from the SEC/PEI version. It's not an issue because CET is only enabled in SMM environment today. But better to highlight the impact in the commit message, and explicitly sa= y that limitation in the SecPeiCpuExceptionHandlerLib.inf file. Thanks, Ray -----Original Message----- From: Ard Biesheuvel =20 Sent: Friday, March 31, 2023 5:21 AM To: devel@edk2.groups.io Cc: Ard Biesheuvel ; Ni; Ni, Ray ; Andre= w Fish ; Kinney, Michael D ; L= iu, Zhiguang ; Rebecca Cran ; To= m Lendacky Subject: [RFT PATCH v2 3/6] UefiCpuPkg/CpuExceptionHandlerLib: Use single S= EC/PEI version Currently, we use the non-Xcode5 version of ExceptionHandlerAsm.nasm only for the SEC and PEI phases, and this version was not compatible with the XCODE or LLD linkers, which do not permit absolute relocations in read-only sections by default. This has been fixed now, so we can use it for all toolchains. Let's rename the .nasm file to reflect the fact that is used for the SecPei flavor of this library only, and while at it, remove some unnecessary absolute references. Since this makes the generic version compatible with the XCODE, let's use this [smaller] version for XCODE5 builds too. Signed-off-by: Ard Biesheuvel --- UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf= | 2 +- UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/{ExceptionHandlerAsm.nasm = =3D> SecPeiExceptionHandlerAsm.nasm} | 7 +++---- UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExceptionHandlerL= ib.inf | 2 +- 3 files changed, 5 insertions(+), 6 deletions(-) diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHa= ndlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException= HandlerLib.inf index df44371fe018e06d..10c5c5f2e5d203f6 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLi= b.inf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLi= b.inf @@ -28,7 +28,7 @@ [Sources.Ia32] Ia32/ArchInterruptDefs.h =20 [Sources.X64] - X64/ExceptionHandlerAsm.nasm + X64/SecPeiExceptionHandlerAsm.nasm X64/ArchExceptionHandler.c X64/ArchInterruptDefs.h =20 diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandler= Asm.nasm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/SecPeiExceptionHan= dlerAsm.nasm similarity index 95% rename from UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerA= sm.nasm rename to UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/SecPeiExceptionHand= lerAsm.nasm index aaf8d622e6f3b8f1..585298768a66af6a 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nas= m +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/SecPeiExceptionHandlerA= sm.nasm @@ -276,8 +276,7 @@ DrFinish: ; and make sure RSP is 16-byte aligned ; sub rsp, 4 * 8 + 8 - mov rax, ASM_PFX(CommonExceptionHandler) - call rax + call ASM_PFX(CommonExceptionHandler) add rsp, 4 * 8 + 8 =20 cli @@ -384,10 +383,10 @@ DoIret: ; comments here for definition of address map global ASM_PFX(AsmGetTemplateAddressMap) ASM_PFX(AsmGetTemplateAddressMap): - mov rax, AsmIdtVectorBegin + lea rax, [AsmIdtVectorBegin] mov qword [rcx], rax mov qword [rcx + 0x8], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32 - mov rax, HookAfterStubHeaderBegin + lea rax, [HookAfterStubHeaderBegin] mov qword [rcx + 0x10], rax ret =20 diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExcep= tionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPei= CpuExceptionHandlerLib.inf index 619b39d7f1de9ae3..c58fbb0d74500e48 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExceptionHan= dlerLib.inf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExceptionHan= dlerLib.inf @@ -33,7 +33,7 @@ [Sources.Ia32] Ia32/ArchInterruptDefs.h =20 [Sources.X64] - X64/Xcode5ExceptionHandlerAsm.nasm + X64/SecPeiExceptionHandlerAsm.nasm X64/ArchExceptionHandler.c X64/ArchInterruptDefs.h =20 --=20 2.39.2