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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Ray Ni > -----Original Message----- > From: Wu, Jiaxin > Sent: Monday, February 13, 2023 4:44 PM > To: devel@edk2.groups.io > Cc: Dong, Eric ; Ni, Ray ; Zeng, S= tar > ; Laszlo Ersek ; Gerd Hoffmann > ; Kumar, Rahul R > Subject: [PATCH v6 2/6] UefiCpuPkg/PiSmmCpuDxeSmm: Replace mIsBsp by > mBspApicId >=20 > This patch is to replace mIsBsp by mBspApicId. >=20 > Cc: Eric Dong > Cc: Ray Ni > Cc: Zeng Star > Cc: Laszlo Ersek > Cc: Gerd Hoffmann > Cc: Rahul Kumar > Signed-off-by: Jiaxin Wu > --- > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 23 ++++++++++++- > ---------- > 1 file changed, 12 insertions(+), 11 deletions(-) >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c > b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c > index 2ac655d032..6e795d1756 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c > @@ -57,11 +57,10 @@ SMM_CPU_PRIVATE_DATA *gSmmCpuPrivate =3D > &mSmmCpuPrivateData; >=20 > // > // SMM Relocation variables > // > volatile BOOLEAN *mRebased; > -volatile BOOLEAN mIsBsp; >=20 > /// > /// Handle for the SMM CPU Protocol > /// > EFI_HANDLE mSmmCpuHandle =3D NULL; > @@ -83,10 +82,12 @@ EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL > mSmmMemoryAttribute =3D { > EdkiiSmmClearMemoryAttributes > }; >=20 > EFI_CPU_INTERRUPT_HANDLER > mExternalVectorTable[EXCEPTION_VECTOR_NUMBER]; >=20 > +UINT32 mBspApicId =3D 0; > + > // > // SMM stack information > // > UINTN mSmmStackArrayBase; > UINTN mSmmStackArrayEnd; > @@ -341,39 +342,42 @@ VOID > EFIAPI > SmmInitHandler ( > VOID > ) > { > - UINT32 ApicId; > - UINTN Index; > + UINT32 ApicId; > + UINTN Index; > + BOOLEAN IsBsp; >=20 > // > // Update SMM IDT entries' code segment and load IDT > // > AsmWriteIdtr (&gcSmiIdtr); > ApicId =3D GetApicId (); >=20 > + IsBsp =3D (BOOLEAN)(mBspApicId =3D=3D ApicId); > + > ASSERT (mNumberOfCpus <=3D mMaxNumberOfCpus); >=20 > for (Index =3D 0; Index < mNumberOfCpus; Index++) { > if (ApicId =3D=3D (UINT32)gSmmCpuPrivate->ProcessorInfo[Index].Proce= ssorId) > { > // > // Initialize SMM specific features on the currently executing CPU > // > SmmCpuFeaturesInitializeProcessor ( > Index, > - mIsBsp, > + IsBsp, > gSmmCpuPrivate->ProcessorInfo, > &mCpuHotPlugData > ); >=20 > if (!mSmmS3Flag) { > // > // Check XD and BTS features on each processor on normal boot > // > CheckFeatureSupported (); > - } else if (mIsBsp) { > + } else if (IsBsp) { > // > // BSP rebase is already done above. > // Initialize private data during S3 resume > // > InitializeMpSyncData (); > @@ -405,11 +409,10 @@ SmmRelocateBases ( > { > UINT8 BakBuf[BACK_BUF_SIZE]; > SMRAM_SAVE_STATE_MAP BakBuf2; > SMRAM_SAVE_STATE_MAP *CpuStatePtr; > UINT8 *U8Ptr; > - UINT32 ApicId; > UINTN Index; > UINTN BspIndex; >=20 > // > // Make sure the reserved size is large enough for procedure > SmmInitTemplate. > @@ -446,21 +449,20 @@ SmmRelocateBases ( > CopyMem (U8Ptr, gcSmmInitTemplate, gcSmmInitSize); >=20 > // > // Retrieve the local APIC ID of current processor > // > - ApicId =3D GetApicId (); > + mBspApicId =3D GetApicId (); >=20 > // > // Relocate SM bases for all APs > // This is APs' 1st SMI - rebase will be done here, and APs' default S= MI > handler will be overridden by gcSmmInitTemplate > // > - mIsBsp =3D FALSE; > BspIndex =3D (UINTN)-1; > for (Index =3D 0; Index < mNumberOfCpus; Index++) { > mRebased[Index] =3D FALSE; > - if (ApicId !=3D (UINT32)gSmmCpuPrivate->ProcessorInfo[Index].Process= orId) > { > + if (mBspApicId !=3D (UINT32)gSmmCpuPrivate- > >ProcessorInfo[Index].ProcessorId) { > SendSmiIpi ((UINT32)gSmmCpuPrivate- > >ProcessorInfo[Index].ProcessorId); > // > // Wait for this AP to finish its 1st SMI > // > while (!mRebased[Index]) { > @@ -475,12 +477,11 @@ SmmRelocateBases ( >=20 > // > // Relocate BSP's SMM base > // > ASSERT (BspIndex !=3D (UINTN)-1); > - mIsBsp =3D TRUE; > - SendSmiIpi (ApicId); > + SendSmiIpi (mBspApicId); > // > // Wait for the BSP to finish its 1st SMI > // > while (!mRebased[BspIndex]) { > } > -- > 2.16.2.windows.1