public inbox for devel@edk2.groups.io
 help / color / mirror / Atom feed
From: "Ni, Ray" <ray.ni@intel.com>
To: "Tan, Dun" <dun.tan@intel.com>,
	"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Dong, Eric" <eric.dong@intel.com>,
	"Kumar, Rahul R" <rahul.r.kumar@intel.com>,
	Gerd Hoffmann <kraxel@redhat.com>
Subject: Re: [Patch V4 05/15] UefiCpuPkg: Use CpuPageTableLib to convert SMM paging attribute.
Date: Thu, 1 Jun 2023 01:09:39 +0000	[thread overview]
Message-ID: <MN6PR11MB82444896FAAC5EE2C3D699318C499@MN6PR11MB8244.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20230516095932.1525-6-dun.tan@intel.com>


> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> index 3deb1ffd67..a25a96f68c 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> @@ -1,7 +1,7 @@
>  /** @file
>  Page Fault (#PF) handler for X64 processors
> 
> -Copyright (c) 2009 - 2022, Intel Corporation. All rights reserved.<BR>
> +Copyright (c) 2009 - 2023, Intel Corporation. All rights reserved.<BR>
>  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
> 
>  SPDX-License-Identifier: BSD-2-Clause-Patent
> @@ -353,7 +353,12 @@ SmmInitPageTable (
>    m1GPageTableSupport           = Is1GPageSupport ();
>    m5LevelPagingNeeded           = Is5LevelPagingNeeded ();
>    mPhysicalAddressBits          = CalculateMaximumSupportAddress ();
> -  PatchInstructionX86 (gPatch5LevelPagingNeeded, m5LevelPagingNeeded,
> 1);
> +  if (m5LevelPagingNeeded) {
> +    mPagingMode = m1GPageTableSupport ? Paging5Level1GB : Paging5Level;
> +    PatchInstructionX86 (gPatch5LevelPagingNeeded, TRUE, 1);

1. this change assumes the default value in assembly is 0 while old logic doesn't
have such assumption. Can you patch the instruction no matter m5LevelPagingNeeded?


> +      DEBUG_CODE (
> +        if (((Attributes & EFI_MEMORY_RO) == 0) || (((Attributes &
> EFI_MEMORY_XP) == 0) && (mXdSupported))) {
> +        //
> +        // When mapping a range to present and EFI_MEMORY_RO or
> EFI_MEMORY_XP is not specificed,
> +        // check if [BaseAddress, BaseAddress + Length] contains present range.
> +        // Existing Present range in [BaseAddress, BaseAddress + Length] is set to
> NX disable and ReadOnly.
> +        //
> +        Count  = 0;
> +        Map    = NULL;
> +        Status = PageTableParse (PageTableBase, mPagingMode, NULL, &Count);
> +        while (Status == RETURN_BUFFER_TOO_SMALL) {
> +          if (Map != NULL) {
> +            FreePool (Map);
> +          }
> 
> -      if (IsModified != NULL) {
> -        *IsModified = TRUE;
> +          Map = AllocatePool (Count * sizeof (IA32_MAP_ENTRY));
> +          ASSERT (Map != NULL);
> +          Status = PageTableParse (PageTableBase, mPagingMode, Map, &Count);
> +        }
> +
> +        ASSERT_RETURN_ERROR (Status);
> +
> +        for (Index = 0; Index < Count; Index++) {
> +          if ((BaseAddress < Map[Index].LinearAddress +
> +               Map[Index].Length) && (BaseAddress + Length >
> Map[Index].LinearAddress))
> +          {
> +            DEBUG ((DEBUG_ERROR, "SMM ConvertMemoryPageAttributes:
> Existing Present range in [0x%lx, 0x%lx] is set to NX disable and ReadOnly\n",
> BaseAddress, BaseAddress + Length));
> +            break;
> +          }
> +        }
> +
> +        FreePool (Map);
>        }

2. What's the purpose of the above DEBUG_CODE()?
Because when mapping a range of memory from not-present to present,
the function clears all other attributes but only set the "present" bit.
If part of the range is "present" already, the function might reset
its other attributes. This is not expected by caller.
So, you want to notify caller?

Can you split this logic to a separate commit?
If the sub-range's attributes match to what you are going to set
for the entire range, caller can ignore such error message, right?



> 
> -      //
> -      // Just split current page
> -      // Convert success in next around
> -      //
> +        );
>      }
>    }
> 
> +  if (PagingAttrMask.Uint64 == 0) {
> +    return RETURN_SUCCESS;
> +  }
> +
> +  PageTableBufferSize = 0;
> +  Status              = PageTableMap (&PageTableBase, PagingMode, NULL,
> &PageTableBufferSize, BaseAddress, Length, &PagingAttribute,
> &PagingAttrMask, IsModified);
> +
> +  if (Status == RETURN_BUFFER_TOO_SMALL) {
> +    PageTableBuffer = AllocatePageTableMemory (EFI_SIZE_TO_PAGES
> (PageTableBufferSize));
> +    ASSERT (PageTableBuffer != NULL);
> +    Status = PageTableMap (&PageTableBase, PagingMode, PageTableBuffer,
> &PageTableBufferSize, BaseAddress, Length, &PagingAttribute,
> &PagingAttrMask, IsModified);
> +  }
> +
> +  if (Status == RETURN_INVALID_PARAMETER) {
> +    //
> +    // The only reason that PageTableMap returns
> RETURN_INVALID_PARAMETER here is to modify other attributes
> +    // of a non-present range but remains the non-present range still as non-
> present.
> +    //
> +    DEBUG ((DEBUG_ERROR, "SMM ConvertMemoryPageAttributes: Non-
> present range in [0x%lx, 0x%lx] needs to be removed\n", BaseAddress,
> BaseAddress + Length));

3. Don't quite understand. Can you describe in a clearer way?


  reply	other threads:[~2023-06-01  1:09 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-16  9:59 [Patch V4 00/15] Use CpuPageTableLib to create and update smm page table duntan
2023-05-16  9:59 ` [Patch V4 01/15] OvmfPkg: Add CpuPageTableLib required by PiSmmCpuDxe duntan
2023-05-16  9:59 ` [Patch V4 02/15] UefiPayloadPkg: " duntan
2023-05-16 10:01   ` Guo, Gua
2023-05-16  9:59 ` [Patch V4 03/15] OvmfPkg:Remove code that apply AddressEncMask to non-leaf entry duntan
2023-05-16  9:59 ` [Patch V4 04/15] MdeModulePkg: Remove RO and NX protection when unset guard page duntan
2023-05-16 19:04   ` [edk2-devel] " Kun Qin
2023-05-17 10:16     ` duntan
2023-05-16  9:59 ` [Patch V4 05/15] UefiCpuPkg: Use CpuPageTableLib to convert SMM paging attribute duntan
2023-06-01  1:09   ` Ni, Ray [this message]
2023-05-16  9:59 ` [Patch V4 06/15] UefiCpuPkg/PiSmmCpuDxeSmm: Avoid setting non-present range to RO/NX duntan
2023-05-16  9:59 ` [Patch V4 07/15] UefiCpuPkg/PiSmmCpuDxeSmm: Add 2 function to disable/enable CR0.WP duntan
2023-05-20  2:00   ` [edk2-devel] " Kun Qin
2023-05-23  9:14     ` duntan
2023-05-24 18:39       ` Kun Qin
2023-05-25  0:46         ` Ni, Ray
2023-05-26  2:48           ` Kun Qin
2023-06-02  3:09   ` Ni, Ray
2023-05-16  9:59 ` [Patch V4 08/15] UefiCpuPkg/PiSmmCpuDxeSmm: Clear CR0.WP before modify page table duntan
2023-06-02  3:12   ` [edk2-devel] " Ni, Ray
2023-05-16  9:59 ` [Patch V4 09/15] UefiCpuPkg: Extern mSmmShadowStackSize in PiSmmCpuDxeSmm.h duntan
2023-06-02  3:16   ` [edk2-devel] " Ni, Ray
2023-06-02  3:36     ` duntan
2023-05-16  9:59 ` [Patch V4 10/15] UefiCpuPkg: Add GenSmmPageTable() to create smm page table duntan
2023-06-02  3:23   ` [edk2-devel] " Ni, Ray
2023-06-02  3:36     ` duntan
2023-06-02  3:46       ` duntan
2023-06-02  5:08         ` Ni, Ray
2023-06-02  7:33           ` duntan
2023-05-16  9:59 ` [Patch V4 11/15] UefiCpuPkg: Use GenSmmPageTable() to create Smm S3 " duntan
2023-06-02  3:31   ` [edk2-devel] " Ni, Ray
2023-06-02  3:37     ` duntan
2023-05-16  9:59 ` [Patch V4 12/15] UefiCpuPkg: Sort mSmmCpuSmramRanges in FindSmramInfo duntan
2023-06-02  3:33   ` [edk2-devel] " Ni, Ray
2023-06-02  3:43     ` duntan
2023-05-16  9:59 ` [Patch V4 13/15] UefiCpuPkg: Sort mProtectionMemRange when ReadyToLock duntan
2023-06-02  3:34   ` Ni, Ray
2023-06-02  3:35     ` Ni, Ray
2023-06-02  3:55       ` duntan
2023-05-16  9:59 ` [Patch V4 14/15] UefiCpuPkg: Refinement to smm runtime InitPaging() code duntan
2023-06-02  3:54   ` [edk2-devel] " Ni, Ray
2023-06-02  3:59     ` duntan
2023-05-16  9:59 ` [Patch V4 15/15] UefiCpuPkg/PiSmmCpuDxeSmm: Remove unnecessary function duntan
2023-06-02  3:55   ` Ni, Ray

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-list from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=MN6PR11MB82444896FAAC5EE2C3D699318C499@MN6PR11MB8244.namprd11.prod.outlook.com \
    --to=devel@edk2.groups.io \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox