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Thread-Topic: [PATCH v6 2/6] UefiCpuPkg: Use macro CR4_CET_BIT to replace hard code value in Cet.nasm. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: nCFsad8jHfBnJTrgnEpz1Uadx7686176AA= Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=LNrej9Vj; arc=reject ("signature check failed: fail, {[1] = sig:microsoft.com:reject}"); dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Reviewed-by: Ray Ni Thanks, Ray > -----Original Message----- > From: Sheng, W > Sent: Tuesday, November 21, 2023 3:03 PM > To: devel@edk2.groups.io > Cc: Dong, Eric ; Ni, Ray ; Laszlo > Ersek ; Wu, Jiaxin ; Tan, Dun > > Subject: [PATCH v6 2/6] UefiCpuPkg: Use macro CR4_CET_BIT to replace > hard code value in Cet.nasm. >=20 > Signed-off-by: Sheng Wei > Cc: Eric Dong > Cc: Ray Ni > Cc: Laszlo Ersek > Cc: Wu Jiaxin > Cc: Tan Dun > Reviewed-by: Laszlo Ersek > --- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm | 5 +++-- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm | 5 +++-- > 2 files changed, 6 insertions(+), 4 deletions(-) >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm > b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm > index 9d66b9c5da..3d07da1cd4 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm > @@ -5,6 +5,7 @@ > ;-----------------------------------------------------------------------= -------- >=20 >=20 >=20 > %include "Nasm.inc" >=20 > +%include "Cet.inc" >=20 >=20 >=20 > SECTION .text >=20 >=20 >=20 > @@ -16,7 +17,7 @@ ASM_PFX(DisableCet): > incsspd eax >=20 >=20 >=20 > mov eax, cr4 >=20 > - btr eax, 23 ; clear CET >=20 > + btr eax, CR4_CET_BIT ; clear CET >=20 > mov cr4, eax >=20 > ret >=20 >=20 >=20 > @@ -24,7 +25,7 @@ global ASM_PFX(EnableCet) > ASM_PFX(EnableCet): >=20 >=20 >=20 > mov eax, cr4 >=20 > - bts eax, 23 ; set CET >=20 > + bts eax, CR4_CET_BIT ; set CET >=20 > mov cr4, eax >=20 >=20 >=20 > ; use jmp to skip the check for ret >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm > b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm > index 8bbdbb31cc..700aef4703 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm > @@ -5,6 +5,7 @@ > ;-----------------------------------------------------------------------= -------- >=20 >=20 >=20 > %include "Nasm.inc" >=20 > +%include "Cet.inc" >=20 >=20 >=20 > DEFAULT REL >=20 > SECTION .text >=20 > @@ -17,7 +18,7 @@ ASM_PFX(DisableCet): > incsspq rax >=20 >=20 >=20 > mov rax, cr4 >=20 > - btr eax, 23 ; clear CET >=20 > + btr eax, CR4_CET_BIT ; clear CET >=20 > mov cr4, rax >=20 > ret >=20 >=20 >=20 > @@ -25,7 +26,7 @@ global ASM_PFX(EnableCet) > ASM_PFX(EnableCet): >=20 >=20 >=20 > mov rax, cr4 >=20 > - bts eax, 23 ; set CET >=20 > + bts eax, CR4_CET_BIT ; set CET >=20 > mov cr4, rax >=20 >=20 >=20 > ; use jmp to skip the check for ret >=20 > -- > 2.26.2.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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