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X-Gm-Message-State: iUrcNxj0UCERjwPfhDfOr4ygx7686176AA= Content-Language: en-US Content-Type: multipart/alternative; boundary="_000_MN6PR11MB82444A65F94A70A5EA06C4A48C162MN6PR11MB8244namp_" X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=1ox6kK7o; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io --_000_MN6PR11MB82444A65F94A70A5EA06C4A48C162MN6PR11MB8244namp_ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Thanks, Ray ________________________________ From: Gerd Hoffmann Sent: Thursday, April 25, 2024 14:58 To: Ni, Ray Cc: Wu, Jiaxin ; devel@edk2.groups.io ; Zeng, Star ; Kumar, Rahul R ; Dong, Guo ; Rhodes, Sean ; Lu, James ; Guo, Gua ; Ard Biesh= euvel ; Yao, Jiewen ; Abdu= l Lateef Attar ; Abner Chang ; Tom Lendacky Subject: Re: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib Hi, > That means the SMMRevId is 0_xx64h for AMD64 processor. But I am not > sure what the value is for AMD32 processor. Maybe 0 according to the > OVMF logic. The smm emulation in the linux kernel uses 0 and 0x64. [Ray] OK. that supports the OVMF instance's logic. But I'd like Tom or any = other AMD guys to provide spec that says 0 for AMD32. > But, I am very suspicious about the logic in AMD's version as below: > --- AMD's version > SmmSaveStateRegisterLma =3D (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT= ; > > LMAValue =3D (UINT32)AsmReadMsr64 (EFER_ADDRESS) & LMA; > if (LMAValue) { > SmmSaveStateRegisterLma =3D (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_64B= IT; > } > --- > The above logic detects the current CPU mode and 64bit save state area la= yout is used if it's running in 64bit. > But if a AMD64 CPU runs in 32bit mode, the above logic causes the > 32bit save state area layout is used. It's not right! The save state > area layout does not depend on the CPU running mode, but whether it's > a legacy CPU or a 64-capable CPU. Well, that is not entirely clear to me. Could it be 64-bit processors support both 32-bit and 64-bit format, for backward compatibility reasons? [Ray] The CPU uses a fixed save state area layout no matter it runs in 32bi= t or 64bit. The 64bit cpu only uses the 64bit format, no matter it runs in 32bit or 64b= it. So OvmfPkgIa32 builds could use the 32-bit format, OvmfPkgX64 builds use the 64-bit format, everything works fine? [Ray] For OVMF, it depends on how the virtual cpu is defined by QEMU implem= entation. If the underline CPU is a AMD64 cpu, the CPU supports running in 32bit or 6= 4bit modes. But no matter it runs in 32bit or 64bit, the save state area layout always follows the 64= bit format. The tricky corner case is OvmfPkgIa32X64, where (after applying this series) 32-bit PEI should setup things for 64-bit SMM/DXE, and checking the current processor mode will not give use the result we need. > Jiaxin, I agree that the confusion should be cleaned up by AMD > experts. Let's not change any existing behavior. Agree. Tom? take care, Gerd -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118310): https://edk2.groups.io/g/devel/message/118310 Mute This Topic: https://groups.io/mt/105593568/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- --_000_MN6PR11MB82444A65F94A70A5EA06C4A48C162MN6PR11MB8244namp_ Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable


Thanks,
Ray

From: Gerd H= offmann <kraxel@redhat.com>
Sent: Thursday, April 25, 2024 14:58
To: Ni, Ray <ray.ni@intel.com>
Cc: Wu, Jiaxin <jiaxin.wu@intel.com>; devel@edk2.groups.i= o <devel@edk2.groups.io>; Zeng, Star <star.zeng@intel.com>; Kum= ar, Rahul R <rahul.r.kumar@intel.com>; Dong, Guo <guo.dong@intel.c= om>; Rhodes, Sean <sean@starlabs.systems>; Lu, James <james.lu@= intel.com>; Guo, Gua <gua.guo@intel.com>; Ard Biesheuvel <ardb+tianocore@kern= el.org>; Yao, Jiewen <jiewen.yao@intel.com>; Abdul Lateef Attar &l= t;AbdulLateef.Attar@amd.com>; Abner Chang <abner.chang@amd.com>; T= om Lendacky <thomas.lendacky@amd.com>
Subject: Re: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib=
 
  Hi,

> That means the SMMRevId is 0_xx64h for AMD64 processor. But I am not > sure what the value is for AMD32 processor. Maybe 0 according to the > OVMF logic.

The smm emulation in the linux kernel uses 0 and 0x64.
[Ray] OK. that sup= ports the OVMF instance's logic. But I'd like Tom or any other AMD guys to = provide spec that says 0 for AMD32.


> But, I am very suspicious about the logic in AMD's version as below: > --- AMD's version
>   SmmSaveStateRegisterLma =3D (UINT8)EFI_MM_SAVE_STATE_REGIS= TER_LMA_32BIT;
>
>   LMAValue =3D (UINT32)AsmReadMsr64 (EFER_ADDRESS) & LMA= ;
>   if (LMAValue) {
>     SmmSaveStateRegisterLma =3D (UINT8)EFI_MM_SAVE= _STATE_REGISTER_LMA_64BIT;
>   }
> ---
> The above logic detects the current CPU mode and 64bit save state area= layout is used if it's running in 64bit.

> But if a AMD64 CPU runs in 32bit mode, the above logic causes the
> 32bit save state area layout is used. It's not right!  The save s= tate
> area layout does not depend on the CPU running mode, but whether it's<= br> > a legacy CPU or a 64-capable CPU.

Well, that is not entirely clear to me.  Could it be 64-bit processors=
support both 32-bit and 64-bit format, for backward compatibility
reasons?

[Ray] The CPU uses= a fixed save state area layout no matter it runs in 32bit or 64bit.
The 64bit cpu only= uses the 64bit format, no matter it runs in 32bit or 64bit.


So OvmfPkgIa32 builds could use the 32-bit format, OvmfPkgX64 builds use the 64-bit format, everything works fine?

[Ray] For OVMF, it= depends on how the virtual cpu is defined by QEMU implementation.
If the underline C= PU is a AMD64 cpu, the CPU supports running in 32bit or 64bit modes. But no= matter
it runs in 32bit or 64bit, the save state area layout always follows the 64= bit format.

The tricky corner case is OvmfPkgIa32X64, where (after applying this
series) 32-bit PEI should setup things for 64-bit SMM/DXE, and checking
the current processor mode will not give use the result we need.

> Jiaxin, I agree that the confusion should be cleaned up by AMD
> experts. Let's not change any existing behavior.

Agree.  Tom?

take care,
  Gerd

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