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Mon, 1 Apr 2024 07:46:53 +0000 From: "Ni, Ray" To: "Tan, Dun" , "devel@edk2.groups.io" CC: "Lou, Yun" , "Chiu, Chasel" , "Desimone, Nathaniel L" , Liming Gao , "Dong, Eric" Subject: Re: [edk2-devel] [edk2-platforms V2 3/3] MinPlatformPkg: Sort ApicIdOrderTable by special rules Thread-Topic: [edk2-platforms V2 3/3] MinPlatformPkg: Sort ApicIdOrderTable by special rules Thread-Index: AQHag/p+JQ/M8mWIgEqzGqRWUC7zCLFTCYId Date: Mon, 1 Apr 2024 07:46:53 +0000 Message-ID: References: <20240401060411.899-1-dun.tan@intel.com> <20240401060411.899-4-dun.tan@intel.com> In-Reply-To: <20240401060411.899-4-dun.tan@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: x-ms-publictraffictype: Email x-ms-traffictypediagnostic: MN6PR11MB8244:EE_|DS7PR11MB7836:EE_ x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam-message-info: DdUNeJ7I4ut5bZDrWrY7QK28gRT/BqwplhCHseKFUbS4Jes7rdM3NsozsXH4VBl+RpBxA4p0X0Oonj2HY+wRGlaTIrjeNBJWLPhW1CFI7D9ugHbW3cQDpEUPZG4chihDQXmkkKJll1nT3V4/eDGvmpA8ehmX6QQgaGpPIGHSkn1WjPWnqe2ZI4sBKKoAk2G2txV4HiSa1Q2Qtft19+tjNrL+mL3RT3GRrfFcdKCRTcZBlLDgq7t/Uqq7yv1U8TL1Sv9Di0L3a6iWuvm5T3ukeLNfVG/WMcuY1nUTjjOx81uXuQghsb8ZQuKEOLWgD8rfX2nWnUtyZHB4vZ/8u2v28hhEOxB7y8ivRkKA/QI/oq82wNbmXj7dNcK1FbKgNwqqkG48SZXJ+Xx2VNTDLeguoTAdpjck8zyNOhZtgGs9x0gk/8x7d5wRZzufTb3o+lOZJvLMcSj9wFpqu76qM7rhoNlHgg6f3QXIo0UU+PvDWxZmjbFaTf0e8UdocW46C9HQRzbllx/rKp6QEWS6bY6pOUs7+fCTf0157FBn8yWwdi/oA63mRyiGCvdFzyy/JRdk6uXDP+kCiaTl3FNGj5rx20O8PpMA9PiBC+dGl5+DeAXjdR6rXwGCvW9a9BKGJFxG93hjPzj6UDjMJUxffrmmDR7/3BoVf4phRpNmLekVqK0= x-ms-exchange-antispam-messagedata-chunkcount: 1 x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?zHchKc7rJK0xWjby9ixAQzBxcYw2C21xdc/ouc/7KmZhlauwgyrlEcgaxNGo?= =?us-ascii?Q?9ajF+Seg2HZONzJrlrUXBe17dFatScJWVWYcLDDF6qL0qbLCwdpeUMQvQwOw?= =?us-ascii?Q?RPiyzK1wVT2NQ/l5DPG6ijLrc32OCGibhvgr8oUHQB4e4P0+EhN98/cIShzm?= =?us-ascii?Q?bqZsUlUFQX1ix1N5hcLekdez1H8KcPVwXOOueJIoZHCQugMG5ImJ6jRLiRfc?= =?us-ascii?Q?UYuC9SF3AU9fQro7h4L5yHWu/HAxWCR+5LLUjRcT1MedUVwXiktDIKqUf7D1?= =?us-ascii?Q?/s9CdMVS1LCfdS54lXS7ncJyk1/gESmx9Kr2SQ37C72PMblrT1Ar/+MWgy36?= =?us-ascii?Q?V7lj616igT8WlQ2GIrLQ5HaXznbuqxS07ob5wZDolnBRL8feJGI6iEcS5r9r?= =?us-ascii?Q?fC3+PL8OcwQ3F1MfQ5Wbh7ZTbT7/rKD3Y102mDJVmafSTTU5bguxYB+6oTC1?= =?us-ascii?Q?YM+c5w9W7cqyml9fXynbxrUNeiXaSJKwOY1uDqe7x5sGdmyYxaUZt4wfmR2m?= =?us-ascii?Q?sfC6gXW6/7nlkvpW2N66QM3xceLM1FDbWy2jmyjmxtFLVg0wdwwCAkhs0Ulh?= =?us-ascii?Q?STg+Je12CjrmDtykjmaHOXU39CJUBehKSk38XEcz7pVCgE9W+VMOamfM+6nF?= =?us-ascii?Q?TrVKW4IA1gsq1xqe61KFI7LTMXv927RkrHnmYbhZZYK7qHSE5l/FLGwnGlPf?= =?us-ascii?Q?Nl/k2uSQz2drOHurGtnqCL/uihmE9TMIdCM+esdXYxb0KLuja8LLLIQH7Y2z?= =?us-ascii?Q?ZEM8w4x3w3CVRi0ygC9W3Borkq+AsoQu3U08N14c6cXu3SGe+jf8ts4pU0wu?= =?us-ascii?Q?uf8F0AcM+Xivfe456iMoxhrv4No2hy2hezKqsS7gBN8Qzdyolf13w+SCI4Gd?= =?us-ascii?Q?b56M1ZXyr14gG0JwfuDrOyOBDi2HanNPQE0wMUId4k7ZbiiQ4nl0z0w89/yw?= =?us-ascii?Q?B4/Mu+V9hyajnkN1wr23IvRU+jWCzBzuTpsgn7EkaSmJzU7f+0wHEquKuDCq?= =?us-ascii?Q?3uju64v9Vx+xVaMvBWK4BwWHYOQm183/qD5ifnKU8oM2ZusA84SMQ0p0IEi+?= =?us-ascii?Q?KXfs4anOSiiI6mHIXkx0vrpLUapmT2H4f54/L9K3nJBNJmjzjUODM2FYmqFV?= =?us-ascii?Q?h/MApkMXmB0pXKEAjadryJUeMB9uCBpA/icFdWcwDzBXvcXuCnp3RRGEYyoK?= =?us-ascii?Q?tIkhNzk3faChTlDwef0jho6o5MVNA7Mk10CG0RGc9PCVIK4/X2YRC5eomWUR?= =?us-ascii?Q?P0jz/pUH+FjdksRl91f7OIntgwgy1Kcf0OTfUxZF9yIQoLCShNN5VP9742G7?= =?us-ascii?Q?O+2w+zHmdeYovJ//EEkaimu0Gpmobjj8acN4/7ts/K72Jvj4a0hVFmuMvieg?= =?us-ascii?Q?HN1SnMvCLZqTWLOsW2werZCo49qTr1yGZH2+dRolvCvH/prdSrmBv65FlZJw?= =?us-ascii?Q?6geAEoybE9ei9irh4qaYFBteSRxfPGfgjOEqRTFwYE2dn8NYGkGulL6EC7Ii?= =?us-ascii?Q?yWnPVpRv9ZMRUGJleGoKEQ2iZbxE9c6OTq0/8RtfAFDlkNRLm/JqTlj/vOvZ?= =?us-ascii?Q?o+HN/ep1YmZ406slo3s=3D?= MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MN6PR11MB8244.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4be98349-c053-4052-3979-08dc521fe5ba X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Apr 2024 07:46:53.1151 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: S+Y4qGxriaR4tFmV/WwU0+05AEEURok2h0xo/4jSgKBVDAM3Z6WT1aQXoTE/dElB9/o5ul5BGZFgNOey3Zy+sQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR11MB7836 X-OriginatorOrg: intel.com Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Mon, 01 Apr 2024 00:46:58 -0700 Reply-To: devel@edk2.groups.io,ray.ni@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: 1rJfd6Qs1fToRJ4gqyLjNy5Ex7686176AA= Content-Language: en-US Content-Type: multipart/alternative; boundary="_000_MN6PR11MB82444DE93D1F345BC28F13268C3F2MN6PR11MB8244namp_" X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=0mDzi+Aq; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io --_000_MN6PR11MB82444DE93D1F345BC28F13268C3F2MN6PR11MB8244namp_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Ray Ni Thanks, Ray ________________________________ From: Tan, Dun Sent: Monday, April 1, 2024 14:04 To: devel@edk2.groups.io Cc: Ni, Ray ; Lou, Yun ; Chiu, Chasel = ; Desimone, Nathaniel L ; Liming Gao ; Dong, Eric Subject: [edk2-platforms V2 3/3] MinPlatformPkg: Sort ApicIdOrderTable by s= pecial rules Sort ApicIdOrderTable by following special rules: 1. Make sure BSP is the first entry. 2. For APs, big core first, then small core. With this implementation, BIOS can present cores in order of relative performance in MADT. Linux OS would schedule cores by the order that they are presented in the MADT LocalX2ApicStruct entries.Then Linux OS would think of this as relative performance order. This implementation can benefit the linux os usage case. Signed-off-by: Dun Tan Cc: Ray Ni Cc: Jason Lou Cc: Chasel Chiu Cc: Nate DeSimone Cc: Liming Gao Cc: Eric Dong --- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 63 ++++++++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b= /Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c index 1fa70e3df9..389df48824 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c @@ -132,6 +132,62 @@ AppendCpuMapTableEntry ( } +/** + Sort CpuApicIdOrderTable based on the following rules: + 1.Make sure BSP is the first entry. + 2.Big core first, then small core. + + @param[in] CpuApicIdOrderTable Pointer to EFI_CPU_ID_ORDER_MAP + @param[in] Count Number to EFI_CPU_ID_ORDER_MAP + @param[in] BspIndex BSP index +**/ +VOID +SortApicIdOrderTable ( + IN EFI_CPU_ID_ORDER_MAP *CpuApicIdOrderTable, + IN UINTN Count, + IN UINTN BspIndex + ) +{ + UINTN Index; + UINTN SubIndex; + EFI_CPU_ID_ORDER_MAP SortBuffer; + + // + // Put BSP at the first entry. + // + if (BspIndex !=3D 0) { + CopyMem (&SortBuffer, &CpuApicIdOrderTable[BspIndex], sizeof (EFI_CPU_= ID_ORDER_MAP)); + CopyMem (&CpuApicIdOrderTable[1], CpuApicIdOrderTable, (BspIndex) * si= zeof (EFI_CPU_ID_ORDER_MAP)); + CopyMem (CpuApicIdOrderTable, &SortBuffer, sizeof (EFI_CPU_ID_ORDER_MA= P)); + } + + // + // If there are more than 2 cores, perform insertion sort for rest cores= except the bsp in first entry + // to move big cores in front of small cores. + // Also the original order based on the MpService index inside big cores= and small cores are retained. + // + for (Index =3D 2; Index < Count; Index++) { + if (CpuApicIdOrderTable[Index].CoreType =3D=3D CPUID_CORE_TYPE_INTEL_A= TOM) { + continue; + } + + CopyMem (&SortBuffer, &CpuApicIdOrderTable[Index], sizeof (EFI_CPU_ID_= ORDER_MAP)); + + for (SubIndex =3D Index - 1; SubIndex >=3D 1; SubIndex--) { + if (CpuApicIdOrderTable[SubIndex].CoreType =3D=3D CPUID_CORE_TYPE_IN= TEL_ATOM) { + CopyMem (&CpuApicIdOrderTable[SubIndex + 1], &CpuApicIdOrderTable[= SubIndex], sizeof (EFI_CPU_ID_ORDER_MAP)); + } else { + // + // Except the BSP, all cores in front of SubIndex must be big core= s. + // + break; + } + } + + CopyMem (&CpuApicIdOrderTable[SubIndex + 1], &SortBuffer, sizeof (EFI_= CPU_ID_ORDER_MAP)); + } +} + /** Get CPU core type. @@ -174,6 +230,7 @@ CreateCpuLocalApicInTable ( EFI_CPU_ID_ORDER_MAP *CpuIdMapPtr; UINT32 Socket; UINT32 CpuidMaxInput; + UINTN BspIndex; Status =3D EFI_SUCCESS; @@ -198,6 +255,10 @@ CreateCpuLocalApicInTable ( &ProcessorInfoBuffer ); + if ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_AS_BSP_BIT) !=3D 0) { + BspIndex =3D Index; + } + CpuIdMapPtr =3D (EFI_CPU_ID_ORDER_MAP *) &CpuApicIdOrderTable[Index]; if ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) !=3D 0) { CpuIdMapPtr->ApicId =3D (UINT32)ProcessorInfoBuffer.ProcessorId; @@ -230,6 +291,8 @@ CreateCpuLocalApicInTable ( } } + SortApicIdOrderTable (CpuApicIdOrderTable, mNumberOfCpus, BspIndex); + DEBUG ((DEBUG_INFO, "::ACPI:: APIC ID Order Table Init. mNumOfBitShif= t =3D %x\n", mNumOfBitShift)); DebugDisplayReOrderTable (CpuApicIdOrderTable); -- 2.31.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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Reviewed-by: Ray Ni <ray.ni@intel.com>



Thanks,
Ray
From: Tan, Dun <dun.tan@= intel.com>
Sent: Monday, April 1, 2024 14:04
To: devel@edk2.groups.io <devel@edk2.groups.io>
Cc: Ni, Ray <ray.ni@intel.com>; Lou, Yun <yun.lou@intel.com= >; Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <= ;nathaniel.l.desimone@intel.com>; Liming Gao <gaoliming@byosoft.com.c= n>; Dong, Eric <eric.dong@intel.com>
Subject: [edk2-platforms V2 3/3] MinPlatformPkg: Sort ApicIdOrderTab= le by special rules
 
Sort ApicIdOrderTable by following special rules:<= br> 1. Make sure BSP is the first entry.
2. For APs, big core first, then small core.

With this implementation, BIOS can present cores in order
of relative performance in MADT. Linux OS would schedule
cores by the order that they are presented in the MADT
LocalX2ApicStruct entries.Then Linux OS would think of
this as relative performance order. This implementation
can benefit the linux os usage case.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Jason Lou <yun.lou@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
---
 Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 63 +++= ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 63 insertions(+)

diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b= /Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
index 1fa70e3df9..389df48824 100644
--- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
+++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
@@ -132,6 +132,62 @@ AppendCpuMapTableEntry (
 
 }
 
+/**
+  Sort CpuApicIdOrderTable based on the following rules:
+  1.Make sure BSP is the first entry.
+  2.Big core first, then small core.
+
+  @param[in] CpuApicIdOrderTable      Pointe= r to EFI_CPU_ID_ORDER_MAP
+  @param[in] Count        &nb= sp;           Number to E= FI_CPU_ID_ORDER_MAP
+  @param[in] BspIndex        =          BSP index
+**/
+VOID
+SortApicIdOrderTable (
+  IN  EFI_CPU_ID_ORDER_MAP  *CpuApicIdOrderTable,
+  IN  UINTN         = ;        Count,
+  IN  UINTN         = ;        BspIndex
+  )
+{
+  UINTN          &n= bsp;      Index;
+  UINTN          &n= bsp;      SubIndex;
+  EFI_CPU_ID_ORDER_MAP  SortBuffer;
+
+  //
+  // Put BSP at the first entry.
+  //
+  if (BspIndex !=3D 0) {
+    CopyMem (&SortBuffer, &CpuApicIdOrderTable[BspI= ndex], sizeof (EFI_CPU_ID_ORDER_MAP));
+    CopyMem (&CpuApicIdOrderTable[1], CpuApicIdOrderTab= le, (BspIndex) * sizeof (EFI_CPU_ID_ORDER_MAP));
+    CopyMem (CpuApicIdOrderTable, &SortBuffer, sizeof (= EFI_CPU_ID_ORDER_MAP));
+  }
+
+  //
+  // If there are more than 2 cores, perform insertion sort for rest = cores except the bsp in first entry
+  // to move big cores in front of small cores.
+  // Also the original order based on the MpService index inside big = cores and small cores are retained.
+  //
+  for (Index =3D 2; Index < Count; Index++) {
+    if (CpuApicIdOrderTable[Index].CoreType =3D=3D CPUID_CO= RE_TYPE_INTEL_ATOM) {
+      continue;
+    }
+
+    CopyMem (&SortBuffer, &CpuApicIdOrderTable[Inde= x], sizeof (EFI_CPU_ID_ORDER_MAP));
+
+    for (SubIndex =3D Index - 1; SubIndex >=3D 1; SubInd= ex--) {
+      if (CpuApicIdOrderTable[SubIndex].CoreType = =3D=3D CPUID_CORE_TYPE_INTEL_ATOM) {
+        CopyMem (&CpuApicIdOrderTab= le[SubIndex + 1], &CpuApicIdOrderTable[SubIndex], sizeof (EFI_CPU_ID_OR= DER_MAP));
+      } else {
+        //
+        // Except the BSP, all cores in= front of SubIndex must be big cores.
+        //
+        break;
+      }
+    }
+
+    CopyMem (&CpuApicIdOrderTable[SubIndex + 1], &S= ortBuffer, sizeof (EFI_CPU_ID_ORDER_MAP));
+  }
+}
+
 /**
   Get CPU core type.
 
@@ -174,6 +230,7 @@ CreateCpuLocalApicInTable (
   EFI_CPU_ID_ORDER_MAP       =             &nb= sp;  *CpuIdMapPtr;
   UINT32         &n= bsp;            = ;            &n= bsp; Socket;
   UINT32         &n= bsp;            = ;            &n= bsp; CpuidMaxInput;
+  UINTN          &n= bsp;            = ;            &n= bsp; BspIndex;
 
   Status =3D EFI_SUCCESS;
 
@@ -198,6 +255,10 @@ CreateCpuLocalApicInTable (
            &nb= sp;            =    &ProcessorInfoBuffer
            &nb= sp;            =    );
 
+    if ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_AS_= BSP_BIT) !=3D 0) {
+      BspIndex =3D Index;
+    }
+
     CpuIdMapPtr =3D (EFI_CPU_ID_ORDER_MAP *) &CpuA= picIdOrderTable[Index];
     if ((ProcessorInfoBuffer.StatusFlag & PROCESSO= R_ENABLED_BIT) !=3D 0) {
       CpuIdMapPtr->ApicId  =3D (UINT= 32)ProcessorInfoBuffer.ProcessorId;
@@ -230,6 +291,8 @@ CreateCpuLocalApicInTable (
     }
   }
 
+  SortApicIdOrderTable (CpuApicIdOrderTable, mNumberOfCpus, BspIndex)= ;
+
   DEBUG ((DEBUG_INFO, "::ACPI::  APIC ID Order Table I= nit.   mNumOfBitShift =3D %x\n", mNumOfBitShift));
   DebugDisplayReOrderTable (CpuApicIdOrderTable);
 
--
2.31.1.windows.1

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