From: "Ni, Ray" <ray.ni@intel.com>
To: "Tan, Dun" <dun.tan@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Dong, Eric" <eric.dong@intel.com>,
"Kumar, Rahul R" <rahul.r.kumar@intel.com>,
Gerd Hoffmann <kraxel@redhat.com>
Subject: Re: [Patch V5 09/22] UefiCpuPkg/CpuPageTableLib: Add manual test to check Mask and Attr
Date: Fri, 24 Mar 2023 08:06:22 +0000 [thread overview]
Message-ID: <MN6PR11MB82444EA129241F9697E5E5928C849@MN6PR11MB8244.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20230324060020.940-10-dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
> -----Original Message-----
> From: Tan, Dun <dun.tan@intel.com>
> Sent: Friday, March 24, 2023 2:00 PM
> To: devel@edk2.groups.io
> Cc: Dong, Eric <eric.dong@intel.com>; Ni, Ray <ray.ni@intel.com>; Kumar,
> Rahul R <rahul.r.kumar@intel.com>; Gerd Hoffmann <kraxel@redhat.com>
> Subject: [Patch V5 09/22] UefiCpuPkg/CpuPageTableLib: Add manual test to
> check Mask and Attr
>
> Add manual test case to check input Mask and Attribute. The check
> steps are:
> 1.Create Page table to cover [0, 2G]. All fields of MapMask should
> be set.
> 2.Update Page table to set [2G - 8K,2G] from present to non-present.
> All fields of MapMask except present should not be set.
> 3.Still set [2G - 8K, 2G] as not present, this case is permitted.
> But set [2G - 8K, 2G] as RW is not permitted.
> 4.Update Page table to set [2G - 8K, 2G] as present and RW. All
> fields of MapMask should be set.
>
> Signed-off-by: Dun Tan <dun.tan@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Rahul Kumar <rahul1.kumar@intel.com>
> Tested-by: Gerd Hoffmann <kraxel@redhat.com>
> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
>
> UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUnitTestHo
> st.c | 129
> ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++--
> 1 file changed, 127 insertions(+), 2 deletions(-)
>
> diff --git
> a/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUnitTest
> Host.c
> b/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUnitTest
> Host.c
> index 3014a03243..52fae1864a 100644
> ---
> a/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUnitTest
> Host.c
> +++
> b/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/CpuPageTableLibUnitTest
> Host.c
> @@ -1,7 +1,7 @@
> /** @file
> Unit tests of the CpuPageTableLib instance of the CpuPageTableLib class
>
> - Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2022 - 2023, Intel Corporation. All rights reserved.<BR>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> **/
> @@ -697,6 +697,131 @@ TestCaseManualChangeNx (
> return UNIT_TEST_PASSED;
> }
>
> +/**
> + Check if the input Mask and Attribute is as expected when creating new
> page table or
> + updating existing page table.
> +
> + @param[in] Context [Optional] An optional parameter that enables:
> + 1) test-case reuse with varied parameters and
> + 2) test-case re-entry for Target tests that need a
> + reboot. This parameter is a VOID* and it is the
> + responsibility of the test author to ensure that the
> + contents are well understood by all test cases that may
> + consume it.
> +
> + @retval UNIT_TEST_PASSED The Unit test has completed and the
> test
> + case was successful.
> + @retval UNIT_TEST_ERROR_TEST_FAILED A test case assertion has failed.
> +**/
> +UNIT_TEST_STATUS
> +EFIAPI
> +TestCaseToCheckMapMaskAndAttr (
> + IN UNIT_TEST_CONTEXT Context
> + )
> +{
> + UINTN PageTable;
> + PAGING_MODE PagingMode;
> + VOID *Buffer;
> + UINTN PageTableBufferSize;
> + IA32_MAP_ATTRIBUTE MapAttribute;
> + IA32_MAP_ATTRIBUTE ExpectedMapAttribute;
> + IA32_MAP_ATTRIBUTE MapMask;
> + RETURN_STATUS Status;
> + IA32_MAP_ENTRY *Map;
> + UINTN MapCount;
> +
> + PagingMode = Paging4Level;
> + PageTableBufferSize = 0;
> + PageTable = 0;
> + Buffer = NULL;
> + MapAttribute.Uint64 = 0;
> + MapAttribute.Bits.Present = 1;
> + MapMask.Uint64 = 0;
> + MapMask.Bits.Present = 1;
> + //
> + // Create Page table to cover [0, 2G]. All fields of MapMask should be set.
> + //
> + Status = PageTableMap (&PageTable, PagingMode, Buffer,
> &PageTableBufferSize, 0, SIZE_2GB, &MapAttribute, &MapMask);
> + UT_ASSERT_EQUAL (Status, RETURN_INVALID_PARAMETER);
> + MapMask.Uint64 = MAX_UINT64;
> + Status = PageTableMap (&PageTable, PagingMode, Buffer,
> &PageTableBufferSize, 0, SIZE_2GB, &MapAttribute, &MapMask);
> + UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL);
> + Buffer = AllocatePages (EFI_SIZE_TO_PAGES (PageTableBufferSize));
> + Status = PageTableMap (&PageTable, PagingMode, Buffer,
> &PageTableBufferSize, 0, SIZE_2GB, &MapAttribute, &MapMask);
> + UT_ASSERT_EQUAL (Status, RETURN_SUCCESS);
> +
> + //
> + // Update Page table to set [2G - 8K, 2G] from present to non-present. All
> fields of MapMask except present should not be set.
> + //
> + PageTableBufferSize = 0;
> + MapAttribute.Uint64 = SIZE_2GB - SIZE_8KB;
> + MapMask.Uint64 = 0;
> + MapMask.Bits.Present = 1;
> + MapMask.Bits.ReadWrite = 1;
> + Status = PageTableMap (&PageTable, PagingMode, Buffer,
> &PageTableBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute,
> &MapMask);
> + UT_ASSERT_EQUAL (Status, RETURN_INVALID_PARAMETER);
> + MapMask.Bits.ReadWrite = 0;
> + Status = PageTableMap (&PageTable, PagingMode, Buffer,
> &PageTableBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute,
> &MapMask);
> + UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL);
> + Buffer = AllocatePages (EFI_SIZE_TO_PAGES (PageTableBufferSize));
> + Status = PageTableMap (&PageTable, PagingMode, Buffer,
> &PageTableBufferSize, 0, SIZE_2GB, &MapAttribute, &MapMask);
> + UT_ASSERT_EQUAL (Status, RETURN_SUCCESS);
> +
> + //
> + // Still set [2G - 8K, 2G] as not present, this case is permitted. But set [2G -
> 8K, 2G] as RW is not permitted.
> + //
> + PageTableBufferSize = 0;
> + MapAttribute.Uint64 = 0;
> + MapMask.Uint64 = 0;
> + MapMask.Bits.Present = 1;
> + Status = PageTableMap (&PageTable, PagingMode, Buffer,
> &PageTableBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute,
> &MapMask);
> + UT_ASSERT_EQUAL (Status, RETURN_SUCCESS);
> + MapAttribute.Bits.ReadWrite = 1;
> + MapMask.Bits.ReadWrite = 1;
> + Status = PageTableMap (&PageTable, PagingMode, Buffer,
> &PageTableBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute,
> &MapMask);
> + UT_ASSERT_EQUAL (Status, RETURN_INVALID_PARAMETER);
> +
> + //
> + // Update Page table to set [2G - 8K, 2G] as present and RW. All fields of
> MapMask should be set.
> + //
> + PageTableBufferSize = 0;
> + MapAttribute.Uint64 = SIZE_2GB - SIZE_8KB;
> + MapAttribute.Bits.ReadWrite = 1;
> + MapAttribute.Bits.Present = 1;
> + MapMask.Uint64 = 0;
> + MapMask.Bits.ReadWrite = 1;
> + MapMask.Bits.Present = 1;
> + Status = PageTableMap (&PageTable, PagingMode, Buffer,
> &PageTableBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute,
> &MapMask);
> + UT_ASSERT_EQUAL (Status, RETURN_INVALID_PARAMETER);
> + MapMask.Uint64 = MAX_UINT64;
> + Status = PageTableMap (&PageTable, PagingMode, Buffer,
> &PageTableBufferSize, SIZE_2GB - SIZE_8KB, SIZE_8KB, &MapAttribute,
> &MapMask);
> + UT_ASSERT_EQUAL (Status, RETURN_SUCCESS);
> +
> + MapCount = 0;
> + Status = PageTableParse (PageTable, PagingMode, NULL, &MapCount);
> + UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL);
> + Map = AllocatePages (EFI_SIZE_TO_PAGES (MapCount* sizeof
> (IA32_MAP_ENTRY)));
> + Status = PageTableParse (PageTable, PagingMode, Map, &MapCount);
> + UT_ASSERT_EQUAL (Status, RETURN_SUCCESS);
> +
> + //
> + // There should be two ranges [0, 2G-8k] with RW = 0 and [2G-8k, 2G] with
> RW = 1
> + //
> + UT_ASSERT_EQUAL (MapCount, 2);
> + UT_ASSERT_EQUAL (Map[0].LinearAddress, 0);
> + UT_ASSERT_EQUAL (Map[0].Length, SIZE_2GB - SIZE_8KB);
> + ExpectedMapAttribute.Uint64 = 0;
> + ExpectedMapAttribute.Bits.Present = 1;
> + UT_ASSERT_EQUAL (Map[0].Attribute.Uint64,
> ExpectedMapAttribute.Uint64);
> + UT_ASSERT_EQUAL (Map[1].LinearAddress, SIZE_2GB - SIZE_8KB);
> + UT_ASSERT_EQUAL (Map[1].Length, SIZE_8KB);
> + ExpectedMapAttribute.Uint64 = SIZE_2GB - SIZE_8KB;
> + ExpectedMapAttribute.Bits.Present = 1;
> + ExpectedMapAttribute.Bits.ReadWrite = 1;
> + UT_ASSERT_EQUAL (Map[1].Attribute.Uint64,
> ExpectedMapAttribute.Uint64);
> + return UNIT_TEST_PASSED;
> +}
> +
> /**
> Initialize the unit test framework, suite, and unit tests for the
> sample unit tests and run the unit tests.
> @@ -746,7 +871,7 @@ UefiTestMain (
> AddTestCase (ManualTestCase, "Check if the parent entry has different
> ReadWrite attribute", "Manual Test Case5",
> TestCaseManualChangeReadWrite, NULL, NULL, NULL);
> AddTestCase (ManualTestCase, "Check if the parent entry has different Nx
> attribute", "Manual Test Case6", TestCaseManualChangeNx, NULL, NULL,
> NULL);
> AddTestCase (ManualTestCase, "Check if the needed size is expected",
> "Manual Test Case7", TestCaseManualSizeNotMatch, NULL, NULL, NULL);
> -
> + AddTestCase (ManualTestCase, "Check MapMask when creating new page
> table or mapping not-present range", "Manual Test Case8",
> TestCaseToCheckMapMaskAndAttr, NULL, NULL, NULL);
> //
> // Populate the Random Test Cases.
> //
> --
> 2.31.1.windows.1
next prev parent reply other threads:[~2023-03-24 8:06 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-24 5:59 [Patch V5 00/22] Fix issues in CpuPageTableLib duntan
2023-03-24 5:59 ` [Patch V5 01/22] UefiCpuPkg/CpuPageTableLib: Remove unneeded 'if' condition duntan
2023-03-24 6:00 ` [Patch V5 02/22] UefiCpuPkg/CpuPageTableLib: Add check for input Length duntan
2023-03-24 6:00 ` [Patch V5 03/22] UefiCpuPkg/CpuPageTableLib:Initialize some LocalVariable at beginning duntan
2023-03-24 6:00 ` [Patch V5 04/22] UefiCpuPkg/CpuPageTableLib: Fix the non-1:1 mapping issue duntan
2023-03-24 6:00 ` [Patch V5 05/22] UefiCpuPkg/CpuPageTableLib:Clear PageSize bit(Bit7) for non-leaf duntan
2023-03-24 6:00 ` [Patch V5 06/22] UefiCpuPkg/CpuPageTableLib: Fix issue when splitting leaf entry duntan
2023-03-24 6:00 ` [Patch V5 07/22] UefiCpuPkg/MpInitLib: Add code to initialize MapMask duntan
2023-03-24 6:00 ` [Patch V5 08/22] UefiCpuPkg/CpuPageTableLib:Add check for Mask and Attr duntan
2023-03-24 8:06 ` Ni, Ray
2023-03-24 6:00 ` [Patch V5 09/22] UefiCpuPkg/CpuPageTableLib: Add manual test to check " duntan
2023-03-24 8:06 ` Ni, Ray [this message]
2023-03-24 6:00 ` [Patch V5 10/22] UefiCpuPkg/CpuPageTableLib:Modify RandomBoolean() in RandomTest duntan
2023-03-24 6:00 ` [Patch V5 11/22] UefiCpuPkg/CpuPageTableLib: Add LastMapEntry pointer duntan
2023-03-24 8:07 ` Ni, Ray
2023-03-24 6:00 ` [Patch V5 12/22] UefiCpuPkg/CpuPageTableLib:Modify RandomTest to check Mask/Attr duntan
2023-03-24 8:07 ` Ni, Ray
2023-03-24 6:00 ` [Patch V5 13/22] UefiCpuPkg/CpuPageTableLib: Enable non-1:1 mapping in random test duntan
2023-03-24 6:00 ` [Patch V5 14/22] UefiCpuPkg/CpuPageTableLib: Add OUTPUT IsModified parameter duntan
2023-03-24 8:08 ` Ni, Ray
2023-03-24 6:00 ` [Patch V5 15/22] UefiCpuPkg/CpuPageTableLib: Modify RandomTest to check IsModified duntan
2023-03-24 6:00 ` [Patch V5 16/22] UefiCpuPkg: Fix IA32 build failure in CpuPageTableLib.inf duntan
2023-03-24 6:00 ` [Patch V5 17/22] UefiCpuPkg: Modify UnitTest code since tested API is changed duntan
2023-03-24 6:00 ` [Patch V5 18/22] UefiCpuPkg/CpuPageTableLib: Add check for page table creation duntan
2023-03-24 6:00 ` [Patch V5 19/22] UefiCpuPkg: Combine branch for non-present and leaf ParentEntry duntan
2023-03-24 8:09 ` Ni, Ray
2023-03-24 6:00 ` [Patch V5 20/22] UefiCpuPkg/CpuPageTableLib: Enable PAE paging duntan
2023-03-24 8:10 ` Ni, Ray
2023-03-24 6:00 ` [Patch V5 21/22] UefiCpuPkg/CpuPageTableLib: Add RandomTest for " duntan
2023-03-24 6:00 ` [Patch V5 22/22] UefiCpuPkg/CpuPageTableLib: Reduce the number of random tests duntan
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