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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Ray Ni > -----Original Message----- > From: Tan, Dun > Sent: Friday, March 24, 2023 2:00 PM > To: devel@edk2.groups.io > Cc: Dong, Eric ; Ni, Ray ; Kumar, > Rahul R ; Gerd Hoffmann > Subject: [Patch V5 19/22] UefiCpuPkg: Combine branch for non-present and > leaf ParentEntry >=20 > Combine 'if' condition branch for non-present and leaf Parent > Entry in PageTableLibMapInLevel. Most steps of these two condition > are the same. This commit doesn't change any functionality. >=20 > Signed-off-by: Dun Tan > Cc: Eric Dong > Cc: Ray Ni > Cc: Rahul Kumar > Tested-by: Gerd Hoffmann > Acked-by: Gerd Hoffmann > --- > UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c | 85 > ++++++++++++++++++++++++++++++++-----------------------------------------= - > ----------- > 1 file changed, 32 insertions(+), 53 deletions(-) >=20 > diff --git a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c > b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c > index ad1e263084..2430f1b37c 100644 > --- a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c > +++ b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c > @@ -351,68 +351,45 @@ PageTableLibMapInLevel ( > // ParentPagingEntry ONLY is deferenced for checking Present and > MustBeOne bits > // when Modify is FALSE. > // > - > - if (ParentPagingEntry->Pce.Present =3D=3D 0) { > - // > - // [LinearAddress, LinearAddress + Length] contains non-present rang= e. > - // > - Status =3D IsAttributesAndMaskValidForNonPresentEntry (Attribute, Ma= sk); > - if (RETURN_ERROR (Status)) { > - return Status; > - } > - > - // > - // Check the attribute in ParentPagingEntry is equal to attribute ca= lculated > by input Attribue and Mask. > - // > - PleBAttribute.Uint64 =3D PageTableLibGetPleBMapAttribute > (&ParentPagingEntry->PleB, ParentAttribute); > - if ((IA32_MAP_ATTRIBUTE_ATTRIBUTES (&PleBAttribute) & > IA32_MAP_ATTRIBUTE_ATTRIBUTES (Mask)) > - =3D=3D (IA32_MAP_ATTRIBUTE_ATTRIBUTES (Attribute) & > IA32_MAP_ATTRIBUTE_ATTRIBUTES (Mask))) > - { > - return RETURN_SUCCESS; > - } > - > + if ((ParentPagingEntry->Pce.Present =3D=3D 0) || IsPle (ParentPagingEn= try, > Level + 1)) { > // > - // The parent entry is CR3 or PML5E/PML4E/PDPTE/PDE. > + // When ParentPagingEntry is non-present, parent entry is CR3 or > PML5E/PML4E/PDPTE/PDE. > // It does NOT point to an existing page directory. > + // When ParentPagingEntry is present, parent entry is leaf PDPTE_1G = or > PDE_2M. Split to 2M or 4K pages. > + // Note: it's impossible the parent entry is a PTE_4K. > // > - ASSERT (Buffer =3D=3D NULL || *BufferSize >=3D SIZE_4KB); > - CreateNew =3D TRUE; > - *BufferSize -=3D SIZE_4KB; > - > - if (Modify) { > - ParentPagingEntry->Uintn =3D (UINTN)Buffer + *BufferSize; > - ZeroMem ((VOID *)ParentPagingEntry->Uintn, SIZE_4KB); > - // > - // Set default attribute bits for PML5E/PML4E/PDPTE/PDE. > - // > - PageTableLibSetPnle (&ParentPagingEntry->Pnle, &NopAttribute, > &AllOneMask); > - } else { > + PleBAttribute.Uint64 =3D PageTableLibGetPleBMapAttribute > (&ParentPagingEntry->PleB, ParentAttribute); > + if (ParentPagingEntry->Pce.Present =3D=3D 0) { > // > - // Just make sure Present and MustBeZero (PageSize) bits are accur= ate. > + // [LinearAddress, LinearAddress + Length] contains non-present ra= nge. > // > + Status =3D IsAttributesAndMaskValidForNonPresentEntry (Attribute, > Mask); > + if (RETURN_ERROR (Status)) { > + return Status; > + } > + > OneOfPagingEntry.Pnle.Uint64 =3D 0; > + } else { > + PageTableLibSetPle (Level, &OneOfPagingEntry, 0, &PleBAttribute, > &AllOneMask); > } > - } else if (IsPle (ParentPagingEntry, Level + 1)) { > - // > - // The parent entry is a PDPTE_1G or PDE_2M. Split to 2M or 4K pages= . > - // Note: it's impossible the parent entry is a PTE_4K. > - // > + > // > - // Use NOP attributes as the attribute of grand-parents because CPU = will > consider > - // the actual attributes of grand-parents when determing the memory > type. > + // Check if the attribute, the physical address calculated by > ParentPagingEntry is equal to > + // the attribute, the physical address calculated by input Attribue = and > Mask. > // > - PleBAttribute.Uint64 =3D PageTableLibGetPleBMapAttribute > (&ParentPagingEntry->PleB, ParentAttribute); > if ((IA32_MAP_ATTRIBUTE_ATTRIBUTES (&PleBAttribute) & > IA32_MAP_ATTRIBUTE_ATTRIBUTES (Mask)) > =3D=3D (IA32_MAP_ATTRIBUTE_ATTRIBUTES (Attribute) & > IA32_MAP_ATTRIBUTE_ATTRIBUTES (Mask))) > { > - // > - // This function is called when the memory length is less than the= region > length of the parent level. > - // No need to split the page when the attributes equal. > - // > if ((Mask->Bits.PageTableBaseAddressLow =3D=3D 0) && (Mask- > >Bits.PageTableBaseAddressHigh =3D=3D 0)) { > return RETURN_SUCCESS; > } >=20 > + // > + // Non-present entry won't reach there since: > + // 1.When map non-present entry to present, the attribute must be > different. > + // 2.When still map non-present entry to non-present, > PageTableBaseAddressLow and High in Mask must be 0. > + // > + ASSERT (ParentPagingEntry->Pce.Present =3D=3D 1); > PhysicalAddrInEntry =3D > IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS (&PleBAttribute) + > (UINT64)PagingEntryIndex * RegionLength; > PhysicalAddrInAttr =3D > (IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS (Attribute) + Offset) > & (~RegionMask); > if (PhysicalAddrInEntry =3D=3D PhysicalAddrInAttr) { > @@ -423,17 +400,19 @@ PageTableLibMapInLevel ( > ASSERT (Buffer =3D=3D NULL || *BufferSize >=3D SIZE_4KB); > CreateNew =3D TRUE; > *BufferSize -=3D SIZE_4KB; > - PageTableLibSetPle (Level, &OneOfPagingEntry, 0, &PleBAttribute, > &AllOneMask); > + > if (Modify) { > - // > - // Create 512 child-level entries that map to 2M/4K. > - // > PagingEntry =3D (IA32_PAGING_ENTRY *)((UINTN)Buffer + *BufferSize)= ; > ZeroMem (PagingEntry, SIZE_4KB); >=20 > - for (SubOffset =3D 0, Index =3D 0; Index < 512; Index++) { > - PagingEntry[Index].Uint64 =3D OneOfPagingEntry.Uint64 + SubOffse= t; > - SubOffset +=3D RegionLength; > + if (ParentPagingEntry->Pce.Present) { > + // > + // Create 512 child-level entries that map to 2M/4K. > + // > + for (SubOffset =3D 0, Index =3D 0; Index < 512; Index++) { > + PagingEntry[Index].Uint64 =3D OneOfPagingEntry.Uint64 + SubOff= set; > + SubOffset +=3D RegionLength; > + } > } >=20 > // > -- > 2.31.1.windows.1