From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail03.groups.io (mail03.groups.io [45.79.227.220]) by spool.mail.gandi.net (Postfix) with ESMTPS id 0B79A9414DE for ; Thu, 11 Apr 2024 08:22:05 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=Ox+4hxCAb3AAn8Ku1WNul2uWfgKjZiKGtmKbk3w2mzg=; c=relaxed/simple; d=groups.io; h=From:To:CC:Subject:Thread-Topic:Thread-Index:Date:Message-ID:References:In-Reply-To:Accept-Language:msip_labels:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Resent-From:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Language:Content-Type; s=20240206; t=1712823724; v=1; b=0HKgPI//ckQuklidMd2yNb64qYWgX3mvM8aeK8jo2uN/hZPRTFOc1yN7KPjAYBeVLbTIjzmX lJosu1BnQQ8MIUVnOq+EmqhyOEaPOkB3Dw6ZR98x0h6/r9zrhTT5S0aI8lNCEWsYbUy3ftvzBhH o6JZVTZBNuFYoknwfHitbjLS/61gC6pU3XE2FWRnT0YJ2Iq15pbV1XDbhBC4bOyBtOGI5KAOr39 AKtDpXXRJ7kli7kpzKA7eAoI4fmsi+ciIQrxEGmU7f0Y0oskJEaRyitkN6PDKPjpxcrIdbxMgVM B8XQQMviSvYZR0SmKrrEK4yxFU23Ax88RjmvIqCe19ceA== X-Received: by 127.0.0.2 with SMTP id tBbSYY7687511xrDp9uQYPzV; Thu, 11 Apr 2024 01:22:04 -0700 X-Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by mx.groups.io with SMTP id smtpd.web11.12480.1712823723787721985 for ; Thu, 11 Apr 2024 01:22:03 -0700 X-CSE-ConnectionGUID: Qb0m7CQOTOyJwHoaqA7Rog== X-CSE-MsgGUID: 2v8vORwmSf6Rcysc0N8EAQ== X-IronPort-AV: E=McAfee;i="6600,9927,11039"; a="8327933" X-IronPort-AV: E=Sophos;i="6.07,192,1708416000"; d="scan'208,217";a="8327933" X-Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Apr 2024 01:22:03 -0700 X-CSE-ConnectionGUID: s9A6DQqbScKRQFzPCylMZg== X-CSE-MsgGUID: 9Ymr9QNkQMqy0Vk7/zuQkg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,192,1708416000"; d="scan'208,217";a="25477321" X-Received: from orsmsx603.amr.corp.intel.com ([10.22.229.16]) by fmviesa004.fm.intel.com with ESMTP/TLS/AES256-GCM-SHA384; 11 Apr 2024 01:22:03 -0700 X-Received: from orsmsx611.amr.corp.intel.com (10.22.229.24) by ORSMSX603.amr.corp.intel.com (10.22.229.16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 11 Apr 2024 01:22:02 -0700 X-Received: from orsmsx603.amr.corp.intel.com (10.22.229.16) by ORSMSX611.amr.corp.intel.com (10.22.229.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 11 Apr 2024 01:22:01 -0700 X-Received: from ORSEDG602.ED.cps.intel.com (10.7.248.7) by orsmsx603.amr.corp.intel.com (10.22.229.16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35 via Frontend Transport; Thu, 11 Apr 2024 01:22:01 -0700 X-Received: from NAM04-DM6-obe.outbound.protection.outlook.com (104.47.73.40) by edgegateway.intel.com (134.134.137.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.35; Thu, 11 Apr 2024 01:22:01 -0700 X-Received: from MN6PR11MB8244.namprd11.prod.outlook.com (2603:10b6:208:470::14) by CH0PR11MB8166.namprd11.prod.outlook.com (2603:10b6:610:182::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7430.46; Thu, 11 Apr 2024 08:21:59 +0000 X-Received: from MN6PR11MB8244.namprd11.prod.outlook.com ([fe80::2c31:82b7:9f26:5817]) by MN6PR11MB8244.namprd11.prod.outlook.com ([fe80::2c31:82b7:9f26:5817%5]) with mapi id 15.20.7430.045; Thu, 11 Apr 2024 08:21:59 +0000 From: "Ni, Ray" To: "Wu, Jiaxin" , "devel@edk2.groups.io" CC: Ard Biesheuvel , "Yao, Jiewen" , Gerd Hoffmann Subject: Re: [edk2-devel] [PATCH v1 09/13] OvmfPkg/SmmAccess: Consume gEfiSmmSmramMemoryGuid Thread-Topic: [PATCH v1 09/13] OvmfPkg/SmmAccess: Consume gEfiSmmSmramMemoryGuid Thread-Index: AQHai08a65M/SXqSN0WDH2TOQmWVubFiu9Xu Date: Thu, 11 Apr 2024 08:21:59 +0000 Message-ID: References: <20240410135724.15344-1-jiaxin.wu@intel.com> <20240410135724.15344-10-jiaxin.wu@intel.com> In-Reply-To: <20240410135724.15344-10-jiaxin.wu@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: x-ms-publictraffictype: Email x-ms-traffictypediagnostic: MN6PR11MB8244:EE_|CH0PR11MB8166:EE_ x-ms-office365-filtering-correlation-id: a62e68d7-9c15-4594-f4f4-08dc5a007541 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam-message-info: t/Q5BG5IhN9gIXODOsuNY1mjnMrlAhKTssu2RbGhLrHMf7EwsJbba3rFsONpyhN3JBWtBKSVMPCXyvlIo4OBGdNQD19IYVJC/bHzb52C6vnfANQ5T6cxRZzHWJwIkjOoT7l/8l0359xqLT8B7dqBACqWdUSRjE8tL2ygSiX6Sny2LOChoypRZC1KHYdeUKIwWZ5sg/XtfRxzvwDrtSH0Qw11iO88qbuCK70wGH+oxR0Zp+bveGmwHJD9nh3B8I1tEF7XFpeAs4CGgylcUQoOl2f+n11A1uMFH9IEX28cyzFd7loHGFJ/UP/tou+F/B+pRrMc+AvAz55pKcos05Cv0K8Kn+YDzVJmWRZuQ//Jcz66F1+po/4cyGlH2c7SpuW7FUxpxsRAcJPfRFq9I1Z4VL8VHrqccnYfa7NvFwYbMDJjehCE2Ww2ZdL73+wYxoiWc6zK2/MRMMspRHbdnPXqJN+lF9ok2hMuRJtWaZD1v3uzPdoSwGmRtPLU6bVIcNKNpOIUIWLIO46i9y5zPbsbypUoRZLEASJtShNlEHzJ/zyjvd2n1hI4S5URhCLMVmG+kVCp4dCqWanTYFVcEBgWHRnBCs5SmfA4QBwMJ5JaoBYX01AQ8jw2vthMkEkQYThT8QVSm00pAPtS79lCVMOmBze1jJNP97kf2KVjA/B1z4o9Sn6JGSXQKYNySA67acxUU+BdLlnXSGIneUh2HlZeh6Zn2ll9TQ00RdexHtr7wQ8= x-ms-exchange-antispam-messagedata-chunkcount: 1 x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?0DVLev+pc9e2ZBOsSNh3Fm9busDasV2MgGBlemC+h5JLO4YQ/tO3T0c9X6lt?= =?us-ascii?Q?JtEe3cpXk1WbI1veqYSRGiVCPwTb3R6ADLzQcovbMoDz66zO+ollx5cbJiPa?= =?us-ascii?Q?Bljbzflgao6VLcu3Wx+/zDQQw+UBDd6DsuwW+g2gQLCRWS9h6kSc9O+HeyXY?= =?us-ascii?Q?BLrYAFfBDLeoLkIFUgju/FDdLcwHkd97XVKInjUIqjL4nUjUnn2UYi0vMIhb?= =?us-ascii?Q?mW2QdfsYefuRemJ/TQNvGSxgDbJHUf7S5jYSz0nNI69ZPmkFpZSE5kv9P+5j?= =?us-ascii?Q?lEy6CQj6KpBrD0KzJrHJje2ZG6FAK37fHfn/BTnNXI7YS/TTWdTOS4G7CwgX?= =?us-ascii?Q?LKBl5/a3lPDh/N+aPR6c+2JKwa6B1MaQQVGYWtSp2+Uv/4flekDWPnIxXJcI?= =?us-ascii?Q?ZPjGG2yAJr97gn3MfybeeNU6mKYooLZ0UKDNrAc7aZmiOCsQRUEyxZUp1B7z?= =?us-ascii?Q?jXgCjDSiduompdeU3dkbZD4kcG+8mxUSIp8/wlHxE260tPLT3HBSyCqbvJ9t?= =?us-ascii?Q?GPLkoYDZd7xAzVuwYD4COtL9aqa45yMUUZbe20hnSLaOVY3PdUIb6Q37WwDu?= =?us-ascii?Q?RgQkz9TZoBClu5Y2iuSA39o9Vk2WTt02RoDqKpyW4KiSOLdFZfMaYrGWtId9?= =?us-ascii?Q?cu7nTWSJYz7ZD3ljI0UI3pe0sZUY7B0ni4r3QHsamsIjA1qfxI/jkefkSaUu?= =?us-ascii?Q?gf+LCIx6mdUEIKQDQNh+iXsBA3ufyjeu5yUu0L5R6HYXsMtdz6j+ZtDRYF7W?= =?us-ascii?Q?7JpfkT86I0m27OkZaF7AuNTvC7+gHXPlRpm4DMPDZda5JmFGl8TebYJ0u0xz?= =?us-ascii?Q?AazJOy2wfmfOyxIjlFzSDKK7qIOZsKnL0fsnxovowb2D5lpL48RvabivAKhP?= =?us-ascii?Q?PiKmY2Zxb1cbGkSHJF0O2U46Fz6VcAGtQizYcArpoiQoFfQXeUeTLb/1/r0V?= =?us-ascii?Q?CopdRmbl6a+zsyJhVQhUpkswimOsn8su4XkgUnRQ2/lXW4BoCyG9vHMYdvMJ?= =?us-ascii?Q?Tz4sN4aDCsT0MxCiu13PlF4Q58rmt1nrRmalifexFeYe+siWucoDj+pTyrBX?= =?us-ascii?Q?2fVNn7lD7xIvwBPD9lr7CY36YbTDZRdNOLatD2JCMTSmNdajqhPJ14aWvXS8?= =?us-ascii?Q?ZrdKrMscnjJPOBF1Uw2MVgBcBmayzSHKBDwSR/Z9jLWUULeBuyWR5/Axsc6b?= =?us-ascii?Q?rJhYhs9ybkSe0i/JnJyWspusa72VPVtJ2Vd1CXl/i3AU4h91kYfMDC6QsJYa?= =?us-ascii?Q?a8aswbtpx3/S2GqZD9a8gBlrufZugZPe6iubFlgwawVRCZDY34zL49FQByB6?= =?us-ascii?Q?Q9o83S1Agjl1i4ocF8250F1eTo7hWW8EvTS1s2kcOxraR5hL/1zzReCI6z6o?= =?us-ascii?Q?89x4ucGj4UgE9J2ITAViGbEKdhkXG76y+SCrkZfoNJF2bbgFi6DlGsTfU0xz?= =?us-ascii?Q?XKcN67FDRoI7sEsD2MxtXrx5PMMy6v6oazGttn/OaTJoLndB3dmlMCX7jM4n?= =?us-ascii?Q?l/wmOcpqoIXIsM2+2PJDQTS2/CZ5GtNiEhr2rNHjJtZVHY/SS5ZgPKYb7Goj?= =?us-ascii?Q?cwC9mr4tMcYHAolSvQA=3D?= MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MN6PR11MB8244.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: a62e68d7-9c15-4594-f4f4-08dc5a007541 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Apr 2024 08:21:59.3037 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: rJ+cRVNKRRJ8ssphAAQkLnZr+DSAgATrDW06xREP7EO34XW7ulKkjVasaygt2OZzq2BDp8GnWrfDjtTIYuoK7w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR11MB8166 X-OriginatorOrg: intel.com Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Thu, 11 Apr 2024 01:22:04 -0700 Resent-From: ray.ni@intel.com Reply-To: devel@edk2.groups.io,ray.ni@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: x8TbCCeGJDlU8LOoLxiW0mJEx7686176AA= Content-Language: en-US Content-Type: multipart/alternative; boundary="_000_MN6PR11MB824481DFB41B1B119E9C5E138C052MN6PR11MB8244namp_" X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b="0HKgPI//"; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.227.220 as permitted sender) smtp.mailfrom=bounce@groups.io --_000_MN6PR11MB824481DFB41B1B119E9C5E138C052MN6PR11MB8244namp_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Do you think it makes sense to combine this with #10? Otherwise, with this = patch the OVMF is broken. Thanks, Ray ________________________________ From: Wu, Jiaxin Sent: Wednesday, April 10, 2024 21:57 To: devel@edk2.groups.io Cc: Ard Biesheuvel ; Yao, Jiewen ; Gerd Hoffmann ; Ni, Ray Subject: [PATCH v1 09/13] OvmfPkg/SmmAccess: Consume gEfiSmmSmramMemoryGuid This patch refines the SmmAccess implementation: 1. SmramMap will be retrieved from the gEfiSmmSmramMemoryGuid instead of original from the TSEG Memory Base register. 2. Remove the gEfiAcpiVariableGuid creation, thus the DESCRIPTOR_INDEX definition can be also cleaned. The gEfiAcpiVariableGuid HOB will be created in the OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf. Cc: Ard Biesheuvel Cc: Jiewen Yao Cc: Gerd Hoffmann Cc: Ray Ni Signed-off-by: Jiaxin Wu --- OvmfPkg/SmmAccess/SmmAccess2Dxe.c | 4 +- OvmfPkg/SmmAccess/SmmAccess2Dxe.inf | 5 +++ OvmfPkg/SmmAccess/SmmAccessPei.c | 88 +++------------------------------= ---- OvmfPkg/SmmAccess/SmmAccessPei.inf | 7 +-- OvmfPkg/SmmAccess/SmramInternal.c | 73 +++++++++++------------------- OvmfPkg/SmmAccess/SmramInternal.h | 18 +------- 6 files changed, 41 insertions(+), 154 deletions(-) diff --git a/OvmfPkg/SmmAccess/SmmAccess2Dxe.c b/OvmfPkg/SmmAccess/SmmAcces= s2Dxe.c index 4b9e6df37f..3371592de7 100644 --- a/OvmfPkg/SmmAccess/SmmAccess2Dxe.c +++ b/OvmfPkg/SmmAccess/SmmAccess2Dxe.c @@ -4,11 +4,11 @@ Q35 TSEG is expected to have been verified and set up by the SmmAccessPe= i driver. Copyright (C) 2013, 2015, Red Hat, Inc.
- Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.
+ Copyright (c) 2009 - 2024, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -113,12 +113,10 @@ SmmAccess2DxeGetCapabilities ( IN OUT UINTN *SmramMapSize, IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap ) { return SmramAccessGetCapabilities ( - This->LockState, - This->OpenState, SmramMapSize, SmramMap ); } diff --git a/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf b/OvmfPkg/SmmAccess/SmmAcc= ess2Dxe.inf index d86381d0fb..d9f01a13c4 100644 --- a/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf +++ b/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf @@ -3,10 +3,11 @@ # # Q35 TSEG is expected to have been verified and set up by the SmmAccessPe= i # driver. # # Copyright (C) 2013, 2015, Red Hat, Inc. +# Copyright (c) 2024 Intel Corporation. # # SPDX-License-Identifier: BSD-2-Clause-Patent # ## @@ -39,17 +40,21 @@ DebugLib PcdLib PciLib UefiBootServicesTableLib UefiDriverEntryPoint + HobLib [Protocols] gEfiSmmAccess2ProtocolGuid ## PRODUCES [FeaturePcd] gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire +[Guids] + gEfiSmmSmramMemoryGuid # ALWAYS_CONSUMED + [Pcd] gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes [Depex] diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.c b/OvmfPkg/SmmAccess/SmmAccess= Pei.c index 0e57b7804c..9459bcc989 100644 --- a/OvmfPkg/SmmAccess/SmmAccessPei.c +++ b/OvmfPkg/SmmAccess/SmmAccessPei.c @@ -9,21 +9,19 @@ This PEIM runs from RAM, so we can write to variables with static storag= e duration. Copyright (C) 2013, 2015, Red Hat, Inc.
- Copyright (c) 2010, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2024, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ -#include #include #include #include -#include #include #include #include #include #include @@ -62,14 +60,10 @@ SmmAccessPeiOpen ( IN EFI_PEI_SERVICES **PeiServices, IN PEI_SMM_ACCESS_PPI *This, IN UINTN DescriptorIndex ) { - if (DescriptorIndex >=3D DescIdxCount) { - return EFI_INVALID_PARAMETER; - } - // // According to current practice, DescriptorIndex is not considered at a= ll, // beyond validating it. // return SmramAccessOpen (&This->LockState, &This->OpenState); @@ -100,14 +94,10 @@ SmmAccessPeiClose ( IN EFI_PEI_SERVICES **PeiServices, IN PEI_SMM_ACCESS_PPI *This, IN UINTN DescriptorIndex ) { - if (DescriptorIndex >=3D DescIdxCount) { - return EFI_INVALID_PARAMETER; - } - // // According to current practice, DescriptorIndex is not considered at a= ll, // beyond validating it. // return SmramAccessClose (&This->LockState, &This->OpenState); @@ -137,14 +127,10 @@ SmmAccessPeiLock ( IN EFI_PEI_SERVICES **PeiServices, IN PEI_SMM_ACCESS_PPI *This, IN UINTN DescriptorIndex ) { - if (DescriptorIndex >=3D DescIdxCount) { - return EFI_INVALID_PARAMETER; - } - // // According to current practice, DescriptorIndex is not considered at a= ll, // beyond validating it. // return SmramAccessLock (&This->LockState, &This->OpenState); @@ -176,12 +162,10 @@ SmmAccessPeiGetCapabilities ( IN OUT UINTN *SmramMapSize, IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap ) { return SmramAccessGetCapabilities ( - This->LockState, - This->OpenState, SmramMapSize, SmramMap ); } @@ -238,18 +222,14 @@ EFIAPI SmmAccessPeiEntryPoint ( IN EFI_PEI_FILE_HANDLE FileHandle, IN CONST EFI_PEI_SERVICES **PeiServices ) { - UINT16 HostBridgeDevId; - UINT8 EsmramcVal; - UINT8 RegMask8; - UINT32 TopOfLowRam, TopOfLowRamMb; - EFI_STATUS Status; - UINTN SmramMapSize; - EFI_SMRAM_DESCRIPTOR SmramMap[DescIdxCount]; - VOID *GuidHob; + UINT16 HostBridgeDevId; + UINT8 EsmramcVal; + UINT8 RegMask8; + UINT32 TopOfLowRam, TopOfLowRamMb; // // This module should only be included if SMRAM support is required. // ASSERT (FeaturePcdGet (PcdSmmSmramRequire)); @@ -354,69 +334,11 @@ SmmAccessPeiEntryPoint ( DRAMC_REGISTER_Q35 (MCH_SMRAM), (UINT8)((~(UINT32)MCH_SMRAM_D_LCK) & 0xff), MCH_SMRAM_G_SMRAME ); - // - // Create the GUID HOB and point it to the first SMRAM range. - // GetStates (&mAccess.LockState, &mAccess.OpenState); - SmramMapSize =3D sizeof SmramMap; - Status =3D SmramAccessGetCapabilities ( - mAccess.LockState, - mAccess.OpenState, - &SmramMapSize, - SmramMap - ); - ASSERT_EFI_ERROR (Status); - - DEBUG_CODE_BEGIN (); - { - UINTN Count; - UINTN Idx; - - Count =3D SmramMapSize / sizeof SmramMap[0]; - DEBUG (( - DEBUG_VERBOSE, - "%a: SMRAM map follows, %d entries\n", - __func__, - (INT32)Count - )); - DEBUG (( - DEBUG_VERBOSE, - "% 20a % 20a % 20a % 20a\n", - "PhysicalStart(0x)", - "PhysicalSize(0x)", - "CpuStart(0x)", - "RegionState(0x)" - )); - for (Idx =3D 0; Idx < Count; ++Idx) { - DEBUG (( - DEBUG_VERBOSE, - "% 20Lx % 20Lx % 20Lx % 20Lx\n", - SmramMap[Idx].PhysicalStart, - SmramMap[Idx].PhysicalSize, - SmramMap[Idx].CpuStart, - SmramMap[Idx].RegionState - )); - } - } - DEBUG_CODE_END (); - - GuidHob =3D BuildGuidHob ( - &gEfiAcpiVariableGuid, - sizeof SmramMap[DescIdxSmmS3ResumeState] - ); - if (GuidHob =3D=3D NULL) { - return EFI_OUT_OF_RESOURCES; - } - - CopyMem ( - GuidHob, - &SmramMap[DescIdxSmmS3ResumeState], - sizeof SmramMap[DescIdxSmmS3ResumeState] - ); // // SmramAccessLock() depends on "mQ35SmramAtDefaultSmbase"; init the lat= ter // just before exposing the former via PEI_SMM_ACCESS_PPI.Lock(). // diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.inf b/OvmfPkg/SmmAccess/SmmAcce= ssPei.inf index 1698c4ce6c..98bbda20e3 100644 --- a/OvmfPkg/SmmAccess/SmmAccessPei.inf +++ b/OvmfPkg/SmmAccess/SmmAccessPei.inf @@ -5,10 +5,11 @@ # - verify & configure the Q35 TSEG in the entry point, # - set aside the SMM_S3_RESUME_STATE object at the bottom of TSEG, and ex= pose # it via the gEfiAcpiVariableGuid GUIDed HOB. # # Copyright (C) 2013, 2015, Red Hat, Inc. +# Copyright (c) 2024 Intel Corporation. # # SPDX-License-Identifier: BSD-2-Clause-Patent # ## @@ -34,13 +35,10 @@ [Packages] MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec OvmfPkg/OvmfPkg.dec -[Guids] - gEfiAcpiVariableGuid - [LibraryClasses] BaseLib BaseMemoryLib DebugLib HobLib @@ -55,10 +53,13 @@ [Pcd] gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes +[Guids] + gEfiSmmSmramMemoryGuid # ALWAYS_CONSUMED + [Ppis] gPeiSmmAccessPpiGuid ## PRODUCES [Depex] gEfiPeiMemoryDiscoveredPpiGuid diff --git a/OvmfPkg/SmmAccess/SmramInternal.c b/OvmfPkg/SmmAccess/SmramInt= ernal.c index d391ddc9ae..312f67b304 100644 --- a/OvmfPkg/SmmAccess/SmramInternal.c +++ b/OvmfPkg/SmmAccess/SmramInternal.c @@ -1,20 +1,22 @@ /** @file Functions and types shared by the SMM accessor PEI and DXE modules. Copyright (C) 2015, Red Hat, Inc. + Copyright (c) 2024 Intel Corporation. SPDX-License-Identifier: BSD-2-Clause-Patent **/ -#include +#include #include #include #include #include +#include #include "SmramInternal.h" // // The value of PcdQ35TsegMbytes is saved into this variable at module sta= rtup. @@ -164,70 +166,45 @@ SmramAccessLock ( return EFI_SUCCESS; } EFI_STATUS SmramAccessGetCapabilities ( - IN BOOLEAN LockState, - IN BOOLEAN OpenState, IN OUT UINTN *SmramMapSize, IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap ) { - UINTN OriginalSize; - UINT32 TsegMemoryBaseMb, TsegMemoryBase; - UINT64 CommonRegionState; - UINT8 TsegSizeBits; - - OriginalSize =3D *SmramMapSize; - *SmramMapSize =3D DescIdxCount * sizeof *SmramMap; - if (OriginalSize < *SmramMapSize) { - return EFI_BUFFER_TOO_SMALL; - } + UINTN BufferSize; + EFI_HOB_GUID_TYPE *GuidHob; + EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *DescriptorBlock; + UINTN Index; // - // Read the TSEG Memory Base register. + // Get Hob list // - TsegMemoryBaseMb =3D PciRead32 (DRAMC_REGISTER_Q35 (MCH_TSEGMB)); - TsegMemoryBase =3D (TsegMemoryBaseMb >> MCH_TSEGMB_MB_SHIFT) << 20; + GuidHob =3D GetFirstGuidHob (&gEfiSmmSmramMemoryGuid); + DescriptorBlock =3D GET_GUID_HOB_DATA (GuidHob); + ASSERT (DescriptorBlock); - // - // Precompute the region state bits that will be set for all regions. - // - CommonRegionState =3D (OpenState ? EFI_SMRAM_OPEN : EFI_SMRAM_CLOSED) | - (LockState ? EFI_SMRAM_LOCKED : 0) | - EFI_CACHEABLE; + BufferSize =3D DescriptorBlock->NumberOfSmmReservedRegions * sizeof (EFI= _SMRAM_DESCRIPTOR); - // - // The first region hosts an SMM_S3_RESUME_STATE object. It is located a= t the - // start of TSEG. We round up the size to whole pages, and we report it = as - // EFI_ALLOCATED, so that the SMM_CORE stays away from it. - // - SmramMap[DescIdxSmmS3ResumeState].PhysicalStart =3D TsegMemoryBase; - SmramMap[DescIdxSmmS3ResumeState].CpuStart =3D TsegMemoryBase; - SmramMap[DescIdxSmmS3ResumeState].PhysicalSize =3D - EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (sizeof (SMM_S3_RESUME_STATE))); - SmramMap[DescIdxSmmS3ResumeState].RegionState =3D - CommonRegionState | EFI_ALLOCATED; + if (*SmramMapSize < BufferSize) { + *SmramMapSize =3D BufferSize; + return EFI_BUFFER_TOO_SMALL; + } // - // Get the TSEG size bits from the ESMRAMC register. + // Update SmramMapSize to real return SMRAM map size // - TsegSizeBits =3D PciRead8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC)) & - MCH_ESMRAMC_TSEG_MASK; + *SmramMapSize =3D BufferSize; // - // The second region is the main one, following the first. + // Use the hob to publish SMRAM capabilities // - SmramMap[DescIdxMain].PhysicalStart =3D - SmramMap[DescIdxSmmS3ResumeState].PhysicalStart + - SmramMap[DescIdxSmmS3ResumeState].PhysicalSize; - SmramMap[DescIdxMain].CpuStart =3D SmramMap[DescIdxMain].PhysicalSta= rt; - SmramMap[DescIdxMain].PhysicalSize =3D - (TsegSizeBits =3D=3D MCH_ESMRAMC_TSEG_8MB ? SIZE_8MB : - TsegSizeBits =3D=3D MCH_ESMRAMC_TSEG_2MB ? SIZE_2MB : - TsegSizeBits =3D=3D MCH_ESMRAMC_TSEG_1MB ? SIZE_1MB : - mQ35TsegMbytes * SIZE_1MB) - - SmramMap[DescIdxSmmS3ResumeState].PhysicalSize; - SmramMap[DescIdxMain].RegionState =3D CommonRegionState; + for (Index =3D 0; Index < DescriptorBlock->NumberOfSmmReservedRegions; I= ndex++) { + SmramMap[Index].PhysicalStart =3D DescriptorBlock->Descriptor[Index].P= hysicalStart; + SmramMap[Index].CpuStart =3D DescriptorBlock->Descriptor[Index].C= puStart; + SmramMap[Index].PhysicalSize =3D DescriptorBlock->Descriptor[Index].P= hysicalSize; + SmramMap[Index].RegionState =3D DescriptorBlock->Descriptor[Index].R= egionState; + } return EFI_SUCCESS; } diff --git a/OvmfPkg/SmmAccess/SmramInternal.h b/OvmfPkg/SmmAccess/SmramInt= ernal.h index da5b7bbca1..4dd1c6dc9b 100644 --- a/OvmfPkg/SmmAccess/SmramInternal.h +++ b/OvmfPkg/SmmAccess/SmramInternal.h @@ -1,32 +1,18 @@ /** @file Functions and types shared by the SMM accessor PEI and DXE modules. Copyright (C) 2015, Red Hat, Inc. + Copyright (c) 2024 Intel Corporation. SPDX-License-Identifier: BSD-2-Clause-Patent **/ #include -// -// We'll have two SMRAM ranges. -// -// The first is a tiny one that hosts an SMM_S3_RESUME_STATE object, to be -// filled in by the CPU SMM driver during normal boot, for the PEI instanc= e of -// the LockBox library (which will rely on the object during S3 resume). -// -// The other SMRAM range is the main one, for the SMM core and the SMM dri= vers. -// -typedef enum { - DescIdxSmmS3ResumeState =3D 0, - DescIdxMain =3D 1, - DescIdxCount =3D 2 -} DESCRIPTOR_INDEX; - // // The value of PcdQ35TsegMbytes is saved into this variable at module sta= rtup. // extern UINT16 mQ35TsegMbytes; @@ -95,10 +81,8 @@ SmramAccessLock ( IN OUT BOOLEAN *OpenState ); EFI_STATUS SmramAccessGetCapabilities ( - IN BOOLEAN LockState, - IN BOOLEAN OpenState, IN OUT UINTN *SmramMapSize, IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap ); -- 2.16.2.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#117623): https://edk2.groups.io/g/devel/message/117623 Mute This Topic: https://groups.io/mt/105442001/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- --_000_MN6PR11MB824481DFB41B1B119E9C5E138C052MN6PR11MB8244namp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable
Do you think it makes sense to combine this with #10? Otherwise, with this = patch the OVMF is broken.

Thanks,
Ray
From: Wu, Jiaxin <jiaxin= .wu@intel.com>
Sent: Wednesday, April 10, 2024 21:57
To: devel@edk2.groups.io <devel@edk2.groups.io>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>; Yao, Jiewen &l= t;jiewen.yao@intel.com>; Gerd Hoffmann <kraxel@redhat.com>; Ni, Ra= y <ray.ni@intel.com>
Subject: [PATCH v1 09/13] OvmfPkg/SmmAccess: Consume gEfiSmmSmramMem= oryGuid
 
This patch refines the SmmAccess implementation: 1. SmramMap will be retrieved from the
gEfiSmmSmramMemoryGuid instead of original from
the TSEG Memory Base register.
2. Remove the gEfiAcpiVariableGuid creation, thus
the DESCRIPTOR_INDEX definition can be also cleaned.
The gEfiAcpiVariableGuid HOB will be created in the
OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
---
 OvmfPkg/SmmAccess/SmmAccess2Dxe.c   |  4 +-
 OvmfPkg/SmmAccess/SmmAccess2Dxe.inf |  5 +++
 OvmfPkg/SmmAccess/SmmAccessPei.c    | 88 +++----------= ------------------------
 OvmfPkg/SmmAccess/SmmAccessPei.inf  |  7 +--
 OvmfPkg/SmmAccess/SmramInternal.c   | 73 +++++++++++-------= ------------
 OvmfPkg/SmmAccess/SmramInternal.h   | 18 +-------
 6 files changed, 41 insertions(+), 154 deletions(-)

diff --git a/OvmfPkg/SmmAccess/SmmAccess2Dxe.c b/OvmfPkg/SmmAccess/SmmAcces= s2Dxe.c
index 4b9e6df37f..3371592de7 100644
--- a/OvmfPkg/SmmAccess/SmmAccess2Dxe.c
+++ b/OvmfPkg/SmmAccess/SmmAccess2Dxe.c
@@ -4,11 +4,11 @@
 
   Q35 TSEG is expected to have been verified and set up by the S= mmAccessPei
   driver.
 
   Copyright (C) 2013, 2015, Red Hat, Inc.<BR>
-  Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.&= lt;BR>
+  Copyright (c) 2009 - 2024, Intel Corporation. All rights reserved.&= lt;BR>
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
 
@@ -113,12 +113,10 @@ SmmAccess2DxeGetCapabilities (
   IN OUT UINTN        &n= bsp;            = ;  *SmramMapSize,
   IN OUT EFI_SMRAM_DESCRIPTOR      = ;  *SmramMap
   )
 {
   return SmramAccessGetCapabilities (
-           This->Lock= State,
-           This->Open= State,
            SmramMap= Size,
            SmramMap=
            );
 }
 
diff --git a/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf b/OvmfPkg/SmmAccess/SmmAcc= ess2Dxe.inf
index d86381d0fb..d9f01a13c4 100644
--- a/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf
+++ b/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf
@@ -3,10 +3,11 @@
 #
 # Q35 TSEG is expected to have been verified and set up by the SmmAcc= essPei
 # driver.
 #
 # Copyright (C) 2013, 2015, Red Hat, Inc.
+# Copyright (c) 2024 Intel Corporation.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
 
@@ -39,17 +40,21 @@
   DebugLib
   PcdLib
   PciLib
   UefiBootServicesTableLib
   UefiDriverEntryPoint
+  HobLib
 
 [Protocols]
   gEfiSmmAccess2ProtocolGuid   ## PRODUCES
 
 [FeaturePcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
 
+[Guids]
+  gEfiSmmSmramMemoryGuid       &nb= sp;     # ALWAYS_CONSUMED
+
 [Pcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase
   gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes
 
 [Depex]
diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.c b/OvmfPkg/SmmAccess/SmmAccess= Pei.c
index 0e57b7804c..9459bcc989 100644
--- a/OvmfPkg/SmmAccess/SmmAccessPei.c
+++ b/OvmfPkg/SmmAccess/SmmAccessPei.c
@@ -9,21 +9,19 @@
 
   This PEIM runs from RAM, so we can write to variables with sta= tic storage
   duration.
 
   Copyright (C) 2013, 2015, Red Hat, Inc.<BR>
-  Copyright (c) 2010, Intel Corporation. All rights reserved.<BR&g= t;
+  Copyright (c) 2010 - 2024, Intel Corporation. All rights reserved.&= lt;BR>
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
 
-#include <Guid/AcpiS3Context.h>
 #include <Library/BaseLib.h>
 #include <Library/BaseMemoryLib.h>
 #include <Library/DebugLib.h>
-#include <Library/HobLib.h>
 #include <Library/IoLib.h>
 #include <Library/PcdLib.h>
 #include <Library/PciLib.h>
 #include <Library/PeiServicesLib.h>
 #include <Ppi/SmmAccess.h>
@@ -62,14 +60,10 @@ SmmAccessPeiOpen (
   IN EFI_PEI_SERVICES    **PeiServices,
   IN PEI_SMM_ACCESS_PPI  *This,
   IN UINTN         =       DescriptorIndex
   )
 {
-  if (DescriptorIndex >=3D DescIdxCount) {
-    return EFI_INVALID_PARAMETER;
-  }
-
   //
   // According to current practice, DescriptorIndex is not consi= dered at all,
   // beyond validating it.
   //
   return SmramAccessOpen (&This->LockState, &This->= ;OpenState);
@@ -100,14 +94,10 @@ SmmAccessPeiClose (
   IN EFI_PEI_SERVICES    **PeiServices,
   IN PEI_SMM_ACCESS_PPI  *This,
   IN UINTN         =       DescriptorIndex
   )
 {
-  if (DescriptorIndex >=3D DescIdxCount) {
-    return EFI_INVALID_PARAMETER;
-  }
-
   //
   // According to current practice, DescriptorIndex is not consi= dered at all,
   // beyond validating it.
   //
   return SmramAccessClose (&This->LockState, &This-&g= t;OpenState);
@@ -137,14 +127,10 @@ SmmAccessPeiLock (
   IN EFI_PEI_SERVICES    **PeiServices,
   IN PEI_SMM_ACCESS_PPI  *This,
   IN UINTN         =       DescriptorIndex
   )
 {
-  if (DescriptorIndex >=3D DescIdxCount) {
-    return EFI_INVALID_PARAMETER;
-  }
-
   //
   // According to current practice, DescriptorIndex is not consi= dered at all,
   // beyond validating it.
   //
   return SmramAccessLock (&This->LockState, &This->= ;OpenState);
@@ -176,12 +162,10 @@ SmmAccessPeiGetCapabilities (
   IN OUT UINTN        &n= bsp;        *SmramMapSize,
   IN OUT EFI_SMRAM_DESCRIPTOR  *SmramMap
   )
 {
   return SmramAccessGetCapabilities (
-           This->Lock= State,
-           This->Open= State,
            SmramMap= Size,
            SmramMap=
            );
 }
 
@@ -238,18 +222,14 @@ EFIAPI
 SmmAccessPeiEntryPoint (
   IN       EFI_PEI_FILE_HANDLE&nbs= p; FileHandle,
   IN CONST EFI_PEI_SERVICES     **PeiService= s
   )
 {
-  UINT16          &= nbsp;     HostBridgeDevId;
-  UINT8          &n= bsp;      EsmramcVal;
-  UINT8          &n= bsp;      RegMask8;
-  UINT32          &= nbsp;     TopOfLowRam, TopOfLowRamMb;
-  EFI_STATUS         &nb= sp;  Status;
-  UINTN          &n= bsp;      SmramMapSize;
-  EFI_SMRAM_DESCRIPTOR  SmramMap[DescIdxCount];
-  VOID          &nb= sp;       *GuidHob;
+  UINT16  HostBridgeDevId;
+  UINT8   EsmramcVal;
+  UINT8   RegMask8;
+  UINT32  TopOfLowRam, TopOfLowRamMb;
 
   //
   // This module should only be included if SMRAM support is req= uired.
   //
   ASSERT (FeaturePcdGet (PcdSmmSmramRequire));
@@ -354,69 +334,11 @@ SmmAccessPeiEntryPoint (
     DRAMC_REGISTER_Q35 (MCH_SMRAM),
     (UINT8)((~(UINT32)MCH_SMRAM_D_LCK) & 0xff),      MCH_SMRAM_G_SMRAME
     );
 
-  //
-  // Create the GUID HOB and point it to the first SMRAM range.
-  //
   GetStates (&mAccess.LockState, &mAccess.OpenState); -  SmramMapSize =3D sizeof SmramMap;
-  Status       =3D SmramAccessGetCapabi= lities (
-            &n= bsp;      mAccess.LockState,
-            &n= bsp;      mAccess.OpenState,
-            &n= bsp;      &SmramMapSize,
-            &n= bsp;      SmramMap
-            &n= bsp;      );
-  ASSERT_EFI_ERROR (Status);
-
-  DEBUG_CODE_BEGIN ();
-  {
-    UINTN  Count;
-    UINTN  Idx;
-
-    Count =3D SmramMapSize / sizeof SmramMap[0];
-    DEBUG ((
-      DEBUG_VERBOSE,
-      "%a: SMRAM map follows, %d entries\n&q= uot;,
-      __func__,
-      (INT32)Count
-      ));
-    DEBUG ((
-      DEBUG_VERBOSE,
-      "% 20a % 20a % 20a % 20a\n",
-      "PhysicalStart(0x)",
-      "PhysicalSize(0x)",
-      "CpuStart(0x)",
-      "RegionState(0x)"
-      ));
-    for (Idx =3D 0; Idx < Count; ++Idx) {
-      DEBUG ((
-        DEBUG_VERBOSE,
-        "% 20Lx % 20Lx % 20Lx % 20= Lx\n",
-        SmramMap[Idx].PhysicalStart, -        SmramMap[Idx].PhysicalSize,
-        SmramMap[Idx].CpuStart,
-        SmramMap[Idx].RegionState
-        ));
-    }
-  }
-  DEBUG_CODE_END ();
-
-  GuidHob =3D BuildGuidHob (
-            &n= bsp; &gEfiAcpiVariableGuid,
-            &n= bsp; sizeof SmramMap[DescIdxSmmS3ResumeState]
-            &n= bsp; );
-  if (GuidHob =3D=3D NULL) {
-    return EFI_OUT_OF_RESOURCES;
-  }
-
-  CopyMem (
-    GuidHob,
-    &SmramMap[DescIdxSmmS3ResumeState],
-    sizeof SmramMap[DescIdxSmmS3ResumeState]
-    );
 
   //
   // SmramAccessLock() depends on "mQ35SmramAtDefaultSmbase= "; init the latter
   // just before exposing the former via PEI_SMM_ACCESS_PPI.Lock= ().
   //
diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.inf b/OvmfPkg/SmmAccess/SmmAcce= ssPei.inf
index 1698c4ce6c..98bbda20e3 100644
--- a/OvmfPkg/SmmAccess/SmmAccessPei.inf
+++ b/OvmfPkg/SmmAccess/SmmAccessPei.inf
@@ -5,10 +5,11 @@
 # - verify & configure the Q35 TSEG in the entry point,
 # - set aside the SMM_S3_RESUME_STATE object at the bottom of TSEG, a= nd expose
 #   it via the gEfiAcpiVariableGuid GUIDed HOB.
 #
 # Copyright (C) 2013, 2015, Red Hat, Inc.
+# Copyright (c) 2024 Intel Corporation.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
 
@@ -34,13 +35,10 @@
 [Packages]
   MdeModulePkg/MdeModulePkg.dec
   MdePkg/MdePkg.dec
   OvmfPkg/OvmfPkg.dec
 
-[Guids]
-  gEfiAcpiVariableGuid
-
 [LibraryClasses]
   BaseLib
   BaseMemoryLib
   DebugLib
   HobLib
@@ -55,10 +53,13 @@
 
 [Pcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase
   gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes
 
+[Guids]
+  gEfiSmmSmramMemoryGuid       &nb= sp;     # ALWAYS_CONSUMED
+
 [Ppis]
   gPeiSmmAccessPpiGuid       =     ## PRODUCES
 
 [Depex]
   gEfiPeiMemoryDiscoveredPpiGuid
diff --git a/OvmfPkg/SmmAccess/SmramInternal.c b/OvmfPkg/SmmAccess/SmramInt= ernal.c
index d391ddc9ae..312f67b304 100644
--- a/OvmfPkg/SmmAccess/SmramInternal.c
+++ b/OvmfPkg/SmmAccess/SmramInternal.c
@@ -1,20 +1,22 @@
 /** @file
 
   Functions and types shared by the SMM accessor PEI and DXE mod= ules.
 
   Copyright (C) 2015, Red Hat, Inc.
+  Copyright (c) 2024 Intel Corporation.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
 
-#include <Guid/AcpiS3Context.h>
+#include <Guid/SmramMemoryReserve.h>
 #include <IndustryStandard/Q35MchIch9.h>
 #include <Library/DebugLib.h>
 #include <Library/PcdLib.h>
 #include <Library/PciLib.h>
+#include <Library/HobLib.h>
 
 #include "SmramInternal.h"
 
 //
 // The value of PcdQ35TsegMbytes is saved into this variable at modul= e startup.
@@ -164,70 +166,45 @@ SmramAccessLock (
   return EFI_SUCCESS;
 }
 
 EFI_STATUS
 SmramAccessGetCapabilities (
-  IN BOOLEAN         &nb= sp;         LockState,
-  IN BOOLEAN         &nb= sp;         OpenState,
   IN OUT UINTN        &n= bsp;        *SmramMapSize,
   IN OUT EFI_SMRAM_DESCRIPTOR  *SmramMap
   )
 {
-  UINTN   OriginalSize;
-  UINT32  TsegMemoryBaseMb, TsegMemoryBase;
-  UINT64  CommonRegionState;
-  UINT8   TsegSizeBits;
-
-  OriginalSize  =3D *SmramMapSize;
-  *SmramMapSize =3D DescIdxCount * sizeof *SmramMap;
-  if (OriginalSize < *SmramMapSize) {
-    return EFI_BUFFER_TOO_SMALL;
-  }
+  UINTN          &n= bsp;            = ;    BufferSize;
+  EFI_HOB_GUID_TYPE        &n= bsp;      *GuidHob;
+  EFI_SMRAM_HOB_DESCRIPTOR_BLOCK  *DescriptorBlock;
+  UINTN          &n= bsp;            = ;    Index;
 
   //
-  // Read the TSEG Memory Base register.
+  // Get Hob list
   //
-  TsegMemoryBaseMb =3D PciRead32 (DRAMC_REGISTER_Q35 (MCH_TSEGMB)); -  TsegMemoryBase   =3D (TsegMemoryBaseMb >> MCH_TSEGM= B_MB_SHIFT) << 20;
+  GuidHob         =3D GetFirs= tGuidHob (&gEfiSmmSmramMemoryGuid);
+  DescriptorBlock =3D GET_GUID_HOB_DATA (GuidHob);
+  ASSERT (DescriptorBlock);
 
-  //
-  // Precompute the region state bits that will be set for all region= s.
-  //
-  CommonRegionState =3D (OpenState ? EFI_SMRAM_OPEN : EFI_SMRAM_CLOSE= D) |
-            &n= bsp;         (LockState ? EFI_SMRAM= _LOCKED : 0) |
-            &n= bsp;         EFI_CACHEABLE;
+  BufferSize =3D DescriptorBlock->NumberOfSmmReservedRegions * siz= eof (EFI_SMRAM_DESCRIPTOR);
 
-  //
-  // The first region hosts an SMM_S3_RESUME_STATE object. It is loca= ted at the
-  // start of TSEG. We round up the size to whole pages, and we repor= t it as
-  // EFI_ALLOCATED, so that the SMM_CORE stays away from it.
-  //
-  SmramMap[DescIdxSmmS3ResumeState].PhysicalStart =3D TsegMemoryBase;=
-  SmramMap[DescIdxSmmS3ResumeState].CpuStart    &= nbsp; =3D TsegMemoryBase;
-  SmramMap[DescIdxSmmS3ResumeState].PhysicalSize  =3D
-    EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (sizeof (SMM_S3_RE= SUME_STATE)));
-  SmramMap[DescIdxSmmS3ResumeState].RegionState =3D
-    CommonRegionState | EFI_ALLOCATED;
+  if (*SmramMapSize < BufferSize) {
+    *SmramMapSize =3D BufferSize;
+    return EFI_BUFFER_TOO_SMALL;
+  }
 
   //
-  // Get the TSEG size bits from the ESMRAMC register.
+  // Update SmramMapSize to real return SMRAM map size
   //
-  TsegSizeBits =3D PciRead8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC)) &<= br> -            &n= bsp;    MCH_ESMRAMC_TSEG_MASK;
+  *SmramMapSize =3D BufferSize;
 
   //
-  // The second region is the main one, following the first.
+  // Use the hob to publish SMRAM capabilities
   //
-  SmramMap[DescIdxMain].PhysicalStart =3D
-    SmramMap[DescIdxSmmS3ResumeState].PhysicalStart +
-    SmramMap[DescIdxSmmS3ResumeState].PhysicalSize;
-  SmramMap[DescIdxMain].CpuStart     =3D SmramMap= [DescIdxMain].PhysicalStart;
-  SmramMap[DescIdxMain].PhysicalSize =3D
-    (TsegSizeBits =3D=3D MCH_ESMRAMC_TSEG_8MB ? SIZE_8MB :<= br> -     TsegSizeBits =3D=3D MCH_ESMRAMC_TSEG_2MB ? SIZE_2= MB :
-     TsegSizeBits =3D=3D MCH_ESMRAMC_TSEG_1MB ? SIZE_1= MB :
-     mQ35TsegMbytes * SIZE_1MB) -
-    SmramMap[DescIdxSmmS3ResumeState].PhysicalSize;
-  SmramMap[DescIdxMain].RegionState =3D CommonRegionState;
+  for (Index =3D 0; Index < DescriptorBlock->NumberOfSmmReserve= dRegions; Index++) {
+    SmramMap[Index].PhysicalStart =3D DescriptorBlock->D= escriptor[Index].PhysicalStart;
+    SmramMap[Index].CpuStart      = =3D DescriptorBlock->Descriptor[Index].CpuStart;
+    SmramMap[Index].PhysicalSize  =3D DescriptorBlock-= >Descriptor[Index].PhysicalSize;
+    SmramMap[Index].RegionState   =3D DescriptorB= lock->Descriptor[Index].RegionState;
+  }
 
   return EFI_SUCCESS;
 }
diff --git a/OvmfPkg/SmmAccess/SmramInternal.h b/OvmfPkg/SmmAccess/SmramInt= ernal.h
index da5b7bbca1..4dd1c6dc9b 100644
--- a/OvmfPkg/SmmAccess/SmramInternal.h
+++ b/OvmfPkg/SmmAccess/SmramInternal.h
@@ -1,32 +1,18 @@
 /** @file
 
   Functions and types shared by the SMM accessor PEI and DXE mod= ules.
 
   Copyright (C) 2015, Red Hat, Inc.
+  Copyright (c) 2024 Intel Corporation.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
 
 #include <Pi/PiMultiPhase.h>
 
-//
-// We'll have two SMRAM ranges.
-//
-// The first is a tiny one that hosts an SMM_S3_RESUME_STATE object, to be=
-// filled in by the CPU SMM driver during normal boot, for the PEI instanc= e of
-// the LockBox library (which will rely on the object during S3 resume). -//
-// The other SMRAM range is the main one, for the SMM core and the SMM dri= vers.
-//
-typedef enum {
-  DescIdxSmmS3ResumeState =3D 0,
-  DescIdxMain         &n= bsp;   =3D 1,
-  DescIdxCount         &= nbsp;  =3D 2
-} DESCRIPTOR_INDEX;
-
 //
 // The value of PcdQ35TsegMbytes is saved into this variable at modul= e startup.
 //
 extern UINT16  mQ35TsegMbytes;
 
@@ -95,10 +81,8 @@ SmramAccessLock (
   IN OUT BOOLEAN  *OpenState
   );
 
 EFI_STATUS
 SmramAccessGetCapabilities (
-  IN BOOLEAN         &nb= sp;         LockState,
-  IN BOOLEAN         &nb= sp;         OpenState,
   IN OUT UINTN        &n= bsp;        *SmramMapSize,
   IN OUT EFI_SMRAM_DESCRIPTOR  *SmramMap
   );
--
2.16.2.windows.1

_._,_._,_
Groups.io Links:

=20 You receive all messages sent to this group. =20 =20

View/Reply Online (#117623) | =20 | Mute= This Topic | New Topic
Your Subscriptio= n | Contact Group Owner | Unsubscribe [rebecca@openfw.io]

_._,_._,_
--_000_MN6PR11MB824481DFB41B1B119E9C5E138C052MN6PR11MB8244namp_--