From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mx.groups.io with SMTP id smtpd.web11.17836.1683872654511900175 for ; Thu, 11 May 2023 23:24:14 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=iEq9NwI4; spf=pass (domain: intel.com, ip: 192.55.52.115, mailfrom: ray.ni@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683872654; x=1715408654; h=from:to:cc:subject:date:message-id:references: in-reply-to:content-transfer-encoding:mime-version; bh=2Oq4qIVHZgHE3niIEDNHkJsBF5VDysOPDqf+ydPVN+g=; b=iEq9NwI4qs6BDI05HqAgECkCgejmgsqAuJqthylPlnFcGIptN+DRNLTx RW2yIiNiKGaerPGnOaZ+sRxP+njM7sXc5H4GyozNMxWHWqqLo9Gm24Rg1 T11cF4hork1M4dk536si8h2BJmyfzXGh+IyVknTVeu6jrwAnUa+ZtCe95 UwBCKB4Cvlk2F3M3FPdRkO3Puorbw2yNEgjNsetcftNyrkhUz6NAgrSad G7E08SlpSDGVmGU8t+KJ68tqn5gKIzlkmpFYucSteIP7KtUHx8CH1VwkG pPkL4+EKNi0V+VXbSFAJUpuclBOFwfjWDHeaGnavdNI2ZlX4Zhcf6UhcF Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="350741174" X-IronPort-AV: E=Sophos;i="5.99,269,1677571200"; d="scan'208";a="350741174" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2023 23:24:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="677543004" X-IronPort-AV: E=Sophos;i="5.99,269,1677571200"; d="scan'208";a="677543004" Received: from orsmsx602.amr.corp.intel.com ([10.22.229.15]) by orsmga006.jf.intel.com with ESMTP; 11 May 2023 23:24:05 -0700 Received: from orsmsx612.amr.corp.intel.com (10.22.229.25) by ORSMSX602.amr.corp.intel.com (10.22.229.15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Thu, 11 May 2023 23:24:05 -0700 Received: from ORSEDG601.ED.cps.intel.com (10.7.248.6) by orsmsx612.amr.corp.intel.com (10.22.229.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23 via Frontend Transport; Thu, 11 May 2023 23:24:05 -0700 Received: from NAM02-BN1-obe.outbound.protection.outlook.com (104.47.51.40) by edgegateway.intel.com (134.134.137.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.23; Thu, 11 May 2023 23:24:05 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=aHEZjz2QCS2o4cntI7SkJthEwRD/RrdnTSvAJHFrWgMmOkkI/7ktEhkLcV1OPW9F7ggdRYgmYGHNr5qAbJ0wQivu8QZ0wAeoGWO19bMSmFkxUROTkJcFQ8rQYux/Q+7wMWH+OFRS1kPJbUeapW/NDP1QauIyZQB/3Re3gFBFjInz5SB8+l2CzaH2XpkIsUq49lhXgBJeMP2VaWsMKa5oXh6p6XHb8ZVVXOuR/XY1yBcsBOZjnxdnlCUN4NrkxBzq6uApn7R2I4zlMYHmnCgUPF+TKPCd1w5rDQJDyP1zafordQFrTRrGoAbD5ZeVihCoVZNw44WyZdY7otd2oeGIzg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=8csfLHTX2DPe01tUgifdUao9KeiJuLnTgqoT8wAqH1E=; b=XQFddB79kIgld6zJrF6CTvZwQ37fq0JUqFP6vA+rg/1pEY9/T+oMK3qDAik+dXmQAlSr1M6xpeup71RvNhKLT7dASpw8TPDNkZ7vC1Hc3sVb3tAAHotZc83zBT2T76BbJoQwfTPcq30WGgctcwvTEe8HRihwRMRn4cDauECxnZFUXGlLQGrztmbgFT+GeSOdxcDI5IKoBxvgOC0CGZFi+ApD3XlMXkHuM+HAkhNEb8EHKLsqlAWo9qW7cYzrHwqWEbJScCnx2PuTSCyxMIIRtQMrMJLEZG9d9CKPQC3C7lHapEix4Whu4S92P+vq0iJD/vVjtIo5PFHjt8wgTyQA5w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Received: from MN6PR11MB8244.namprd11.prod.outlook.com (2603:10b6:208:470::14) by DM6PR11MB4546.namprd11.prod.outlook.com (2603:10b6:5:2a7::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6387.22; Fri, 12 May 2023 06:24:02 +0000 Received: from MN6PR11MB8244.namprd11.prod.outlook.com ([fe80::892b:b8e6:bab7:635d]) by MN6PR11MB8244.namprd11.prod.outlook.com ([fe80::892b:b8e6:bab7:635d%5]) with mapi id 15.20.6387.024; Fri, 12 May 2023 06:24:02 +0000 From: "Ni, Ray" To: "Wu, Jiaxin" , "devel@edk2.groups.io" CC: "Dong, Eric" , "Zeng, Star" , Gerd Hoffmann , "Kumar, Rahul R" Subject: Re: [PATCH v2 1/5] UefiCpuPkg/SecCore: Migrate page table to permanent memory Thread-Topic: [PATCH v2 1/5] UefiCpuPkg/SecCore: Migrate page table to permanent memory Thread-Index: AQHZhIh0CjjPMNFtskyPgo280tynBq9WKgig Date: Fri, 12 May 2023 06:24:02 +0000 Message-ID: References: <20230512041548.6416-1-jiaxin.wu@intel.com> <20230512041548.6416-2-jiaxin.wu@intel.com> In-Reply-To: <20230512041548.6416-2-jiaxin.wu@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: MN6PR11MB8244:EE_|DM6PR11MB4546:EE_ x-ms-office365-filtering-correlation-id: 27403c77-9415-4b30-b67d-08db52b17ae0 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: 6x9Cyr3X+53ivEMVKfXJIpFMMAHBLTsg+wMb/EIVXeBHF3CQkwf9ZBjikeGLY79nbY9Fg1Zqg2v/pInBv4QWxxVskB1mAr1mbfdP9fY8CFPvra+/mUHWeZYvV3guDctGLi2NT+IdnxUkOBgTuYbSDLVEUqyrJmH4Ni+Yssboha3qAi+d9tCQHrDK88Dfq9md6RtJ6vj/k9kXw7mTQWcw/JlCv077wf9+l6vPQ+L/+BlD/b/DJkkDNf0ksQVJIGYbbUH4HMlQ5RvSxUOEn4q/FNmfutb8RGIyvFlFz+CnayVnQQIQQtgFxKKmd7qOEmv7e06NY+39dA1fb+Kq7SfA2Ax1Nvry+oWhewHJAsiDfrg0VLU2LBTGdCesxoO+BklbEvsbBx8/+zir5q1NXknYetXd4UZvumfVGDsdvbifrGgjo0uVB6VK/ni8ujSd6D//kEXiQOTa1ARK7IsOrLiVeprY7KK8xYa5ZwKhQRhhBwm8NYGvRSmNjsvTHY9++WYiwxU8ThXEBNTktUK5uCejckdU9AsjaEXf7yb6lDBw5hFsEax2+Bf2zTcc7x7gRMfcX8+eamVm9EVWLKz3oqLnD75T6m2OYHFjTUVbDIq6TlywIQ/N5q6h6fjPJP3A0x2M x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:MN6PR11MB8244.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230028)(39860400002)(376002)(396003)(366004)(346002)(136003)(451199021)(478600001)(19627235002)(110136005)(54906003)(5660300002)(8676002)(52536014)(86362001)(38070700005)(33656002)(2906002)(8936002)(66556008)(4326008)(64756008)(82960400001)(66476007)(66446008)(122000001)(316002)(66946007)(76116006)(55016003)(38100700002)(41300700001)(83380400001)(107886003)(186003)(53546011)(9686003)(6506007)(7696005)(71200400001);DIR:OUT;SFP:1102; x-ms-exchange-antispam-messagedata-chunkcount: 1 x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?srOKlddiqrr9cHXYVPbIA3U9HsIF8VQwBScHHhZ3/xlR9mxBYbrn5fL3+bLa?= =?us-ascii?Q?T3heWsUNHGiHekk4hgkP4Ylac/ZudsongYh4pyN0J+nQA+gFVPEkqLIL5zfb?= =?us-ascii?Q?HqZ3xlttNKY+ODHXyyuLP0jIj+U1xUtEf992NF7B0dfOCVG1sNAOsEmLGxBj?= =?us-ascii?Q?b4XZelJvHkt1D6je3Knao4WVbZPKbb0mVadak+8DPWA/AuOsu3IUUXzUr0Tt?= =?us-ascii?Q?iaSecU+qTxAIUd0LZIjo1snCqzvV5eCF7+8PWjb5IrCEsRy+LI06IVC6PEY/?= =?us-ascii?Q?KenDUPGzqpI2+CSGPNqlKTdt3RuA5JwQFpc5fyBujBwSO2eldtgOIZ2SQjAx?= =?us-ascii?Q?LbVZ2p56/3nIU2waoaSaMGXYTZbWad3Ue+S44P9/hwWirXkagCl9ZJykoLfY?= =?us-ascii?Q?GUZZo+HPVk9F1tdOPNjy8wLLMqFHrFwkmc74gvETrIqYsxozc4bTPoXxdraR?= =?us-ascii?Q?mtMT/yaiddjD8zHgwpn3coqvuFxP9Z7gFpLH8gHUXs5q/9MeKA0g+Iy1qtEF?= =?us-ascii?Q?QWAeiBVtGkb2LdwlVZHGdy5IuD85zhaz5GEZcc6o5MBdp9qoVyylnzsBUS4o?= =?us-ascii?Q?O/xo+yTHIz+1HUX90DS+XPibyfExtE/pylM4isq6aZRVqxMPz2x5hhi3ql0s?= =?us-ascii?Q?6rMzbh5A92sKE6pVDUIBdUfbzsVhsKNQ+JylQg+KqZ/iHbvXwQwDb6FDOA4r?= =?us-ascii?Q?ozOizuHTSYpQ+AXUMimeIqf4pE3Vrny9p+xOdrzctTreTN1yhhn+qyEEMsid?= =?us-ascii?Q?1hdeiSG2iTarBHMbXNCGT71+tVTDct+rf5b9ErZLPplhXQeSP3Az7/nP0+fY?= =?us-ascii?Q?fwbTz0tlzpD6od7TmQ4e1gL7uGC1Ko+XhcyHXu5EoRoc4Ju2fY6jXHnmjn31?= =?us-ascii?Q?vrjwvagYKgCLuV2/rjPgtDJkhG0yVKtXM58GCXAXd868wHtMO4DBvuanSI9N?= =?us-ascii?Q?F6mYr8QK7VIax1M2Iw1ueytjrgt2EZsUqwsfMo5BzDo/7dXO0S/kAw8kjSUW?= =?us-ascii?Q?SYeBkUnu4FOa4dCgo4GqGDF+WskUQNUxuDv0nqKPuZOQH7somWIe6KA3YURF?= =?us-ascii?Q?/d65GmNjdFt46B2lzkG7ediCfhKjKJDAoIb6vIt3TZvhsLzKQwHOFtDx8JbH?= =?us-ascii?Q?5jwOw3lJwVcNj3guXTu1aT+H/gnYDq7Tqto81niJG3HVo7Ak/R/PnBBAQrSV?= =?us-ascii?Q?EuyHtqIA1rjlbByPXmhCcQwlq5KlT6z0Gh49EOyyPpm5xMdj6z+vahU1iHk6?= =?us-ascii?Q?CIKN0LlkfpUBylSRZzMXaNJLHws11I/W8AtES0cXPw4ztyrbFj0N5xDnAmqV?= =?us-ascii?Q?Qa+9qSaF2tZejz9JUzhk8FKwoDTPOBhDEfoc8qVE2wurS+RXOWIPR2jDtRtw?= =?us-ascii?Q?pyTZaTDobSf38qJYUUYjxZZBjCOZwEGVjYLZD+pPBmDTi1sWTBWWKGP6TRUS?= =?us-ascii?Q?TJb20dBGnCRW57dYXRDIJ6IJx9kUKAiD2UoSv6Ic92ZSpb+C/MmN1bAc2w5V?= =?us-ascii?Q?yF4wHkyXN91DNA0PCL0mRww83YwDXsIWpKYkY2f/ZuoAxg8ZfUSiGvc69g?= =?us-ascii?Q?=3D=3D?= MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MN6PR11MB8244.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 27403c77-9415-4b30-b67d-08db52b17ae0 X-MS-Exchange-CrossTenant-originalarrivaltime: 12 May 2023 06:24:02.7275 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: ndomJZrC9c1XZbXX1G1ggkK2PILppciMxr4l4B5AqzmAFB1WjeymHkOHSVDFxKlVHvUOxKYHoqfq2X7VKp6oQg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR11MB4546 Return-Path: ray.ni@intel.com X-OriginatorOrg: intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: Wu, Jiaxin > Sent: Friday, May 12, 2023 12:16 PM > To: devel@edk2.groups.io > Cc: Dong, Eric ; Ni, Ray ; Zeng, S= tar > ; Gerd Hoffmann ; Kumar, Rahul R > > Subject: [PATCH v2 1/5] UefiCpuPkg/SecCore: Migrate page table to permane= nt > memory >=20 > Background: > For arch X64, system will enable the page table in SPI to cover 0-512G ra= nge > via CR4.PAE & MSR.LME & CR0.PG & CR3 setting (see ResetVector code). > Existing > code doesn't cover the higher address access above 512G before memory- > discovered > callback. That will be potential problem if system access the higher addr= ess > after the transition from temporary RAM to permanent MEM RAM. >=20 > Solution: > This patch is to migrate page table to permanent memory to map entire phy= sical > address space if CR0.PG is set during temporary RAM Done. >=20 > Cc: Eric Dong > Cc: Ray Ni > Cc: Zeng Star > Cc: Gerd Hoffmann > Cc: Rahul Kumar > Signed-off-by: Jiaxin Wu > --- > UefiCpuPkg/SecCore/SecCore.inf | 1 + > UefiCpuPkg/SecCore/SecCoreNative.inf | 1 + > UefiCpuPkg/SecCore/SecMain.c | 152 > +++++++++++++++++++++++++++++++++++ > UefiCpuPkg/SecCore/SecMain.h | 4 + > 4 files changed, 158 insertions(+) >=20 > diff --git a/UefiCpuPkg/SecCore/SecCore.inf b/UefiCpuPkg/SecCore/SecCore.= inf > index 3758aded3b..cab69b8b97 100644 > --- a/UefiCpuPkg/SecCore/SecCore.inf > +++ b/UefiCpuPkg/SecCore/SecCore.inf > @@ -53,10 +53,11 @@ > CpuExceptionHandlerLib > ReportStatusCodeLib > PeiServicesLib > PeiServicesTablePointerLib > HobLib > + CpuPageTableLib >=20 > [Ppis] > ## SOMETIMES_CONSUMES > ## PRODUCES > gEfiSecPlatformInformationPpiGuid > diff --git a/UefiCpuPkg/SecCore/SecCoreNative.inf > b/UefiCpuPkg/SecCore/SecCoreNative.inf > index 1ee6ff7d88..fa241cca94 100644 > --- a/UefiCpuPkg/SecCore/SecCoreNative.inf > +++ b/UefiCpuPkg/SecCore/SecCoreNative.inf > @@ -50,10 +50,11 @@ > CpuExceptionHandlerLib > ReportStatusCodeLib > PeiServicesLib > PeiServicesTablePointerLib > HobLib > + CpuPageTableLib >=20 > [Ppis] > ## SOMETIMES_CONSUMES > ## PRODUCES > gEfiSecPlatformInformationPpiGuid > diff --git a/UefiCpuPkg/SecCore/SecMain.c b/UefiCpuPkg/SecCore/SecMain.c > index 95375850ec..8ec0b654fb 100644 > --- a/UefiCpuPkg/SecCore/SecMain.c > +++ b/UefiCpuPkg/SecCore/SecMain.c > @@ -70,10 +70,139 @@ MigrateGdt ( > AsmWriteGdtr (&Gdtr); >=20 > return EFI_SUCCESS; > } >=20 > +/** > + Migrate page table to permanent memory mapping entire physical address > space. > + > + @retval EFI_SUCCESS The PageTable was migrated successfull= y. > + @retval EFI_UNSUPPORTED Unsupport to migrate page table to > permanent memory if IA-32e Mode not actived. > + @retval EFI_OUT_OF_RESOURCES The PageTable could not be migrated du= e > to lack of available memory. > + > +**/ > +EFI_STATUS > +MigratePageTable ( > + VOID > + ) > +{ > + EFI_STATUS Status; > + IA32_CR4 Cr4; > + BOOLEAN Page5LevelSupport; > + UINT32 RegEax; > + CPUID_EXTENDED_CPU_SIG_EDX RegEdx; > + BOOLEAN Page1GSupport; > + PAGING_MODE PagingMode; > + CPUID_VIR_PHY_ADDRESS_SIZE_EAX VirPhyAddressSize; > + UINT32 MaxExtendedFunctionId; > + UINTN PageTable; > + EFI_PHYSICAL_ADDRESS Buffer; > + UINTN BufferSize; > + IA32_MAP_ATTRIBUTE MapAttribute; > + IA32_MAP_ATTRIBUTE MapMask; > + > + VirPhyAddressSize.Uint32 =3D 0; > + PageTable =3D 0; > + BufferSize =3D 0; > + MapAttribute.Uint64 =3D 0; > + MapMask.Uint64 =3D MAX_UINT64; > + MapAttribute.Bits.Present =3D 1; > + MapAttribute.Bits.ReadWrite =3D 1; > + > + // > + // Check Page5Level Support or not. > + // > + Cr4.UintN =3D AsmReadCr4 (); > + Page5LevelSupport =3D (Cr4.Bits.LA57 ? TRUE : FALSE); 1. "Cr4.Bits.LA57 !=3D 0", to be consistent with other code in your patch. > + > + // > + // Check Page1G Support or not. > + // > + Page1GSupport =3D FALSE; > + AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL); > + if (RegEax >=3D CPUID_EXTENDED_CPU_SIG) { > + AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, > &(RegEdx.Uint32)); 2. &RegEdx.Uint32. No need for the bracket. > + if ((RegEdx.Bits.Page1GB) !=3D 0) { 3. No need for the bracket. > + // > + Cr0.UintN =3D AsmReadCr0 (); > + if (Cr0.Bits.PG !=3D 0) { > + // > + // CR4.PAE must be enabled. > + // > + ASSERT ((AsmReadCr4 () & BIT5) !=3D 0); 4. No need to check PAE bit because 64bit long mode should set PAE bit. > + > + // > + // Assume CPU runs in 64bit mode if paging is enabled. > + // > + ASSERT (sizeof (UINTN) =3D=3D sizeof (UINT64)); > + > + Status =3D MigratePageTable (); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_WARN, "SecTemporaryRamDone: Failed to migrate page > table to permanent memory: %r.\n", Status)); > + ASSERT_EFI_ERROR (Status); 5. Can you add CpuDeadLoop ()? Failure of page table migration is unaccepta= ble.