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Thread-Topic: [PATCH v6 4/6] UefiCpuPkg: Only change CR4.CET bit for enable and disable CET. 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: YQQJWc47zgGeDkvJpFxrUfpJx7686176AA= Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=bWm7rxcz; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); arc=reject ("signature check failed: fail, {[1] = sig:microsoft.com:reject}") Reviewed-by: Ray Ni Thanks, Ray > -----Original Message----- > From: Sheng, W > Sent: Tuesday, November 21, 2023 3:03 PM > To: devel@edk2.groups.io > Cc: Dong, Eric ; Ni, Ray ; Laszlo > Ersek ; Wu, Jiaxin ; Tan, Dun > > Subject: [PATCH v6 4/6] UefiCpuPkg: Only change CR4.CET bit for enable an= d > disable CET. >=20 > Signed-off-by: Sheng Wei > Cc: Eric Dong > Cc: Ray Ni > Cc: Laszlo Ersek > Cc: Wu Jiaxin > Cc: Tan Dun > Reviewed-by: Laszlo Ersek > --- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 10 +++++++--- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 10 +++++++--- > 2 files changed, 14 insertions(+), 6 deletions(-) >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm > b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm > index 6368982433..1da9afab97 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm > @@ -237,7 +237,9 @@ CetInterruptDone: > bts ecx, 16 ; set WP >=20 > mov cr0, ecx >=20 >=20 >=20 > - mov eax, 0x668 | CR4_CET >=20 > + ; set CR4.CET bit for enable CET >=20 > + mov eax, cr4 >=20 > + bts eax, CR4_CET_BIT >=20 > mov cr4, eax >=20 >=20 >=20 > setssbsy >=20 > @@ -264,8 +266,10 @@ CetDone: > cmp al, 0 >=20 > jz CetDone2 >=20 >=20 >=20 > - mov eax, 0x668 >=20 > - mov cr4, eax ; disable CET >=20 > + ; clear CR4.CET bit for disable CET >=20 > + mov eax, cr4 >=20 > + btr eax, CR4_CET_BIT >=20 > + mov cr4, eax >=20 >=20 >=20 > mov ecx, MSR_IA32_PL0_SSP >=20 > pop eax >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm > b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm > index 9a225bc3be..abf9f1a90a 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm > @@ -263,7 +263,9 @@ CetInterruptDone: > bts ecx, 16 ; set WP >=20 > mov cr0, rcx >=20 >=20 >=20 > - mov eax, 0x668 | CR4_CET >=20 > + ; set CR4.CET bit for enable CET >=20 > + mov rax, cr4 >=20 > + bts rax, CR4_CET_BIT >=20 > mov cr4, rax >=20 >=20 >=20 > setssbsy >=20 > @@ -308,8 +310,10 @@ mCetSupportedAbsAddr: > cmp al, 0 >=20 > jz CetDone2 >=20 >=20 >=20 > - mov eax, 0x668 >=20 > - mov cr4, rax ; disable CET >=20 > + ; clear CR4.CET bit for disable CET >=20 > + mov rax, cr4 >=20 > + btr rax, CR4_CET_BIT >=20 > + mov cr4, rax >=20 >=20 >=20 > mov ecx, MSR_IA32_INTERRUPT_SSP_TABLE_ADDR >=20 > pop rax >=20 > -- > 2.26.2.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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