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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Ray Ni > -----Original Message----- > From: devel@edk2.groups.io On Behalf Of Abdul > Lateef Attar via groups.io > Sent: Monday, April 10, 2023 7:10 PM > To: devel@edk2.groups.io > Cc: Abdul Lateef Attar ; Paul Grimes > ; Garrett Kirkendall ; > Abner Chang ; Dong, Eric ; > Ni, Ray ; Kumar, Rahul R > Subject: [edk2-devel] [PATCH v8 5/9] UefiCpuPkg: Initial implementation o= f > AMD's SmmCpuFeaturesLib >=20 > From: Abdul Lateef Attar >=20 > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4182 >=20 > Adds initial defination for AMD's SmmCpuFeaturesLib > library implementation. > All function's body either empty or just returns > value. Its initial skeleton of library implementation. >=20 > Cc: Paul Grimes > Cc: Garrett Kirkendall > Cc: Abner Chang > Cc: Eric Dong > Cc: Ray Ni > Cc: Rahul Kumar > Signed-off-by: Abdul Lateef Attar > Reviewed-by: Abner Chang > --- > UefiCpuPkg/UefiCpuPkg.dsc | 8 + > .../AmdSmmCpuFeaturesLib.inf | 33 ++ > .../SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.c | 345 > ++++++++++++++++++ > 3 files changed, 386 insertions(+) > create mode 100644 > UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.inf > create mode 100644 > UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.c >=20 > diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc > index c33059cd3209..043eb2dbc1b1 100644 > --- a/UefiCpuPkg/UefiCpuPkg.dsc > +++ b/UefiCpuPkg/UefiCpuPkg.dsc > @@ -171,6 +171,13 @@ [Components.IA32, Components.X64] > >=20 > SmmCpuFeaturesLib|UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFea > turesLibStm.inf > } > + UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf { > + > + FILE_GUID =3D B7242C74-BD21-49EE-84B4-07162E8C080D > + > + > SmmCpuFeaturesLib|UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCp > uFeaturesLib.inf > + > SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull > /SmmCpuPlatformHookLibNull.inf > + } > UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf > UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf > UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf > @@ -187,6 +194,7 @@ [Components.IA32, Components.X64] >=20 > UnitTestResultReportLib|UnitTestFrameworkPkg/Library/UnitTestResultRep > ortLib/UnitTestResultReportLibConOut.inf > } >=20 > UefiCpuPkg/Library/SmmSmramSaveStateLib/AmdSmmSmramSaveStateLib. > inf > + UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.inf >=20 > [Components.X64] >=20 > UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/DxeCpuExceptionHan > dlerLibUnitTest.inf > diff --git > a/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.inf > b/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.inf > new file mode 100644 > index 000000000000..4c77efc64462 > --- /dev/null > +++ > b/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.inf > @@ -0,0 +1,33 @@ > +## @file > +# The CPU specific programming for PiSmmCpuDxeSmm module. > +# > +# Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved. > +# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.<= BR> > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > + INF_VERSION =3D 0x00010005 > + BASE_NAME =3D SmmCpuFeaturesLib > + MODULE_UNI_FILE =3D SmmCpuFeaturesLib.uni > + FILE_GUID =3D 5849E964-78EC-428E-8CBD-848A7E35913= 4 > + MODULE_TYPE =3D DXE_SMM_DRIVER > + VERSION_STRING =3D 1.0 > + LIBRARY_CLASS =3D SmmCpuFeaturesLib > + CONSTRUCTOR =3D SmmCpuFeaturesLibConstructor > + > +[Sources] > + SmmCpuFeaturesLib.c > + SmmCpuFeaturesLibCommon.c > + AmdSmmCpuFeaturesLib.c > + > +[Packages] > + MdePkg/MdePkg.dec > + UefiCpuPkg/UefiCpuPkg.dec > + > +[LibraryClasses] > + BaseLib > + PcdLib > + MemoryAllocationLib > + DebugLib > diff --git > a/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.c > b/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.c > new file mode 100644 > index 000000000000..c74e1a0c0c5b > --- /dev/null > +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/AmdSmmCpuFeaturesLib.c > @@ -0,0 +1,345 @@ > +/** @file > +Implementation specific to the SmmCpuFeatureLib library instance > +for AMD based platforms. > + > +Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
> +Copyright (c) Microsoft Corporation.
> +Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
> +SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include > +#include > + > +/** > + Read an SMM Save State register on the target processor. If this func= tion > + returns EFI_UNSUPPORTED, then the caller is responsible for reading th= e > + SMM Save Sate register. > + > + @param[in] CpuIndex The index of the CPU to read the SMM Save State. > The > + value must be between 0 and the NumberOfCpus fie= ld in > + the System Management System Table (SMST). > + @param[in] Register The SMM Save State register to read. > + @param[in] Width The number of bytes to read from the CPU save > state. > + @param[out] Buffer Upon return, this holds the CPU register value r= ead > + from the save state. > + > + @retval EFI_SUCCESS The register was read from Save State. > + @retval EFI_INVALID_PARAMTER Buffer is NULL. > + @retval EFI_UNSUPPORTED This function does not support reading > Register. > + > +**/ > +EFI_STATUS > +EFIAPI > +SmmCpuFeaturesReadSaveStateRegister ( > + IN UINTN CpuIndex, > + IN EFI_SMM_SAVE_STATE_REGISTER Register, > + IN UINTN Width, > + OUT VOID *Buffer > + ) > +{ > + return EFI_SUCCESS; > +} > + > +/** > + Writes an SMM Save State register on the target processor. If this fu= nction > + returns EFI_UNSUPPORTED, then the caller is responsible for writing th= e > + SMM Save Sate register. > + > + @param[in] CpuIndex The index of the CPU to write the SMM Save State. > The > + value must be between 0 and the NumberOfCpus fiel= d in > + the System Management System Table (SMST). > + @param[in] Register The SMM Save State register to write. > + @param[in] Width The number of bytes to write to the CPU save stat= e. > + @param[in] Buffer Upon entry, this holds the new CPU register value= . > + > + @retval EFI_SUCCESS The register was written to Save State. > + @retval EFI_INVALID_PARAMTER Buffer is NULL. > + @retval EFI_UNSUPPORTED This function does not support writing > Register. > +**/ > +EFI_STATUS > +EFIAPI > +SmmCpuFeaturesWriteSaveStateRegister ( > + IN UINTN CpuIndex, > + IN EFI_SMM_SAVE_STATE_REGISTER Register, > + IN UINTN Width, > + IN CONST VOID *Buffer > + ) > +{ > + return EFI_SUCCESS; > +} > + > +/** > + Performs library initialization. > + > + This initialization function contains common functionality shared betw= en all > + library instance constructors. > + > +**/ > +VOID > +CpuFeaturesLibInitialization ( > + VOID > + ) > +{ > +} > + > +/** > + Called during the very first SMI into System Management Mode to initia= lize > + CPU features, including SMBASE, for the currently executing CPU. Sinc= e > this > + is the first SMI, the SMRAM Save State Map is at the default address o= f > + AMD_SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET. > The currently executing > + CPU is specified by CpuIndex and CpuIndex can be used to access > information > + about the currently executing CPU in the ProcessorInfo array and the > + HotPlugCpuData data structure. > + > + @param[in] CpuIndex The index of the CPU to initialize. The va= lue > + must be between 0 and the NumberOfCpus fiel= d in > + the System Management System Table (SMST). > + @param[in] IsMonarch TRUE if the CpuIndex is the index of the CP= U > that > + was elected as monarch during System Manage= ment > + Mode initialization. > + FALSE if the CpuIndex is not the index of t= he CPU > + that was elected as monarch during System > + Management Mode initialization. > + @param[in] ProcessorInfo Pointer to an array of > EFI_PROCESSOR_INFORMATION > + structures. ProcessorInfo[CpuIndex] contai= ns the > + information for the currently executing CPU= . > + @param[in] CpuHotPlugData Pointer to the CPU_HOT_PLUG_DATA > structure that > + contains the ApidId and SmBase arrays. > +**/ > +VOID > +EFIAPI > +SmmCpuFeaturesInitializeProcessor ( > + IN UINTN CpuIndex, > + IN BOOLEAN IsMonarch, > + IN EFI_PROCESSOR_INFORMATION *ProcessorInfo, > + IN CPU_HOT_PLUG_DATA *CpuHotPlugData > + ) > +{ > +} > + > +/** > + This function updates the SMRAM save state on the currently executing > CPU > + to resume execution at a specific address after an RSM instruction. T= his > + function must evaluate the SMRAM save state to determine the execution > mode > + the RSM instruction resumes and update the resume execution address > with > + either NewInstructionPointer32 or NewInstructionPoint. The auto HALT > restart > + flag in the SMRAM save state must always be cleared. This function > returns > + the value of the instruction pointer from the SMRAM save state that wa= s > + replaced. If this function returns 0, then the SMRAM save state was n= ot > + modified. > + > + This function is called during the very first SMI on each CPU after > + SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution > mode > + to signal that the SMBASE of each CPU has been updated before the > default > + SMBASE address is used for the first SMI to the next CPU. > + > + @param[in] CpuIndex The index of the CPU to hook. The= value > + must be between 0 and the NumberOf= Cpus > + field in the System Management Sys= tem Table > + (SMST). > + @param[in] CpuState Pointer to SMRAM Save State Map fo= r the > + currently executing CPU. > + @param[in] NewInstructionPointer32 Instruction pointer to use if > resuming to > + 32-bit execution mode from 64-bit = SMM. > + @param[in] NewInstructionPointer Instruction pointer to use if resu= ming > to > + same execution mode as SMM. > + > + @retval 0 This function did modify the SMRAM save state. > + @retval > 0 The original instruction pointer value from the SMRAM sav= e > state > + before it was replaced. > +**/ > +UINT64 > +EFIAPI > +SmmCpuFeaturesHookReturnFromSmm ( > + IN UINTN CpuIndex, > + IN SMRAM_SAVE_STATE_MAP *CpuState, > + IN UINT64 NewInstructionPointer32, > + IN UINT64 NewInstructionPointer > + ) > +{ > + return 0; > +} > + > +/** > + Return the size, in bytes, of a custom SMI Handler in bytes. If 0 is > + returned, then a custom SMI handler is not provided by this library, > + and the default SMI handler must be used. > + > + @retval 0 Use the default SMI handler. > + @retval > 0 Use the SMI handler installed by > SmmCpuFeaturesInstallSmiHandler() > + The caller is required to allocate enough SMRAM for each = CPU to > + support the size of the custom SMI handler. > +**/ > +UINTN > +EFIAPI > +SmmCpuFeaturesGetSmiHandlerSize ( > + VOID > + ) > +{ > + return 0; > +} > + > +/** > + Install a custom SMI handler for the CPU specified by CpuIndex. This > function > + is only called if SmmCpuFeaturesGetSmiHandlerSize() returns a size is > greater > + than zero and is called by the CPU that was elected as monarch during > System > + Management Mode initialization. > + > + @param[in] CpuIndex The index of the CPU to install the custom SMI > handler. > + The value must be between 0 and the NumberOfCpus= field > + in the System Management System Table (SMST). > + @param[in] SmBase The SMBASE address for the CPU specified by > CpuIndex. > + @param[in] SmiStack The stack to use when an SMI is processed by the > + the CPU specified by CpuIndex. > + @param[in] StackSize The size, in bytes, if the stack used when an SM= I is > + processed by the CPU specified by CpuIndex. > + @param[in] GdtBase The base address of the GDT to use when an SMI i= s > + processed by the CPU specified by CpuIndex. > + @param[in] GdtSize The size, in bytes, of the GDT used when an SMI = is > + processed by the CPU specified by CpuIndex. > + @param[in] IdtBase The base address of the IDT to use when an SMI i= s > + processed by the CPU specified by CpuIndex. > + @param[in] IdtSize The size, in bytes, of the IDT used when an SMI = is > + processed by the CPU specified by CpuIndex. > + @param[in] Cr3 The base address of the page tables to use when = an > SMI > + is processed by the CPU specified by CpuIndex. > +**/ > +VOID > +EFIAPI > +SmmCpuFeaturesInstallSmiHandler ( > + IN UINTN CpuIndex, > + IN UINT32 SmBase, > + IN VOID *SmiStack, > + IN UINTN StackSize, > + IN UINTN GdtBase, > + IN UINTN GdtSize, > + IN UINTN IdtBase, > + IN UINTN IdtSize, > + IN UINT32 Cr3 > + ) > +{ > +} > + > +/** > + Determines if MTRR registers must be configured to set SMRAM cache- > ability > + when executing in System Management Mode. > + > + @retval TRUE MTRR registers must be configured to set SMRAM cache- > ability. > + @retval FALSE MTRR registers do not need to be configured to set > SMRAM > + cache-ability. > +**/ > +BOOLEAN > +EFIAPI > +SmmCpuFeaturesNeedConfigureMtrrs ( > + VOID > + ) > +{ > + return FALSE; > +} > + > +/** > + Disable SMRR register if SMRR is supported and > SmmCpuFeaturesNeedConfigureMtrrs() > + returns TRUE. > +**/ > +VOID > +EFIAPI > +SmmCpuFeaturesDisableSmrr ( > + VOID > + ) > +{ > +} > + > +/** > + Enable SMRR register if SMRR is supported and > SmmCpuFeaturesNeedConfigureMtrrs() > + returns TRUE. > +**/ > +VOID > +EFIAPI > +SmmCpuFeaturesReenableSmrr ( > + VOID > + ) > +{ > +} > + > +/** > + Processor specific hook point each time a CPU enters System Management > Mode. > + > + @param[in] CpuIndex The index of the CPU that has entered SMM. The > value > + must be between 0 and the NumberOfCpus field in t= he > + System Management System Table (SMST). > +**/ > +VOID > +EFIAPI > +SmmCpuFeaturesRendezvousEntry ( > + IN UINTN CpuIndex > + ) > +{ > +} > + > +/** > + Returns the current value of the SMM register for the specified CPU. > + If the SMM register is not supported, then 0 is returned. > + > + @param[in] CpuIndex The index of the CPU to read the SMM register. > The > + value must be between 0 and the NumberOfCpus fiel= d in > + the System Management System Table (SMST). > + @param[in] RegName Identifies the SMM register to read. > + > + @return The value of the SMM register specified by RegName from the > CPU > + specified by CpuIndex. > +**/ > +UINT64 > +EFIAPI > +SmmCpuFeaturesGetSmmRegister ( > + IN UINTN CpuIndex, > + IN SMM_REG_NAME RegName > + ) > +{ > + return 0; > +} > + > +/** > + Sets the value of an SMM register on a specified CPU. > + If the SMM register is not supported, then no action is performed. > + > + @param[in] CpuIndex The index of the CPU to write the SMM register. > The > + value must be between 0 and the NumberOfCpus fiel= d in > + the System Management System Table (SMST). > + @param[in] RegName Identifies the SMM register to write. > + registers are read-only. > + @param[in] Value The value to write to the SMM register. > +**/ > +VOID > +EFIAPI > +SmmCpuFeaturesSetSmmRegister ( > + IN UINTN CpuIndex, > + IN SMM_REG_NAME RegName, > + IN UINT64 Value > + ) > +{ > +} > + > +/** > + Check to see if an SMM register is supported by a specified CPU. > + > + @param[in] CpuIndex The index of the CPU to check for SMM register > support. > + The value must be between 0 and the NumberOfCpus = field > + in the System Management System Table (SMST). > + @param[in] RegName Identifies the SMM register to check for support. > + > + @retval TRUE The SMM register specified by RegName is supported by > the CPU > + specified by CpuIndex. > + @retval FALSE The SMM register specified by RegName is not supported > by the > + CPU specified by CpuIndex. > +**/ > +BOOLEAN > +EFIAPI > +SmmCpuFeaturesIsSmmRegisterSupported ( > + IN UINTN CpuIndex, > + IN SMM_REG_NAME RegName > + ) > +{ > + return FALSE; > +} > -- > 2.25.1 >=20 >=20 >=20 >=20 >=20