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X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MN6PR11MB8244.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: f1d91d96-564d-456e-6198-08dbf7c754d6 X-MS-Exchange-CrossTenant-originalarrivaltime: 08 Dec 2023 08:26:09.6715 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: z9AoIn/smyOS9YEda3yOvTWxMNnZRVX+uZOMhx2YTixyh7Ti4+ZQLWzuov/O55lM0d/imE0lvgI1UccrINAenQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR11MB6286 X-OriginatorOrg: intel.com Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: sl17KrdFOXWfQLxaHR343dxFx7686176AA= Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=dqhTL7VC; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Reviewed-by: Ray Ni Thanks, Ray > -----Original Message----- > From: Tan, Dun > Sent: Thursday, December 7, 2023 3:33 PM > To: devel@edk2.groups.io > Cc: Dong, Eric ; Ni, Ray ; Kumar, > Rahul R ; Gerd Hoffmann > Subject: [Patch V2 6/6] UefiCpuPkg: Avoid assuming only one smmbasehob >=20 > Modify the gSmmBaseHobGuid consumption code to > remove the asuumption that there is only one > gSmmBaseHobGuid. If the CPU number is big enough, > there will be more than one SmmBaseHob in the > HOB list. >=20 > Signed-off-by: Dun Tan > Cc: Eric Dong > Cc: Ray Ni > Cc: Rahul Kumar > Cc: Gerd Hoffmann > --- > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 179 > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++-------------------------------- > 1 file changed, 147 insertions(+), 32 deletions(-) >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c > b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c > index b729f8ee63..fab2fed286 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c > @@ -586,6 +586,132 @@ SmmReadyToLockEventNotify ( > return EFI_SUCCESS; > } >=20 > +/** > + Function to compare 2 SMM_BASE_HOB_DATA pointer based on > ProcessorIndex. > + > + @param[in] Buffer1 pointer to SMM_BASE_HOB_DATA > poiner to compare > + @param[in] Buffer2 pointer to second > SMM_BASE_HOB_DATA pointer to compare > + > + @retval 0 Buffer1 equal to Buffer2 > + @retval <0 Buffer1 is less than Buffer2 > + @retval >0 Buffer1 is greater than Buffer2 > +**/ > +INTN > +EFIAPI > +SmBaseHobCompare ( > + IN CONST VOID *Buffer1, > + IN CONST VOID *Buffer2 > + ) > +{ > + if ((*(SMM_BASE_HOB_DATA **)Buffer1)->ProcessorIndex > > (*(SMM_BASE_HOB_DATA **)Buffer2)->ProcessorIndex) { > + return 1; > + } else if ((*(SMM_BASE_HOB_DATA **)Buffer1)->ProcessorIndex < > (*(SMM_BASE_HOB_DATA **)Buffer2)->ProcessorIndex) { > + return -1; > + } > + > + return 0; > +} > + > +/** > + Extract SmBase for all CPU from SmmBase HOB. > + > + @param[in] MaxNumberOfCpus Max NumberOfCpus. > + > + @retval SmBaseBuffer Pointer to SmBase Buffer. > + @retval NULL gSmmBaseHobGuid was not been > created. > +**/ > +UINTN * > +GetSmBase ( > + IN UINTN MaxNumberOfCpus > + ) > +{ > + UINTN HobCount; > + EFI_HOB_GUID_TYPE *GuidHob; > + SMM_BASE_HOB_DATA *SmmBaseHobData; > + UINTN NumberOfProcessors; > + SMM_BASE_HOB_DATA **SmBaseHobs; > + UINTN *SmBaseBuffer; > + UINTN HobIndex; > + UINTN SortBuffer; > + UINTN ProcessorIndex; > + UINT64 PrevProcessorIndex; > + EFI_HOB_GUID_TYPE *FirstSmmBaseGuidHob; > + > + SmmBaseHobData =3D NULL; > + HobIndex =3D 0; > + ProcessorIndex =3D 0; > + HobCount =3D 0; > + NumberOfProcessors =3D 0; > + > + FirstSmmBaseGuidHob =3D GetFirstGuidHob (&gSmmBaseHobGuid); > + if (FirstSmmBaseGuidHob =3D=3D NULL) { > + return NULL; > + } > + > + GuidHob =3D FirstSmmBaseGuidHob; > + while (GuidHob !=3D NULL) { > + HobCount++; > + SmmBaseHobData =3D GET_GUID_HOB_DATA (GuidHob); > + > + if (NumberOfProcessors >=3D MaxNumberOfCpus) { > + break; > + } > + > + NumberOfProcessors +=3D SmmBaseHobData->NumberOfProcessors; > + GuidHob =3D GetNextGuidHob (&gSmmBaseHobGuid, > GET_NEXT_HOB (GuidHob)); > + } > + > + ASSERT (NumberOfProcessors =3D=3D MaxNumberOfCpus); > + if (NumberOfProcessors !=3D MaxNumberOfCpus) { > + CpuDeadLoop (); > + } > + > + SmBaseHobs =3D AllocatePool (sizeof (SMM_BASE_HOB_DATA *) * > HobCount); > + ASSERT (SmBaseHobs !=3D NULL); > + if (SmBaseHobs =3D=3D NULL) { > + return NULL; > + } > + > + // > + // Record each SmmBaseHob pointer in the SmBaseHobs. > + // The FirstSmmBaseGuidHob is to speed up this while-loop > + // without needing to look for SmBaseHob from beginning. > + // > + GuidHob =3D FirstSmmBaseGuidHob; > + while (HobIndex < HobCount) { > + SmBaseHobs[HobIndex++] =3D GET_GUID_HOB_DATA (GuidHob); > + GuidHob =3D GetNextGuidHob (&gSmmBaseHobGuid, > GET_NEXT_HOB (GuidHob)); > + } > + > + SmBaseBuffer =3D (UINTN *)AllocatePool (sizeof (UINTN) * > (MaxNumberOfCpus)); > + ASSERT (SmBaseBuffer !=3D NULL); > + if (SmBaseBuffer =3D=3D NULL) { > + FreePool (SmBaseHobs); > + return NULL; > + } > + > + QuickSort (SmBaseHobs, HobCount, sizeof (SMM_BASE_HOB_DATA *), > (BASE_SORT_COMPARE)SmBaseHobCompare, &SortBuffer); > + PrevProcessorIndex =3D 0; > + for (HobIndex =3D 0; HobIndex < HobCount; HobIndex++) { > + // > + // Make sure no overlap and no gap in the CPU range covered by each > HOB > + // > + ASSERT (SmBaseHobs[HobIndex]->ProcessorIndex =3D=3D > PrevProcessorIndex); > + > + // > + // Cache each SmBase in order. > + // > + for (ProcessorIndex =3D 0; ProcessorIndex < > SmBaseHobs[HobIndex]->NumberOfProcessors; ProcessorIndex++) { > + SmBaseBuffer[PrevProcessorIndex + ProcessorIndex] =3D > (UINTN)SmBaseHobs[HobIndex]->SmBase[ProcessorIndex]; > + } > + > + PrevProcessorIndex +=3D SmBaseHobs[HobIndex]->NumberOfProcessors; > + } > + > + FreePool (SmBaseHobs); > + return SmBaseBuffer; > +} > + > /** > Function to compare 2 MP_INFORMATION2_HOB_DATA pointer based on > ProcessorIndex. >=20 > @@ -744,27 +870,22 @@ PiCpuSmmEntry ( > IN EFI_SYSTEM_TABLE *SystemTable > ) > { > - EFI_STATUS Status; > - UINTN Index; > - VOID *Buffer; > - UINTN BufferPages; > - UINTN TileCodeSize; > - UINTN TileDataSize; > - UINTN TileSize; > - UINT8 *Stacks; > - VOID *Registration; > - UINT32 RegEax; > - UINT32 RegEbx; > - UINT32 RegEcx; > - UINT32 RegEdx; > - UINTN FamilyId; > - UINTN ModelId; > - UINT32 Cr3; > - EFI_HOB_GUID_TYPE *GuidHob; > - SMM_BASE_HOB_DATA *SmmBaseHobData; > - > - GuidHob =3D NULL; > - SmmBaseHobData =3D NULL; > + EFI_STATUS Status; > + UINTN Index; > + VOID *Buffer; > + UINTN BufferPages; > + UINTN TileCodeSize; > + UINTN TileDataSize; > + UINTN TileSize; > + UINT8 *Stacks; > + VOID *Registration; > + UINT32 RegEax; > + UINT32 RegEbx; > + UINT32 RegEcx; > + UINT32 RegEdx; > + UINTN FamilyId; > + UINTN ModelId; > + UINT32 Cr3; >=20 > PERF_FUNCTION_BEGIN (); >=20 > @@ -986,8 +1107,8 @@ PiCpuSmmEntry ( > // Retrive the allocated SmmBase from gSmmBaseHobGuid. If found, > // means the SmBase relocation has been done. > // > - GuidHob =3D GetFirstGuidHob (&gSmmBaseHobGuid); > - if (GuidHob !=3D NULL) { > + mCpuHotPlugData.SmBase =3D GetSmBase (mMaxNumberOfCpus); > + if (mCpuHotPlugData.SmBase !=3D NULL) { > // > // Check whether the Required TileSize is enough. > // > @@ -997,12 +1118,6 @@ PiCpuSmmEntry ( > return RETURN_BUFFER_TOO_SMALL; > } >=20 > - SmmBaseHobData =3D GET_GUID_HOB_DATA (GuidHob); > - > - // > - // Assume single instance of HOB produced, expect the > HOB.NumberOfProcessors equals to the mMaxNumberOfCpus. > - // > - ASSERT (SmmBaseHobData->NumberOfProcessors =3D=3D > (UINT32)mMaxNumberOfCpus && SmmBaseHobData->ProcessorIndex =3D=3D 0); > mSmmRelocated =3D TRUE; > } else { > // > @@ -1048,8 +1163,6 @@ PiCpuSmmEntry ( > // > mCpuHotPlugData.ApicId =3D (UINT64 *)AllocatePool (sizeof (UINT64) * > mMaxNumberOfCpus); > ASSERT (mCpuHotPlugData.ApicId !=3D NULL); > - mCpuHotPlugData.SmBase =3D (UINTN *)AllocatePool (sizeof (UINTN) * > mMaxNumberOfCpus); > - ASSERT (mCpuHotPlugData.SmBase !=3D NULL); > mCpuHotPlugData.ArrayLength =3D (UINT32)mMaxNumberOfCpus; >=20 > // > @@ -1058,7 +1171,9 @@ PiCpuSmmEntry ( > // size for each CPU in the platform > // > for (Index =3D 0; Index < mMaxNumberOfCpus; Index++) { > - mCpuHotPlugData.SmBase[Index] =3D mSmmRelocated ? > (UINTN)SmmBaseHobData->SmBase[Index] : (UINTN)Buffer + Index * > TileSize - SMM_HANDLER_OFFSET; > + if (!mSmmRelocated) { > + mCpuHotPlugData.SmBase[Index] =3D (UINTN)Buffer + Index * TileSize > - SMM_HANDLER_OFFSET; > + } >=20 > gSmmCpuPrivate->CpuSaveStateSize[Index] =3D sizeof > (SMRAM_SAVE_STATE_MAP); > gSmmCpuPrivate->CpuSaveState[Index] =3D (VOID > *)(mCpuHotPlugData.SmBase[Index] + SMRAM_SAVE_STATE_MAP_OFFSET); > -- > 2.31.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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