[PATCH 0/3] Enable 64bit PEI for BoardX58Ich10

[PATCH 0/3] Enable 64bit PEI for BoardX58Ich10

[Zhiguang Liu]

Enable 64bit PEI for BoardX58Ich10 and fix related issues.

Ray Ni (1):
  SimicsOpenBoardPkg: Initialize temporary memory with
    PcdInitValueInTempStack

Zhiguang Liu (2):
  SimicsOpenBoardPkg: Support 64-bit Pei QSP
  SimicsOpenBoardPkg: Remove unused PCD PcdSimicsSecPageTablesBase

 .../BoardX58Ich10/OpenBoardPkg.dsc            |  8 ++---
 .../BoardX58Ich10/OpenBoardPkg.fdf            |  5 +--
 .../BoardX58Ich10/build_config_x64.cfg        | 31 +++++++++++++++++++
 .../Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec |  1 -
 .../SimicsOpenBoardPkg/SecCore/SecMain.c      |  8 -----
 .../SimicsOpenBoardPkg/SecCore/SecMain.inf    |  2 +-
 .../SecCore/X64/SecEntry.nasm                 | 13 ++++++++
 .../SimicsPei/SimicsPei.inf                   |  1 -
 Platform/Intel/build.cfg                      |  1 +
 .../Intel/SimicsX58SktPkg/SktSecInclude.fdf   |  2 +-
 10 files changed, 50 insertions(+), 22 deletions(-)
 create mode 100644 Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/build_config_x64.cfg

-- 
2.31.1.windows.1

[PATCH 1/3] SimicsOpenBoardPkg: Support 64-bit Pei BoardX58Ich10

[Zhiguang Liu]

Create a new platform build configure file, build_config_x64.cfg.
It enables 64-bit Pei BoardX58Ich10.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
---
 .../BoardX58Ich10/OpenBoardPkg.dsc            |  8 ++---
 .../BoardX58Ich10/OpenBoardPkg.fdf            |  2 +-
 .../BoardX58Ich10/build_config_x64.cfg        | 31 +++++++++++++++++++
 Platform/Intel/build.cfg                      |  1 +
 .../Intel/SimicsX58SktPkg/SktSecInclude.fdf   |  2 +-
 5 files changed, 36 insertions(+), 8 deletions(-)
 create mode 100644 Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/build_config_x64.cfg

diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
index 64c3af2584..c02804c19c 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
@@ -72,9 +72,7 @@
 #######################################
 # Component Includes
 #######################################
-# @todo: Change below line to [Components.$(PEI_ARCH)] after https://bugzilla.tianocore.org/show_bug.cgi?id=2308
-#        is completed
-[Components.IA32]
+[Components.$(PEI_ARCH)]
 !include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiInclude.dsc
 !include $(SKT_PKG)/SktPkgPei.dsc
 
@@ -175,9 +173,7 @@
 #######################################
 # PEI Components
 #######################################
-# @todo: Change below line to [Components.$(PEI_ARCH)] after https://bugzilla.tianocore.org/show_bug.cgi?id=2308
-#        is completed
-[Components.IA32]
+[Components.$(PEI_ARCH)]
   #######################################
   # Edk2 Packages
   #######################################
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
index 844f9b6dcf..ccb7fe7e59 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
@@ -121,7 +121,7 @@ READ_LOCK_CAP      = TRUE
 READ_LOCK_STATUS   = TRUE
 FvNameGuid         = 229EEDCE-8E76-4809-B233-EC36BFBF6989
 
-INF  RuleOverride=RESET_SECMAIN USE = IA32 $(BOARD_PKG)/SecCore/SecMain.inf
+INF  RuleOverride=RESET_SECMAIN USE = $(PEI_ARCH) $(BOARD_PKG)/SecCore/SecMain.inf
 !include $(SKT_PKG)/SktSecInclude.fdf
 
 [FV.FvPreMemory]
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/build_config_x64.cfg b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/build_config_x64.cfg
new file mode 100644
index 0000000000..b80415208a
--- /dev/null
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/build_config_x64.cfg
@@ -0,0 +1,31 @@
+# @ build_config.cfg
+# This is the BoardX58Ich10 board specific build settings enabling 64bit PEI.
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+
+[CONFIG]
+WORKSPACE_PLATFORM_BIN = edk2-non-osi/Platform/Intel
+EDK_SETUP_OPTION =
+openssl_path =
+PLATFORM_BOARD_PACKAGE = SimicsOpenBoardPkg
+PROJECT = SimicsOpenBoardPkg/BoardX58Ich10
+BOARD = BoardX58Ich10
+FLASH_MAP_FDF = SimicsOpenBoardPkg/BoardX58Ich10/Include/Fdf/FlashMapInclude.fdf
+PROJECT_DSC = SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+BOARD_PKG_PCD_DSC = SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc
+PrepRELEASE = DEBUG
+SILENT_MODE = FALSE
+EXT_CONFIG_CLEAR =
+CapsuleBuild = FALSE
+EXT_BUILD_FLAGS = -D PEI_ARCH=X64
+CAPSULE_BUILD = 0
+TARGET = DEBUG
+TARGET_SHORT = D
+PERFORMANCE_BUILD = FALSE
+FSP_WRAPPER_BUILD = FALSE
+FSP_BINARY_BUILD = FALSE
+FSP_TEST_RELEASE = FALSE
+SECURE_BOOT_ENABLE = FALSE
diff --git a/Platform/Intel/build.cfg b/Platform/Intel/build.cfg
index 8d480f27dc..fe0ddb7a1e 100644
--- a/Platform/Intel/build.cfg
+++ b/Platform/Intel/build.cfg
@@ -57,6 +57,7 @@ BIOS_INFO_GUID =
 # board_name = path_to_board_build_config.cfg
 BoardMtOlympus = PurleyOpenBoardPkg/BoardMtOlympus/build_config.cfg
 BoardX58Ich10 = SimicsOpenBoardPkg/BoardX58Ich10/build_config.cfg
+BoardX58Ich10X64 = SimicsOpenBoardPkg/BoardX58Ich10/build_config_x64.cfg
 AspireVn7Dash572G = KabylakeOpenBoardPkg/AspireVn7Dash572G/build_config.cfg
 GalagoPro3 = KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg
 KabylakeRvp3 = KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg
diff --git a/Silicon/Intel/SimicsX58SktPkg/SktSecInclude.fdf b/Silicon/Intel/SimicsX58SktPkg/SktSecInclude.fdf
index dafca1ad36..c1f9e00f22 100644
--- a/Silicon/Intel/SimicsX58SktPkg/SktSecInclude.fdf
+++ b/Silicon/Intel/SimicsX58SktPkg/SktSecInclude.fdf
@@ -13,4 +13,4 @@
 # The code in this FV handles the initial firmware startup, and
 # decompresses the PEI and DXE FVs which handles the rest of the boot sequence.
 #
-INF  RuleOverride=RESET_VECTOR USE = IA32 UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
+INF  RuleOverride=RESET_VECTOR USE = $(PEI_ARCH) UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
-- 
2.31.1.windows.1

[PATCH 2/3] SimicsOpenBoardPkg: Initialize temporary memory with PcdInitValueInTempStack

[Zhiguang Liu]

From: Ray Ni <ray.ni@intel.com>

PeiCore dumps how many bytes of stack is used by checking stack
contents against PcdInitValueInTempStack.
The assumption is when temporary memory is setup, its initial content
is PcdInitValueInTempStack.

The patch changes X64 version SecCore of QSP to fill the temporary
memory as what PeiCore expects.

This helps to detect if stack in temporary ram is enough.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Ray Ni <ray.ni@intel.com>
---
 .../Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf    |  1 +
 .../SimicsOpenBoardPkg/SecCore/X64/SecEntry.nasm    | 13 +++++++++++++
 2 files changed, 14 insertions(+)

diff --git a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf
index 9dd492a2fb..1de3d012a7 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf
+++ b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf
@@ -68,6 +68,7 @@
   gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDecompressionScratchEnd
+  gEfiMdeModulePkgTokenSpaceGuid.PcdInitValueInTempStack
 
 [FeaturePcd]
   gSimicsX58PkgTokenSpaceGuid.PcdSmmSmramRequire
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SecCore/X64/SecEntry.nasm b/Platform/Intel/SimicsOpenBoardPkg/SecCore/X64/SecEntry.nasm
index 2e6d8f618c..306208a824 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SecCore/X64/SecEntry.nasm
+++ b/Platform/Intel/SimicsOpenBoardPkg/SecCore/X64/SecEntry.nasm
@@ -24,6 +24,19 @@ extern ASM_PFX(SecCoreStartupWithStack)
 ;
 global ASM_PFX(_ModuleEntryPoint)
 ASM_PFX(_ModuleEntryPoint):
+    ;
+    ; Fill the temporary RAM with the initial stack value.
+    ; The loop below will seed the heap as well, but that's harmless.
+    ;
+    mov     rax, (FixedPcdGet32 (PcdInitValueInTempStack) << 32) | FixedPcdGet32 (PcdInitValueInTempStack)
+                                                                ; qword to store
+    mov     rdi, FixedPcdGet32 (PcdSimicsSecPeiTempRamBase)     ; base address,
+                                                                ;   relative to
+                                                                ;   ES
+    mov     rcx, FixedPcdGet32 (PcdSimicsSecPeiTempRamSize) / 8 ; qword count
+    cld                                                         ; store from base
+                                                                ;   up
+    rep stosq
 
     ;
     ; Load temporary RAM stack based on PCDs
-- 
2.31.1.windows.1

[PATCH 3/3] SimicsOpenBoardPkg: Remove unused PCD PcdSimicsSecPageTablesBase

[Zhiguang Liu]

Currently, for 64-bit PEI, pagetable is created in reset vector and
stored in SPI flash. No need this PCD now

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
---
 .../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf     | 3 ---
 Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec        | 1 -
 Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c       | 8 --------
 Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf     | 1 -
 Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf | 1 -
 5 files changed, 14 deletions(-)

diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
index ccb7fe7e59..a74c355e09 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
@@ -79,9 +79,6 @@ ErasePolarity = 1
 BlockSize     = 0x10000
 NumBlocks     = 0xB0
 
-0x000000|0x006000
-gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase|gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesSize
-
 0x006000|0x001000
 gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageBase|gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageSize
 
diff --git a/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec b/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
index 421c464023..e8aefdd893 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
+++ b/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
@@ -38,7 +38,6 @@
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwSpareBase|0x0|UINT32|0xd
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFdBaseAddress|0x0|UINT32|0xf
-  gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase|0x0|UINT32|0x11
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesSize|0x0|UINT32|0x12
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamBase|0x0|UINT32|0x13
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamSize|0x0|UINT32|0x14
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c
index 6b572b38a8..39e879e922 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c
+++ b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c
@@ -759,14 +759,6 @@ SecCoreStartupWithStack (
 
   AsmWriteIdtr (&IdtDescriptor);
 
-#if defined (MDE_CPU_X64)
-  //
-  // ASSERT that the Page Tables were set by the reset vector code to
-  // the address we expect.
-  //
-  ASSERT (AsmReadCr3 () == (UINTN) PcdGet32 (PcdSimicsSecPageTablesBase));
-#endif
-
   //
   // |-------------|       <-- TopOfCurrentStack
   // |   Stack     | 32k
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf
index 1de3d012a7..af1c0f2b55 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf
+++ b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf
@@ -62,7 +62,6 @@
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvSize
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvBase
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvSize
-  gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamBase
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamSize
   gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
index cdc30ad582..49f441fe9d 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
@@ -65,7 +65,6 @@
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvSize
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageBase
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageSize
-  gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamBase
   gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamSize
   gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
-- 
2.31.1.windows.1

Re: [PATCH 1/3] SimicsOpenBoardPkg: Support 64-bit Pei BoardX58Ich10

[Ni, Ray]

Reviewed-by: Ray Ni <ray.ni@intel.com>

> -----Original Message-----
> From: Liu, Zhiguang <zhiguang.liu@intel.com>
> Sent: Tuesday, April 25, 2023 2:40 PM
> To: devel@edk2.groups.io
> Cc: Liu, Zhiguang <zhiguang.liu@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>; Ni, Ray <ray.ni@intel.com>
> Subject: [PATCH 1/3] SimicsOpenBoardPkg: Support 64-bit Pei BoardX58Ich10
> 
> Create a new platform build configure file, build_config_x64.cfg.
> It enables 64-bit Pei BoardX58Ich10.
> 
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
> ---
>  .../BoardX58Ich10/OpenBoardPkg.dsc            |  8 ++---
>  .../BoardX58Ich10/OpenBoardPkg.fdf            |  2 +-
>  .../BoardX58Ich10/build_config_x64.cfg        | 31 +++++++++++++++++++
>  Platform/Intel/build.cfg                      |  1 +
>  .../Intel/SimicsX58SktPkg/SktSecInclude.fdf   |  2 +-
>  5 files changed, 36 insertions(+), 8 deletions(-)
>  create mode 100644
> Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/build_config_x64.cfg
> 
> diff --git
> a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
> b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
> index 64c3af2584..c02804c19c 100644
> ---
> a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
> +++
> b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
> @@ -72,9 +72,7 @@
>  #######################################
>  # Component Includes
>  #######################################
> -# @todo: Change below line to [Components.$(PEI_ARCH)] after
> https://bugzilla.tianocore.org/show_bug.cgi?id=2308
> -#        is completed
> -[Components.IA32]
> +[Components.$(PEI_ARCH)]
>  !include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiInclude.dsc
>  !include $(SKT_PKG)/SktPkgPei.dsc
> 
> @@ -175,9 +173,7 @@
>  #######################################
>  # PEI Components
>  #######################################
> -# @todo: Change below line to [Components.$(PEI_ARCH)] after
> https://bugzilla.tianocore.org/show_bug.cgi?id=2308
> -#        is completed
> -[Components.IA32]
> +[Components.$(PEI_ARCH)]
>    #######################################
>    # Edk2 Packages
>    #######################################
> diff --git
> a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
> b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
> index 844f9b6dcf..ccb7fe7e59 100644
> --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
> +++
> b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
> @@ -121,7 +121,7 @@ READ_LOCK_CAP      = TRUE
>  READ_LOCK_STATUS   = TRUE
>  FvNameGuid         = 229EEDCE-8E76-4809-B233-EC36BFBF6989
> 
> -INF  RuleOverride=RESET_SECMAIN USE = IA32
> $(BOARD_PKG)/SecCore/SecMain.inf
> +INF  RuleOverride=RESET_SECMAIN USE = $(PEI_ARCH)
> $(BOARD_PKG)/SecCore/SecMain.inf
>  !include $(SKT_PKG)/SktSecInclude.fdf
> 
>  [FV.FvPreMemory]
> diff --git
> a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/build_config_x64.cfg
> b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/build_config_x64.cfg
> new file mode 100644
> index 0000000000..b80415208a
> --- /dev/null
> +++
> b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/build_config_x64.cfg
> @@ -0,0 +1,31 @@
> +# @ build_config.cfg
> +# This is the BoardX58Ich10 board specific build settings enabling 64bit PEI.
> +#
> +# Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +
> +
> +[CONFIG]
> +WORKSPACE_PLATFORM_BIN = edk2-non-osi/Platform/Intel
> +EDK_SETUP_OPTION =
> +openssl_path =
> +PLATFORM_BOARD_PACKAGE = SimicsOpenBoardPkg
> +PROJECT = SimicsOpenBoardPkg/BoardX58Ich10
> +BOARD = BoardX58Ich10
> +FLASH_MAP_FDF =
> SimicsOpenBoardPkg/BoardX58Ich10/Include/Fdf/FlashMapInclude.fdf
> +PROJECT_DSC = SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
> +BOARD_PKG_PCD_DSC =
> SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc
> +PrepRELEASE = DEBUG
> +SILENT_MODE = FALSE
> +EXT_CONFIG_CLEAR =
> +CapsuleBuild = FALSE
> +EXT_BUILD_FLAGS = -D PEI_ARCH=X64
> +CAPSULE_BUILD = 0
> +TARGET = DEBUG
> +TARGET_SHORT = D
> +PERFORMANCE_BUILD = FALSE
> +FSP_WRAPPER_BUILD = FALSE
> +FSP_BINARY_BUILD = FALSE
> +FSP_TEST_RELEASE = FALSE
> +SECURE_BOOT_ENABLE = FALSE
> diff --git a/Platform/Intel/build.cfg b/Platform/Intel/build.cfg
> index 8d480f27dc..fe0ddb7a1e 100644
> --- a/Platform/Intel/build.cfg
> +++ b/Platform/Intel/build.cfg
> @@ -57,6 +57,7 @@ BIOS_INFO_GUID =
>  # board_name = path_to_board_build_config.cfg
>  BoardMtOlympus =
> PurleyOpenBoardPkg/BoardMtOlympus/build_config.cfg
>  BoardX58Ich10 = SimicsOpenBoardPkg/BoardX58Ich10/build_config.cfg
> +BoardX58Ich10X64 =
> SimicsOpenBoardPkg/BoardX58Ich10/build_config_x64.cfg
>  AspireVn7Dash572G =
> KabylakeOpenBoardPkg/AspireVn7Dash572G/build_config.cfg
>  GalagoPro3 = KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg
>  KabylakeRvp3 = KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg
> diff --git a/Silicon/Intel/SimicsX58SktPkg/SktSecInclude.fdf
> b/Silicon/Intel/SimicsX58SktPkg/SktSecInclude.fdf
> index dafca1ad36..c1f9e00f22 100644
> --- a/Silicon/Intel/SimicsX58SktPkg/SktSecInclude.fdf
> +++ b/Silicon/Intel/SimicsX58SktPkg/SktSecInclude.fdf
> @@ -13,4 +13,4 @@
>  # The code in this FV handles the initial firmware startup, and
>  # decompresses the PEI and DXE FVs which handles the rest of the boot
> sequence.
>  #
> -INF  RuleOverride=RESET_VECTOR USE = IA32
> UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
> +INF  RuleOverride=RESET_VECTOR USE = $(PEI_ARCH)
> UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
> --
> 2.31.1.windows.1

Re: [PATCH 3/3] SimicsOpenBoardPkg: Remove unused PCD PcdSimicsSecPageTablesBase

[Ni, Ray]

Reviewed-by: Ray Ni <ray.ni@intel.com>

> -----Original Message-----
> From: Liu, Zhiguang <zhiguang.liu@intel.com>
> Sent: Tuesday, April 25, 2023 2:40 PM
> To: devel@edk2.groups.io
> Cc: Liu, Zhiguang <zhiguang.liu@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>; Ni, Ray <ray.ni@intel.com>
> Subject: [PATCH 3/3] SimicsOpenBoardPkg: Remove unused PCD
> PcdSimicsSecPageTablesBase
> 
> Currently, for 64-bit PEI, pagetable is created in reset vector and
> stored in SPI flash. No need this PCD now
> 
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
> ---
>  .../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf     | 3 ---
>  Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec        | 1 -
>  Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c       | 8 --------
>  Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf     | 1 -
>  Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf | 1 -
>  5 files changed, 14 deletions(-)
> 
> diff --git
> a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
> b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
> index ccb7fe7e59..a74c355e09 100644
> --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
> +++
> b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
> @@ -79,9 +79,6 @@ ErasePolarity = 1
>  BlockSize     = 0x10000
>  NumBlocks     = 0xB0
> 
> -0x000000|0x006000
> -
> gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase|gSimic
> sOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesSize
> -
>  0x006000|0x001000
> 
> gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageBase|gSimi
> csOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageSize
> 
> diff --git a/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
> b/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
> index 421c464023..e8aefdd893 100644
> --- a/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
> +++ b/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
> @@ -38,7 +38,6 @@
> 
> gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwSpareBa
> se|0x0|UINT32|0xd
> 
> gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwWorkin
> gBase|0x0|UINT32|0xe
> 
> gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFdBaseAddress|0x0|UINT3
> 2|0xf
> -
> gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase|0x0|UI
> NT32|0x11
> 
> gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesSize|0x0|UI
> NT32|0x12
> 
> gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamBase|0x0|
> UINT32|0x13
> 
> gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamSize|0x0|
> UINT32|0x14
> diff --git a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c
> b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c
> index 6b572b38a8..39e879e922 100644
> --- a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c
> +++ b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c
> @@ -759,14 +759,6 @@ SecCoreStartupWithStack (
> 
>    AsmWriteIdtr (&IdtDescriptor);
> 
> -#if defined (MDE_CPU_X64)
> -  //
> -  // ASSERT that the Page Tables were set by the reset vector code to
> -  // the address we expect.
> -  //
> -  ASSERT (AsmReadCr3 () == (UINTN) PcdGet32
> (PcdSimicsSecPageTablesBase));
> -#endif
> -
>    //
>    // |-------------|       <-- TopOfCurrentStack
>    // |   Stack     | 32k
> diff --git a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf
> b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf
> index 1de3d012a7..af1c0f2b55 100644
> --- a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf
> +++ b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf
> @@ -62,7 +62,6 @@
>    gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvSize
>    gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvBase
>    gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvSize
> -  gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase
>    gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamBase
>    gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamSize
>    gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
> diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
> b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
> index cdc30ad582..49f441fe9d 100644
> --- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
> +++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
> @@ -65,7 +65,6 @@
>    gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvSize
>    gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageBase
>    gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageSize
> -  gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase
>    gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamBase
>    gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamSize
>    gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
> --
> 2.31.1.windows.1