From: "Ni, Ray" <ray.ni@intel.com>
To: "Liu, Zhiguang" <zhiguang.liu@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Chiu, Chasel" <chasel.chiu@intel.com>,
"Desimone, Nathaniel L" <nathaniel.l.desimone@intel.com>,
"Duggapu, Chinni B" <chinni.b.duggapu@intel.com>,
"Zeng, Star" <star.zeng@intel.com>,
"Kuo, Ted" <ted.kuo@intel.com>,
"S, Ashraf Ali" <ashraf.ali.s@intel.com>,
"Susovan Mohapatra" <susovan.mohapatra@intel.com>
Subject: Re: [edk2-devel] [PATCH] IntelFsp2Pkg: Optional Plugin for FSP SecCore/PeiCore Rebasing
Date: Tue, 9 Apr 2024 05:20:09 +0000 [thread overview]
Message-ID: <MN6PR11MB8244E88FA8D30AC03F2C75528C072@MN6PR11MB8244.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20240403081202.2069-1-zhiguang.liu@intel.com>
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This optional plugin is designed to execute before the FSP SecCore to
rebase SecCore and PeiCore during runtime. If the FSP binary requires
rebasing at runtime, this module should be included within the FSP
binary. Additionally, specific patches must be applied to ensure proper
functionality.
In the absence of this module, manual patching of API offsets within
the FSP header is necessary. To illustrate, let's consider a scenario
within FSP-S where 'FspSiliconInitEntry' is the initial API to be
executed post-rebase.
Rather than directly inputting the 'FspSiliconInit' offset into the
'FspSiliconInitEntryOffset' field of the FSP header, the entry point
of this module should be used.
Furthermore, the 'FspSiliconInit' offset should be placed into
'AsmGetFspSecEntry', which signifies the address to which this module
will jump.
It is also essential to patch the image bases of SecCore and PeiCore
to enable the rebasing functionality of this module.
The following is an example of how to apply the necessary patches:
Patch Address Patch Value
<FspSiliconInitEntryOffset> PreFspSecS:_ModuleEntryPoint - [0x0000]
PreFspSecS:SecCoreRelativeOff PreFspSecS:AsmGetFspSecCore
- Fsp24SecCoreS:BASE
PreFspSecS:PeiCoreRelativeOff PreFspSecS:AsmGetFspPeiCore
- PeiCore:BASE
PreFspSecS:SecEntryRelativeOff PreFspSecS:AsmGetFspSecEntry
- Fsp24SecCoreS:FspSiliconInitApi
[Ray.1] Can you emphasize this optional plug-in only applies to 64bit FSP?
+/**
+ Relocate Pe/Te Image
+
+ @param[in] ImageBaseAddress Image base address
+
+ @retval EFI_SUCCESS Image is relocated successfully
+ @retval Others Image is not relocated successfully
+**/
+EFI_STATUS
+RelocatePeTeImage (
+ UINT64 ImageBaseAddress
+ )
+{
+ RETURN_STATUS Status;
+ PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;
+
+ ZeroMem (&ImageContext, sizeof (ImageContext));
+
+ ImageContext.Handle = (VOID *)ImageBaseAddress;
+ ImageContext.ImageRead = PeCoffLoaderImageReadFromMemory;
+
+ Status = PeCoffLoaderGetImageInfo (&ImageContext);
+ if (EFI_ERROR (Status)) {
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+
+ ImageContext.ImageAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)ImageBaseAddress;
+
+ //
+ // rebase the image
+ //
+ Status = PeCoffLoaderRelocateImage (&ImageContext);
+
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+}
+
+/**
+ This function will patch the Sec Core and Pei Core in current FSP.
+**/
+VOID
+EFIAPI
+FspPatchSecAndPeiCore (
[Ray.2] Can you rename it as "Fsp*Relocate*SecAndPeiCore"?
It's to align with "RelocatePeTeImage".
+;
+;----------------------------------------------------------------------------
+global ASM_PFX(_ModuleEntryPoint)
+ASM_PFX(_ModuleEntryPoint):
+ PUSHA_64
+ call ASM_PFX(FspPatchSecAndPeiCore)
+ POPA_64
+ call ASM_PFX(AsmGetFspSecEntry)
+ jmp rax
+
+global ASM_PFX(AsmGetFspSecCore)
[Ray.3] rename as AsmGetFspSecCoreImageBase and add function header.
+ASM_PFX(AsmGetFspSecCore):
+ lea rax, [ASM_PFX(AsmGetFspSecCore)]
+ mov rcx, rax
+ xor rdx, rdx
+ DB 0x48, 0x2d ; sub rax, 0x????????
+global ASM_PFX(SecCoreRelativeOff)
+ASM_PFX(SecCoreRelativeOff):
+ DD 0 ; This value can be patched by the build script if need to rebase SecCore
[Ray.4] ; RAX = SecCore image base at runtime, RCX = AsmGetFspSecCore runtime address
+ xchg rax, rcx ; After exchange, rcx is the value be subtract by the patched value
+ ; rax == rcx means patched value is zero
[Ray.5] ; RCX = SecCore image base at runtime, RAX = AsmGetFspSecCore runtime address.
; If SecCoreRelativeOff is not patched, RCX = RAX = AsmGetFspSecCore runtime address. This happens when there is no SecCore in the binary.
+ CMPXCHG rcx, rdx ; if (rcx == rax) {rcx = rdx (0) } else {rax = rcx (SecCore image base at runtime)}
+ mov rax, rcx
+ ret
+
+global ASM_PFX(AsmGetFspPeiCore)
+ASM_PFX(AsmGetFspPeiCore):
+ lea rax, [ASM_PFX(AsmGetFspPeiCore)]
+ mov rcx, rax
+ xor rdx, rdx
+ DB 0x48, 0x2d ; sub rax, 0x????????
+global ASM_PFX(PeiCoreRelativeOff)
+ASM_PFX(PeiCoreRelativeOff):
+ DD 0 ; This value can be patched by the build script if need to rebase PeiCore
+ xchg rax, rcx ; After exchange, rcx is the value be subtract by the patched value
+ ; rax == rcx means patched value is zero
+ CMPXCHG rcx, rdx ; if (rcx == rax) {rcx = rdx} else {rax = rcx}
+ mov rax, rcx
+ ret
+
[Ray.6] rename it as AsmGetFspOriginalEntry.
+global ASM_PFX(AsmGetFspSecEntry)
+ASM_PFX(AsmGetFspSecEntry):
+ lea rax, [ASM_PFX(AsmGetFspSecEntry)]
+ DB 0x48, 0x2d ; sub rax, 0x????????
+global ASM_PFX(SecEntryRelativeOff)
+ASM_PFX(SecEntryRelativeOff):
+ DD 0x12345678 ; This value must be patched by the build script
+ ret
--
2.31.1.windows.1
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prev parent reply other threads:[~2024-04-09 5:20 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-03 8:12 [edk2-devel] [PATCH] IntelFsp2Pkg: Optional Plugin for FSP SecCore/PeiCore Rebasing Zhiguang Liu
2024-04-09 5:20 ` Ni, Ray [this message]
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