Re: [Patch V5 08/14] UefiCpuPkg: Extern mSmmShadowStackSize in PiSmmCpuDxeSmm.h

["Ni, Ray" <ray.ni@intel.com>]

Reviewed-by: Ray Ni <ray.ni@intel.com>

> -----Original Message-----
> From: Tan, Dun <dun.tan@intel.com>
> Sent: Thursday, June 8, 2023 10:28 AM
> To: devel@edk2.groups.io
> Cc: Dong, Eric <eric.dong@intel.com>; Ni, Ray <ray.ni@intel.com>; Kumar,
> Rahul R <rahul.r.kumar@intel.com>; Gerd Hoffmann <kraxel@redhat.com>
> Subject: [Patch V5 08/14] UefiCpuPkg: Extern mSmmShadowStackSize in
> PiSmmCpuDxeSmm.h
> 
> Extern mSmmShadowStackSize in PiSmmCpuDxeSmm.h and remove
> extern for mSmmShadowStackSize in c files to simplify code.
> 
> Signed-off-by: Dun Tan <dun.tan@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Rahul Kumar <rahul1.kumar@intel.com>
> Cc: Gerd Hoffmann <kraxel@redhat.com>
> ---
>  UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c | 3 +--
>  UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c         | 2 --
>  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h    | 1 +
>  UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c       | 2 --
>  UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c  | 3 +--
>  5 files changed, 3 insertions(+), 8 deletions(-)
> 
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c
> index 6c48a53f67..636dc8d92f 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c
> @@ -1,7 +1,7 @@
>  /** @file
>    SMM CPU misc functions for Ia32 arch specific.
> 
> -Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
> +Copyright (c) 2015 - 2023, Intel Corporation. All rights reserved.<BR>
>  SPDX-License-Identifier: BSD-2-Clause-Patent
> 
>  **/
> @@ -14,7 +14,6 @@ EFI_PHYSICAL_ADDRESS  mGdtBuffer;
>  UINTN                 mGdtBufferSize;
> 
>  extern BOOLEAN  mCetSupported;
> -extern UINTN    mSmmShadowStackSize;
> 
>  X86_ASSEMBLY_PATCH_LABEL  mPatchCetPl0Ssp;
>  X86_ASSEMBLY_PATCH_LABEL  mPatchCetInterruptSsp;
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
> index baf827cf9d..1878252eac 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
> @@ -29,8 +29,6 @@ MM_COMPLETION                mSmmStartupThisApToken;
>  //
>  UINT32  *mPackageFirstThreadIndex = NULL;
> 
> -extern UINTN  mSmmShadowStackSize;
> -
>  /**
>    Performs an atomic compare exchange operation to get semaphore.
>    The compare exchange operation must be performed using
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
> b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
> index e0c4ca76dc..a7da9673a5 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
> @@ -262,6 +262,7 @@ extern EFI_SMM_CPU_PROTOCOL  mSmmCpu;
>  extern EFI_MM_MP_PROTOCOL    mSmmMp;
>  extern BOOLEAN               m5LevelPagingNeeded;
>  extern PAGING_MODE           mPagingMode;
> +extern UINTN                 mSmmShadowStackSize;
> 
>  ///
>  /// The mode of the CPU at the time an SMI occurs
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> index 0bed857cae..46d8ff5d4e 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> @@ -13,8 +13,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
>  #define PAGE_TABLE_PAGES  8
>  #define ACC_MAX_BIT       BIT3
> 
> -extern UINTN  mSmmShadowStackSize;
> -
>  LIST_ENTRY                mPagePool           = INITIALIZE_LIST_HEAD_VARIABLE
> (mPagePool);
>  BOOLEAN                   m1GPageTableSupport = FALSE;
>  BOOLEAN                   mCpuSmmRestrictedMemoryAccess;
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c
> index 00a284c369..c4f21e2155 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c
> @@ -1,7 +1,7 @@
>  /** @file
>    SMM CPU misc functions for x64 arch specific.
> 
> -Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
> +Copyright (c) 2015 - 2023, Intel Corporation. All rights reserved.<BR>
>  SPDX-License-Identifier: BSD-2-Clause-Patent
> 
>  **/
> @@ -12,7 +12,6 @@ EFI_PHYSICAL_ADDRESS  mGdtBuffer;
>  UINTN                 mGdtBufferSize;
> 
>  extern BOOLEAN  mCetSupported;
> -extern UINTN    mSmmShadowStackSize;
> 
>  X86_ASSEMBLY_PATCH_LABEL  mPatchCetPl0Ssp;
>  X86_ASSEMBLY_PATCH_LABEL  mPatchCetInterruptSsp;
> --
> 2.31.1.windows.1