From: "Ni, Ray" <ray.ni@intel.com>
To: gaoliming <gaoliming@byosoft.com.cn>,
"devel@edk2.groups.io" <devel@edk2.groups.io>,
"Feng, Ning" <ning.feng@intel.com>
Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg/MpLib:Do not assume BSP is #0.
Date: Mon, 27 May 2024 02:38:18 +0000 [thread overview]
Message-ID: <MN6PR11MB8244EE282AC2744A5A784DA38CF02@MN6PR11MB8244.namprd11.prod.outlook.com> (raw)
In-Reply-To: <00c901daae9b$2d686070$88392150$@byosoft.com.cn>
[-- Attachment #1: Type: text/plain, Size: 9037 bytes --]
I modified the commit message to add more Cc tags to by-pass CI checks.
And I found it has been merged. Thanks, Liming!
Thanks,
Ray
________________________________
From: gaoliming <gaoliming@byosoft.com.cn>
Sent: Saturday, May 25, 2024 20:00
To: devel@edk2.groups.io <devel@edk2.groups.io>; Ni, Ray <ray.ni@intel.com>; Feng, Ning <ning.feng@intel.com>
Subject: 回复: [edk2-devel] [PATCH] UefiCpuPkg/MpLib:Do not assume BSP is #0.
Ray:
This PR doesn’t pass CI. Please check.
Thanks
Liming
发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Ni, Ray
发送时间: 2024年5月25日 9:35
收件人: Feng, Ning <ning.feng@intel.com>; devel@edk2.groups.io; Ni, Ray <ray.ni@intel.com>; Gao, Liming <gaoliming@byosoft.com.cn>
主题: Re: [edk2-devel] [PATCH] UefiCpuPkg/MpLib:Do not assume BSP is #0.
I created PR for merge: UefiCpuPkg/MpLib:Do not assume BSP is #0. by niruiyu ・ Pull Request #5683 ・ tianocore/edk2 (github.com)<https://github.com/tianocore/edk2/pull/5683>
But, I cannot set "push" label.
@Gao, Liming<mailto:gaoliming@byosoft.com.cn>?
Thanks,
Ray
________________________________
From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> <devel@edk2.groups.io<mailto:devel@edk2.groups.io>> on behalf of Ni, Ray <ray.ni@intel.com<mailto:ray.ni@intel.com>>
Sent: Saturday, May 25, 2024 9:32
To: Feng, Ning <ning.feng@intel.com<mailto:ning.feng@intel.com>>; devel@edk2.groups.io<mailto:devel@edk2.groups.io> <devel@edk2.groups.io<mailto:devel@edk2.groups.io>>
Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg/MpLib:Do not assume BSP is #0.
Reviewed-by: Ray Ni <ray.ni@intel.com<mailto:ray.ni@intel.com>>
Thanks,
Ray
________________________________
From: Feng, Ning <ning.feng@intel.com<mailto:ning.feng@intel.com>>
Sent: Saturday, May 25, 2024 15:42
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io> <devel@edk2.groups.io<mailto:devel@edk2.groups.io>>
Cc: Feng, Ning <ning.feng@intel.com<mailto:ning.feng@intel.com>>; Ni, Ray <ray.ni@intel.com<mailto:ray.ni@intel.com>>
Subject: [PATCH] UefiCpuPkg/MpLib:Do not assume BSP is #0.
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4778
MPInitlib have wrong expectation that BSP index should always be 0 in
MpInitLibInitialize(), SwitchBsp(),ApWakeupFunction().
That will cause the data mismatch, if the initial BSP is not 0.
Cc: Ray Ni <ray.ni@intel.com<mailto:ray.ni@intel.com>>
Signed-off-by: Ning Feng <ning.feng@intel.com<mailto:ning.feng@intel.com>>
---
UefiCpuPkg/Library/MpInitLib/MpLib.c | 47 ++++++++++++++++++----------
1 file changed, 30 insertions(+), 17 deletions(-)
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index d724456502..ba497cbfd9 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -114,6 +114,10 @@ FutureBSPProc (
SaveVolatileRegisters (&DataInHob->APInfo.VolatileRegisters);
AsmExchangeRole (&DataInHob->APInfo, &DataInHob->BSPInfo);
RestoreVolatileRegisters (&DataInHob->APInfo.VolatileRegisters, FALSE);
+ //
+ // Restore VolatileReg saved in CpuMpData->CpuData
+ //
+ CopyMem (&DataInHob->CpuData[DataInHob->BspNumber].VolatileRegisters, &DataInHob->APInfo.VolatileRegisters, sizeof (CPU_VOLATILE_REGISTERS));
}
/**
@@ -761,11 +765,11 @@ ApWakeupFunction (
BistData = (UINT32)ApStackData->Bist;
//
- // CpuMpData->CpuData[0].VolatileRegisters is initialized based on BSP environment,
+ // CpuMpData->CpuData[BspNumber].VolatileRegisters is initialized based on BSP environment,
// to initialize AP in InitConfig path.
- // NOTE: IDTR.BASE stored in CpuMpData->CpuData[0].VolatileRegisters points to a different IDT shared by all APs.
+ // NOTE: IDTR.BASE stored in CpuMpData->CpuData[BspNumber].VolatileRegisters points to a different IDT shared by all APs.
//
- RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters, FALSE);
+ RestoreVolatileRegisters (&CpuMpData->CpuData[CpuMpData->BspNumber].VolatileRegisters, FALSE);
InitializeApData (CpuMpData, ProcessorNumber, BistData, ApTopOfStack);
ApStartupSignalBuffer = CpuMpData->CpuData[ProcessorNumber].StartupApSignal;
} else {
@@ -798,10 +802,10 @@ ApWakeupFunction (
// 1. AP is re-enabled after it's disabled, in either PEI or DXE phase.
// 2. AP is initialized in DXE phase.
// In either case, use the volatile registers value derived from BSP.
- // NOTE: IDTR.BASE stored in CpuMpData->CpuData[0].VolatileRegisters points to a
+ // NOTE: IDTR.BASE stored in CpuMpData->CpuData[BspNumber].VolatileRegisters points to a
// different IDT shared by all APs.
//
- RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters, FALSE);
+ RestoreVolatileRegisters (&CpuMpData->CpuData[CpuMpData->BspNumber].VolatileRegisters, FALSE);
} else {
if (CpuMpData->ApLoopMode == ApInHltLoop) {
//
@@ -927,7 +931,7 @@ DxeApEntryPoint (
AsmWriteMsr64 (MSR_IA32_EFER, EferMsr.Uint64);
}
- RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters, FALSE);
+ RestoreVolatileRegisters (&CpuMpData->CpuData[CpuMpData->BspNumber].VolatileRegisters, FALSE);
InterlockedIncrement ((UINT32 *)&CpuMpData->FinishedCount);
PlaceAPInMwaitLoopOrRunLoop (
CpuMpData->ApLoopMode,
@@ -2151,11 +2155,16 @@ MpInitLibInitialize (
CpuMpData->BackupBufferSize = ApResetVectorSizeBelow1Mb;
CpuMpData->WakeupBuffer = (UINTN)-1;
CpuMpData->CpuCount = 1;
- CpuMpData->BspNumber = 0;
- CpuMpData->WaitEvent = NULL;
- CpuMpData->SwitchBspFlag = FALSE;
- CpuMpData->CpuData = (CPU_AP_DATA *)(CpuMpData + 1);
- CpuMpData->CpuInfoInHob = (UINT64)(UINTN)(CpuMpData->CpuData + MaxLogicalProcessorNumber);
+ if (FirstMpHandOff == NULL) {
+ CpuMpData->BspNumber = 0;
+ } else {
+ CpuMpData->BspNumber = GetBspNumber (FirstMpHandOff);
+ }
+
+ CpuMpData->WaitEvent = NULL;
+ CpuMpData->SwitchBspFlag = FALSE;
+ CpuMpData->CpuData = (CPU_AP_DATA *)(CpuMpData + 1);
+ CpuMpData->CpuInfoInHob = (UINT64)(UINTN)(CpuMpData->CpuData + MaxLogicalProcessorNumber);
InitializeSpinLock (&CpuMpData->MpLock);
CpuMpData->SevEsIsEnabled = ConfidentialComputingGuestHas (CCAttrAmdSevEs);
CpuMpData->SevSnpIsEnabled = ConfidentialComputingGuestHas (CCAttrAmdSevSnp);
@@ -2186,11 +2195,11 @@ MpInitLibInitialize (
// Don't pass BSP's TR to APs to avoid AP init failure.
//
VolatileRegisters.Tr = 0;
- CopyMem (&CpuMpData->CpuData[0].VolatileRegisters, &VolatileRegisters, sizeof (VolatileRegisters));
+ CopyMem (&CpuMpData->CpuData[CpuMpData->BspNumber].VolatileRegisters, &VolatileRegisters, sizeof (VolatileRegisters));
//
// Set BSP basic information
//
- InitializeApData (CpuMpData, 0, 0, CpuMpData->Buffer + ApStackSize);
+ InitializeApData (CpuMpData, CpuMpData->BspNumber, 0, CpuMpData->Buffer + ApStackSize * (CpuMpData->BspNumber + 1));
//
// Save assembly code information
//
@@ -2245,9 +2254,8 @@ MpInitLibInitialize (
AmdSevUpdateCpuMpData (CpuMpData);
}
- CpuMpData->CpuCount = MaxLogicalProcessorNumber;
- CpuMpData->BspNumber = GetBspNumber (FirstMpHandOff);
- CpuInfoInHob = (CPU_INFO_IN_HOB *)(UINTN)CpuMpData->CpuInfoInHob;
+ CpuMpData->CpuCount = MaxLogicalProcessorNumber;
+ CpuInfoInHob = (CPU_INFO_IN_HOB *)(UINTN)CpuMpData->CpuInfoInHob;
for (MpHandOff = FirstMpHandOff;
MpHandOff != NULL;
MpHandOff = GetNextMpHandOffHob (MpHandOff))
@@ -2615,7 +2623,12 @@ SwitchBSPWorker (
SaveVolatileRegisters (&CpuMpData->BSPInfo.VolatileRegisters);
AsmExchangeRole (&CpuMpData->BSPInfo, &CpuMpData->APInfo);
RestoreVolatileRegisters (&CpuMpData->BSPInfo.VolatileRegisters, FALSE);
-
+ //
+ // Restore VolatileRegs saved in CpuMpData->CpuData
+ // Don't pass BSP's TR to APs to avoid AP init failure.
+ //
+ CopyMem (&CpuMpData->CpuData[CpuMpData->NewBspNumber].VolatileRegisters, &CpuMpData->BSPInfo.VolatileRegisters, sizeof (CPU_VOLATILE_REGISTERS));
+ CpuMpData->CpuData[CpuMpData->NewBspNumber].VolatileRegisters.Tr = 0;
//
// Set the BSP bit of MSR_IA32_APIC_BASE on new BSP
//
--
2.25.1
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prev parent reply other threads:[~2024-05-27 2:38 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-25 7:42 [edk2-devel] [PATCH] UefiCpuPkg/MpLib:Do not assume BSP is #0 Ning Feng
2024-05-25 1:32 ` Ni, Ray
[not found] ` <17D29748B3A2AE5A.12956@groups.io>
2024-05-25 1:34 ` Ni, Ray
2024-05-25 12:00 ` 回复: " gaoliming via groups.io
2024-05-27 2:38 ` Ni, Ray [this message]
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