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I modified the commit message to add more Cc tags to by-pass CI checks.

And I found it has been merged. Thanks, Liming!


Thanks,
Ray
From: gaoliming <gaolimi= ng@byosoft.com.cn>
Sent: Saturday, May 25, 2024 20:00
To: devel@edk2.groups.io <devel@edk2.groups.io>; Ni, Ray <r= ay.ni@intel.com>; Feng, Ning <ning.feng@intel.com>
Subject: =BB=D8=B8=B4: [edk2-devel] [PATCH] UefiCpuPkg/MpLib:Do not = assume BSP is #0.
 

Ray:

  This PR doesn=A1=AFt pass CI. Please check.

 

Thanks

Liming

=B7=A2=BC= =FE=C8=CB: devel@edk2.groups.io <devel@edk2.groups.io>= ; =B4=FA=B1=ED Ni, Ray
=B7=A2=CB=CD=CA=B1=BC=E4: 2024=C4=EA5=D4=C225=C8=D5 9:35
=CA=D5=BC=FE=C8=CB: Feng, Ning <ning.feng@intel.com>; devel@edk2.groups.io; Ni, R= ay <ray.ni@intel.com>; Gao, Liming <gaoliming@byosoft.com.cn> =D6=F7=CC=E2: Re: [edk2-devel] [PATCH] UefiCpuPkg/MpLib:Do not assume BSP is #0.=

 

But, I cannot set "push" label= .

 

 

Thanks,

Ray

From= : devel@edk2.groups.io <devel@edk2.groups.io> on behalf of= Ni, Ray <ray.ni@intel.com> Sent: Saturday, May 25, 2024 9:32
To: Feng, Ning <ning.feng@= intel.com>; devel@edk2.groups.io <devel@edk2.groups.io>
Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg/MpLib:Do not assume BSP= is #0.

 

Reviewed-by: Ray Ni <ray.ni@intel.com>

 

Thanks,

Ray

From= : Feng, Ning <ning.feng@intel.com>
Sent: Saturday, May 25, 2024 15:42
To: devel@edk2.groups.io= <devel@edk2.groups.io> Cc: Feng, Ning <ning.feng@= intel.com>; Ni, Ray <ray.ni@i= ntel.com>
Subject: [PATCH] UefiCpuPkg/MpLib:Do not assume BSP is #0.

 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D4778
MPInitlib have wrong expectation that BSP index should always be 0 in
MpInitLibInitialize(), SwitchBsp(),ApWakeupFunction().
That will cause the data mismatch, if the initial BSP is not 0.
Cc: Ray Ni <ray.ni@intel.com>=
Signed-off-by: Ning Feng <ning.fe= ng@intel.com>
---
 UefiCpuPkg/Library/MpInitLib/MpLib.c | 47 ++++++++++++++++++---------= -
 1 file changed, 30 insertions(+), 17 deletions(-)

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpIn= itLib/MpLib.c
index d724456502..ba497cbfd9 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -114,6 +114,10 @@ FutureBSPProc (
   SaveVolatileRegisters (&DataInHob->APInfo.VolatileRegis= ters);

   AsmExchangeRole (&DataInHob->APInfo, &DataInHob->= ;BSPInfo);

   RestoreVolatileRegisters (&DataInHob->APInfo.VolatileRe= gisters, FALSE);

+  //

+  // Restore VolatileReg saved in CpuMpData->CpuData

+  //

+  CopyMem (&DataInHob->CpuData[DataInHob->BspNumber].Volati= leRegisters, &DataInHob->APInfo.VolatileRegisters, sizeof (CPU_VOLAT= ILE_REGISTERS));

 }

 

 /**

@@ -761,11 +765,11 @@ ApWakeupFunction (
       BistData     =3D (= UINT32)ApStackData->Bist;

 

       //

-      // CpuMpData->CpuData[0].VolatileRegiste= rs is initialized based on BSP environment,

+      // CpuMpData->CpuData[BspNumber].Volatil= eRegisters is initialized based on BSP environment,

       //   to initialize AP in Ini= tConfig path.

-      // NOTE: IDTR.BASE stored in CpuMpData->= CpuData[0].VolatileRegisters points to a different IDT shared by all APs.
+      // NOTE: IDTR.BASE stored in CpuMpData->= CpuData[BspNumber].VolatileRegisters points to a different IDT shared by al= l APs.

       //

-      RestoreVolatileRegisters (&CpuMpData-&g= t;CpuData[0].VolatileRegisters, FALSE);

+      RestoreVolatileRegisters (&CpuMpData-&g= t;CpuData[CpuMpData->BspNumber].VolatileRegisters, FALSE);

       InitializeApData (CpuMpData, Processor= Number, BistData, ApTopOfStack);

       ApStartupSignalBuffer =3D CpuMpData-&g= t;CpuData[ProcessorNumber].StartupApSignal;

     } else {

@@ -798,10 +802,10 @@ ApWakeupFunction (
         // 1. AP is re-enabled aft= er it's disabled, in either PEI or DXE phase.

         // 2. AP is initialized in= DXE phase.

         // In either case, use the= volatile registers value derived from BSP.

-        // NOTE: IDTR.BASE stored in Cp= uMpData->CpuData[0].VolatileRegisters points to a

+        // NOTE: IDTR.BASE stored in Cp= uMpData->CpuData[BspNumber].VolatileRegisters points to a

         //   different I= DT shared by all APs.

         //

-        RestoreVolatileRegisters (&= CpuMpData->CpuData[0].VolatileRegisters, FALSE);

+        RestoreVolatileRegisters (&= CpuMpData->CpuData[CpuMpData->BspNumber].VolatileRegisters, FALSE);
       } else {

         if (CpuMpData->ApLoopMo= de =3D=3D ApInHltLoop) {

           //

@@ -927,7 +931,7 @@ DxeApEntryPoint (
     AsmWriteMsr64 (MSR_IA32_EFER, EferMsr.Uint64);

   }

 

-  RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileReg= isters, FALSE);

+  RestoreVolatileRegisters (&CpuMpData->CpuData[CpuMpData->= BspNumber].VolatileRegisters, FALSE);

   InterlockedIncrement ((UINT32 *)&CpuMpData->FinishedCou= nt);

   PlaceAPInMwaitLoopOrRunLoop (

     CpuMpData->ApLoopMode,

@@ -2151,11 +2155,16 @@ MpInitLibInitialize (
   CpuMpData->BackupBufferSize =3D ApResetVectorSizeBelow1Mb;<= br>
   CpuMpData->WakeupBuffer     =3D (UINTN)= -1;

   CpuMpData->CpuCount      &nbs= p;  =3D 1;

-  CpuMpData->BspNumber        = =3D 0;

-  CpuMpData->WaitEvent        = =3D NULL;

-  CpuMpData->SwitchBspFlag    =3D FALSE;

-  CpuMpData->CpuData       &nbs= p;  =3D (CPU_AP_DATA *)(CpuMpData + 1);

-  CpuMpData->CpuInfoInHob     =3D (UINT64)(UIN= TN)(CpuMpData->CpuData + MaxLogicalProcessorNumber);

+  if (FirstMpHandOff =3D=3D NULL) {

+    CpuMpData->BspNumber =3D 0;

+  } else {

+    CpuMpData->BspNumber =3D GetBspNumber (FirstMpHandOf= f);

+  }

+

+  CpuMpData->WaitEvent     =3D NULL;

+  CpuMpData->SwitchBspFlag =3D FALSE;

+  CpuMpData->CpuData       =3D (CPU_= AP_DATA *)(CpuMpData + 1);

+  CpuMpData->CpuInfoInHob  =3D (UINT64)(UINTN)(CpuMpData->= CpuData + MaxLogicalProcessorNumber);

   InitializeSpinLock (&CpuMpData->MpLock);

   CpuMpData->SevEsIsEnabled   =3D ConfidentialCompu= tingGuestHas (CCAttrAmdSevEs);

   CpuMpData->SevSnpIsEnabled  =3D ConfidentialComputingG= uestHas (CCAttrAmdSevSnp);

@@ -2186,11 +2195,11 @@ MpInitLibInitialize (
   // Don't pass BSP's TR to APs to avoid AP init failure.

   //

   VolatileRegisters.Tr =3D 0;

-  CopyMem (&CpuMpData->CpuData[0].VolatileRegisters, &Vola= tileRegisters, sizeof (VolatileRegisters));

+  CopyMem (&CpuMpData->CpuData[CpuMpData->BspNumber].Volati= leRegisters, &VolatileRegisters, sizeof (VolatileRegisters));

   //

   // Set BSP basic information

   //

-  InitializeApData (CpuMpData, 0, 0, CpuMpData->Buffer + ApStackSi= ze);

+  InitializeApData (CpuMpData, CpuMpData->BspNumber, 0, CpuMpData-= >Buffer + ApStackSize * (CpuMpData->BspNumber + 1));

   //

   // Save assembly code information

   //

@@ -2245,9 +2254,8 @@ MpInitLibInitialize (
       AmdSevUpdateCpuMpData (CpuMpData);

     }

 

-    CpuMpData->CpuCount  =3D MaxLogicalProcessorNum= ber;

-    CpuMpData->BspNumber =3D GetBspNumber (FirstMpHandOf= f);

-    CpuInfoInHob       &= nbsp; =3D (CPU_INFO_IN_HOB *)(UINTN)CpuMpData->CpuInfoInHob;

+    CpuMpData->CpuCount =3D MaxLogicalProcessorNumber;
+    CpuInfoInHob        = =3D (CPU_INFO_IN_HOB *)(UINTN)CpuMpData->CpuInfoInHob;

     for (MpHandOff =3D FirstMpHandOff;

          MpHandOff !=3D NULL;=

          MpHandOff =3D GetNex= tMpHandOffHob (MpHandOff))

@@ -2615,7 +2623,12 @@ SwitchBSPWorker (
   SaveVolatileRegisters (&CpuMpData->BSPInfo.VolatileRegi= sters);

   AsmExchangeRole (&CpuMpData->BSPInfo, &CpuMpData-&g= t;APInfo);

   RestoreVolatileRegisters (&CpuMpData->BSPInfo.VolatileR= egisters, FALSE);

-

+  //

+  // Restore VolatileRegs saved in CpuMpData->CpuData

+  // Don't pass BSP's TR to APs to avoid AP init failure.

+  //

+  CopyMem (&CpuMpData->CpuData[CpuMpData->NewBspNumber].Vol= atileRegisters, &CpuMpData->BSPInfo.VolatileRegisters, sizeof (CPU_V= OLATILE_REGISTERS));

+  CpuMpData->CpuData[CpuMpData->NewBspNumber].VolatileRegisters= .Tr =3D 0;

   //

   // Set the BSP bit of MSR_IA32_APIC_BASE on new BSP

   //

--
2.25.1

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