From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web10.73339.1682403215483920979 for ; Mon, 24 Apr 2023 23:13:35 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=K9DBgFR4; spf=pass (domain: intel.com, ip: 134.134.136.126, mailfrom: ray.ni@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1682403215; x=1713939215; h=from:to:cc:subject:date:message-id:references: in-reply-to:content-transfer-encoding:mime-version; bh=ETRKWLUzN1k7VQsnulieiGYZc1HAwnz5Z7p5lio+UDs=; b=K9DBgFR4BiSOluN4PbqSx7qkFFFd2ZtgZ8FNCyvXd5xHK1ZXtUodERkW UIsrGp4dAOLhUccx6CxN/G6P2Sa9/rBq6/OFyKSt7e2id6MDHEls5MZcw NBFbokMsSDE2JxkTEbp3rGzxpGZOkBlvnoSeWC0yayy4W4/pOgdnfufaA zx3c9rkOP9gymr5j6JFsA7iF94dHKOWRHjUei/iSwVI+/HBrLzCC2jUzR najt5XU7aKJles0YDHYpC+1umUGFuoEAPxLsXsbREsDQBnvrlKW/QHd4Z rHql5GOlDMdGQSluoeO85IDrFrlJY+NH+2oYz+CgYs2oSmkk/Hkiwsli0 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10690"; a="330882038" X-IronPort-AV: E=Sophos;i="5.99,224,1677571200"; d="scan'208";a="330882038" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2023 23:13:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10690"; a="804946213" X-IronPort-AV: E=Sophos;i="5.99,224,1677571200"; d="scan'208";a="804946213" Received: from fmsmsx601.amr.corp.intel.com ([10.18.126.81]) by fmsmga002.fm.intel.com with ESMTP; 24 Apr 2023 23:13:34 -0700 Received: from fmsmsx610.amr.corp.intel.com (10.18.126.90) by fmsmsx601.amr.corp.intel.com (10.18.126.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Mon, 24 Apr 2023 23:13:34 -0700 Received: from fmsedg601.ED.cps.intel.com (10.1.192.135) by fmsmsx610.amr.corp.intel.com (10.18.126.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23 via Frontend Transport; Mon, 24 Apr 2023 23:13:34 -0700 Received: from NAM12-DM6-obe.outbound.protection.outlook.com (104.47.59.168) by edgegateway.intel.com (192.55.55.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.23; Mon, 24 Apr 2023 23:13:33 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=GTb1RNTUfn4slXlphd8uEIp+0f4t80U4+z0pEEPyudfBsT1pZur5uWEJrdCScFXcknlUq8shuwCeHRxw3GTR4G62ab3HkcjManEYfdfYT0YQUvb5jHsvG4h1ErpyAVHnDfAkWRLOqjAsbISvgnfOAeRmRk5+K80xR3iLg2Jxr4l3gqpOhohk7rRIOxCFRh6MNwkmECF5nbJcrqS4kIl5xxM0gtY5r/PuGcaLyiZasRV90dnTpuLfD8XMlMj+0blGCS6cmUuy4CP8vlo2AchX+qD6GFxfAWGqj7SOqzFn8N5xc++EEpo8Wk7zz2PfPEJpmnK3DvPocKFC9FLiyrGxsw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=M7zMgK2JCOjiHAV8jsnXG1UDnaCqzxS5joYILhFkJ6I=; b=V/2HT7MJx+YJfVbCKrBOe6n5rZuohr4itE4ar+WM2q+jcMJ+p78h2O6PnrHXBMwuZMKRH6xhJD+xgUYPRyt8rEel2hADTaI1QT8+e35awTAhXpMTO9MREmfrCouTwzFglk0CADjLxY2XfwfWNAbExrdSoLgCsP+uUjQGDoyNJPLfpmyR4xPLxZ+fhoBWmEIFX8ySS7ExSo7ThUQdrvwn2LW4/iBloW7ix7xFnNBZYuoolRZgyDaYprfd7mz7JJ0pIgWbTizfUO3LV3bICH8YY7iUWRFPn0gqR6WMYIPNL/sM6vJ2fZ5Qxe83IKV2unmzWJ6MCsdUJ+O4NZ40AOGy0g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Received: from MN6PR11MB8244.namprd11.prod.outlook.com (2603:10b6:208:470::14) by DS0PR11MB6496.namprd11.prod.outlook.com (2603:10b6:8:c0::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6319.33; Tue, 25 Apr 2023 06:13:31 +0000 Received: from MN6PR11MB8244.namprd11.prod.outlook.com ([fe80::892b:b8e6:bab7:635d]) by MN6PR11MB8244.namprd11.prod.outlook.com ([fe80::892b:b8e6:bab7:635d%5]) with mapi id 15.20.6319.033; Tue, 25 Apr 2023 06:13:31 +0000 From: "Ni, Ray" To: "Tan, Dun" , "devel@edk2.groups.io" CC: "Dong, Eric" , "Kumar, Rahul R" , Gerd Hoffmann , "Chen, Xiao X" Subject: Re: [PATCH 2/3] UefiCpuPkg: Update PT code to support enable collect performance Thread-Topic: [PATCH 2/3] UefiCpuPkg: Update PT code to support enable collect performance Thread-Index: AQHZdzmHqENwqrmHFkGPgy4v5IfqZq87ibMQ Date: Tue, 25 Apr 2023 06:13:31 +0000 Message-ID: References: <20230425054738.2937-1-dun.tan@intel.com> <20230425054738.2937-3-dun.tan@intel.com> In-Reply-To: <20230425054738.2937-3-dun.tan@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: MN6PR11MB8244:EE_|DS0PR11MB6496:EE_ x-ms-office365-filtering-correlation-id: 56cb6a98-a353-4322-6d3b-08db4554316e x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: 3Fr4mmzbNf0J3AnOR9iBYNAhaewlO0dH4XqZPLjJG8yZd+lHDUZm6SOgyyRk4yeAzvv2d+7SQ7JzvCe0AOT2WwXkC/YVz1XBHBYUUMAIws0wn4WgM4r0qssDQJbrLBOIarX7fgmeJJyA7v+mfQtX4fpdvpaOwpItTv3vJn+SZe6VEUJOozoPiBO9gL3B/Z+vBdAmHD1wwD4eFtaS3NLWGfH7FK9v4e6CUQqhCCmV9BP8bDB91X4IwjLdCfxTe3bgCli/yPkOqgko23CyruShI0IdicfA4YRRUDveTRwpShKBMDtG54tT8cGxwLydA6PwwoZGgHiXrQpa58oLLasNSQYY02srf0gJ6/p2e3+6peTdlLXbFWIos3g25P/iph5JLSmdIzIrPW1JGtcipKTsyW+l1xdhTXEmp4mDlqUDGPTAOdQMDECDDT5Z+HepuEnWz4tF75QQskPKUxnvHVikky1oyC6CVYzQF1jsxWnuyePPtohPp1gT/NST/g4zn0QJZO2ywlMd/CovtH0pzSTWY6p3DEbky5DqA2xpDx3t3xG4i56S9zdIlOsXzDF9izQE5AG6IWjRrUXNbkJgPlWzhXS8W5Cd6hIZGA40adurFmc= x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:MN6PR11MB8244.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230028)(346002)(136003)(376002)(366004)(396003)(39860400002)(451199021)(54906003)(110136005)(38070700005)(478600001)(76116006)(82960400001)(316002)(4326008)(66446008)(66476007)(66556008)(55016003)(66946007)(64756008)(122000001)(41300700001)(2906002)(8936002)(8676002)(52536014)(15650500001)(5660300002)(38100700002)(86362001)(186003)(966005)(6506007)(26005)(53546011)(9686003)(33656002)(107886003)(7696005)(71200400001)(83380400001);DIR:OUT;SFP:1102; x-ms-exchange-antispam-messagedata-chunkcount: 1 x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?Xd5rTcnbXj0aEbF0ZuOqBEle1tpHwqT4U+rnklfOvgrfRZo2/eQ7wLcU0PZA?= =?us-ascii?Q?0vsr6OAxz8uTaiYe8vqqpU9S/uE9kps3L6JhuycG+zGj5BaIyIUse9zusaaO?= =?us-ascii?Q?hfq1aqv4p2TXaySvYf4K0KAb8WyF5hblbkmHzGA3d8AdxPZfFZU2y83HyPFH?= =?us-ascii?Q?CvWfibEgmF0i55fJ2C188OHpI/OZSKJf18pVfCZ0xuZq0r8XnRtGUy0SZSLs?= =?us-ascii?Q?zcuHYBHeChR6QvWGib2GRZjhAUrYzKsJOYa5xRkjtVwSM1WFktmHjccH4lC4?= =?us-ascii?Q?oxu2YQWJZGm3JY9eLOT7Z1igIcvJGVdg3n7UxdVIrDcV+Ad97hvzydbHUB88?= =?us-ascii?Q?fZuQkVPUFpUA9GlOthMbeH0UG2RrjyNN6Lu/NaQhxxicR5aEGhzj4qjxnvwP?= =?us-ascii?Q?mcZ617rqFlX3d85YzU2z/Dr4ZCpggxeaYC4Jb4TfUK0mRK6+OtI5MwaXMU7r?= =?us-ascii?Q?PhnhW/6piTFVT6JJPm1LOM0comp9LCRO7c2BgZtOke2bsqio1nc/CyHKBnit?= =?us-ascii?Q?081IXLPHWQ+wdigXrkGzm2a8xXhKCTZIB0KBu/N7BlT3YM4b5AZ5E54Gvb9u?= =?us-ascii?Q?I3nVgv9EuyLUbdErFzwKowgy4jNqPMS6g7HizNQbxdKPCmbX9UHaezbmVO49?= =?us-ascii?Q?sDFQqZfv8J6Fb4it652mSGCyz3+E0UvDBE5YxXKhk+BF9r7T+HyRSnf+IpEC?= =?us-ascii?Q?tjS4n5L2oILJuZy6OoUtBoT5+p/hT6NnCXnsHMn9swmhF86Vecvijg5AbtNY?= =?us-ascii?Q?sguQCAdUGQ51dMSVSYK8i807nwNVks+46iUwnKx6ZEJI32MVoMX0ScfvcUuZ?= =?us-ascii?Q?pJLv1ZP5W3H+mBjqecxYJuKmnx1BbrgelTwYZWBwjyBF/hH7lSlDP0yMH2Kg?= =?us-ascii?Q?FgTRwfiQVNrsK0y/q+HDLGDlJQVqqKLecQxyWUeNQrI3ZrFxrStO2vig9omA?= =?us-ascii?Q?xlElmA1qNPHg2TKG4bZf1AcfknHr+B75fIB9GDYCTp+NGwfjCCC2bGa9eGB+?= =?us-ascii?Q?yBEZpwK+ZA5XqK77YEiMhYVIlpn7XSaHwdL07ZYh5aXdDzEdQmRgEiqAW9Ha?= =?us-ascii?Q?6ooT7FsohjM92lYF8798SgAvDlpdUD9afa9Y8d1I49JH6ni/epOuE+M/SxL7?= =?us-ascii?Q?QqP+nRaUGHkzu/55W+t6h/XP+tWwA198Jm4ReQy1DVuBl6i27AYrhB7bwUcp?= =?us-ascii?Q?uUTB/md5/8jxE0no6tDW5YuwJgzItLaK3x7Gq1l/VPosYfGyl3OYfRonvJVn?= =?us-ascii?Q?UVnEsR0nCsWDrBiyQ38ZJaWIxj/tDKDrGHvAeidy4Vin7dzN6Y/f61n4mNgs?= =?us-ascii?Q?7aGluYnDrvpnVOY0/aeTnzOkWolovXnMzbrFUiUdxnU3NGxYb0kuisB3jfj8?= =?us-ascii?Q?UoU7ppW0rBUYLfodryT68o2/rP+CS8AD0fLqCOyrc5YIrSg/cGy/ogGn1kGT?= =?us-ascii?Q?mPApcfGubvp26MwIWxa4p2kiGmAtlGEYs+eNnedq+3lDwf1d4LPkHPveksW2?= =?us-ascii?Q?xzGN0hKtSN4vkiIZVTgsanqsvySlaL8hqw4n0rpDx+VatBHJaVvYhzf3dZOY?= =?us-ascii?Q?v5PqlVJZOvFGxlSWI8c=3D?= MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MN6PR11MB8244.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 56cb6a98-a353-4322-6d3b-08db4554316e X-MS-Exchange-CrossTenant-originalarrivaltime: 25 Apr 2023 06:13:31.1520 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: mYdLehbH8eu3iJeaNm+RyrycezUoOJbQT6XdD617XSOt3gEyLqNM3p+LUafh7NiS1C4RO7JlUM+qJBtVhfT4fg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR11MB6496 Return-Path: ray.ni@intel.com X-OriginatorOrg: intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable 1. ProcessorTrace capabilities might differ in different cpu threads. So, the capabilities detection needs to be done in ProcTraceSupport() which= runs on each AP. 2. TSCEn is not guarded by Ebx.Bits.ConfigurablePsb, right? 3. Why do you need to clear the CYCEn/CYCThresh/TSCEn bit when the ProcTrac= eEnablePerformanceCollecting is FALSE? 4. Please use a PCD name that's consistent with existing ones. Such as: Pcd= CpuProcTracePerformanceCollecting?=20 > -----Original Message----- > From: Tan, Dun > Sent: Tuesday, April 25, 2023 1:48 PM > To: devel@edk2.groups.io > Cc: Dong, Eric ; Ni, Ray ; Kumar, > Rahul R ; Gerd Hoffmann ; > Chen, Xiao X > Subject: [PATCH 2/3] UefiCpuPkg: Update PT code to support enable collect > performance >=20 > Update ProcTrace feature code to support enable collect performance > data by generating CYC and TSC packets. Add a new dynamic > PCD to indicate if enable performance collecting. In ProcTrace.c > code, if this new PCD is true, CYC and TSC packets will be > generated by setting the corresponding MSR bits feilds. >=20 > Bugzila: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4423 > Signed-off-by: Dun Tan > Cc: Eric Dong > Cc: Ray Ni > Cc: Rahul Kumar > Cc: Gerd Hoffmann > Cc: Xiao X Chen > --- > UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | > 1 + > UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c | 66 > +++++++++++++++++++++++++++++++++++++++++++++++------------------ > - > UefiCpuPkg/UefiCpuPkg.dec | 8 ++= ++++++ > 3 files changed, 56 insertions(+), 19 deletions(-) >=20 > diff --git > a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf > b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf > index 319c8b4842..e31c1e7317 100644 > --- > a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf > +++ > b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf > @@ -63,3 +63,4 @@ > gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme ## > SOMETIMES_CONSUMES > gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize ## > SOMETIMES_CONSUMES > gUefiCpuPkgTokenSpaceGuid.PcdEnableProcessorTraceOnBspOnly ## > SOMETIMES_CONSUMES > + gUefiCpuPkgTokenSpaceGuid.ProcTraceEnablePerformanceCollecting ## > SOMETIMES_CONSUMES > diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c > b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c > index f57544bf7d..1a101b7288 100644 > --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c > +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c > @@ -171,25 +171,26 @@ ProcTraceInitialize ( > IN BOOLEAN State > ) > { > - UINT32 MemRegionSize; > - UINTN Pages; > - UINTN Alignment; > - UINTN MemRegionBaseAddr; > - UINTN *ThreadMemRegionTable; > - UINTN Index; > - UINTN TopaTableBaseAddr; > - UINTN AlignedAddress; > - UINTN *TopaMemArray; > - PROC_TRACE_TOPA_TABLE *TopaTable; > - PROC_TRACE_DATA *ProcTraceData; > - BOOLEAN FirstIn; > - MSR_IA32_RTIT_CTL_REGISTER CtrlReg; > - MSR_IA32_RTIT_STATUS_REGISTER StatusReg; > - MSR_IA32_RTIT_OUTPUT_BASE_REGISTER OutputBaseReg; > - MSR_IA32_RTIT_OUTPUT_MASK_PTRS_REGISTER OutputMaskPtrsReg; > - RTIT_TOPA_TABLE_ENTRY *TopaEntryPtr; > - BOOLEAN IsBsp; > - BOOLEAN EnableOnBspOnly; > + UINT32 MemRegionSize; > + UINTN Pages; > + UINTN Alignment; > + UINTN MemRegionBaseAddr; > + UINTN *ThreadMemRegionTable; > + UINTN Index; > + UINTN TopaTableBaseAddr; > + UINTN AlignedAddress; > + UINTN *TopaMemArray; > + PROC_TRACE_TOPA_TABLE *TopaTable; > + PROC_TRACE_DATA *ProcTraceData; > + BOOLEAN FirstIn; > + MSR_IA32_RTIT_CTL_REGISTER CtrlReg; > + MSR_IA32_RTIT_STATUS_REGISTER StatusReg; > + MSR_IA32_RTIT_OUTPUT_BASE_REGISTER OutputBaseReg; > + MSR_IA32_RTIT_OUTPUT_MASK_PTRS_REGISTER OutputMaskPtrsReg; > + RTIT_TOPA_TABLE_ENTRY *TopaEntryPtr; > + BOOLEAN IsBsp; > + BOOLEAN EnableOnBspOnly; > + CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF_EBX Ebx; >=20 > // > // The scope of the MSR_IA32_RTIT_* is core for below processor type, > only program > @@ -510,6 +511,33 @@ ProcTraceInitialize ( > CtrlReg.Bits.User =3D 1; > CtrlReg.Bits.BranchEn =3D 1; > CtrlReg.Bits.TraceEn =3D 1; > + > + AsmCpuidEx (CPUID_INTEL_PROCESSOR_TRACE, > CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF, NULL, &Ebx.Uint32, NULL, > NULL); > + > + // > + // Generate CYC/TSC timing packets to to collect performance data. > + // > + if (PcdGetBool (ProcTraceEnablePerformanceCollecting)) { > + if (Ebx.Bits.ConfigurablePsb =3D=3D 1) { > + CtrlReg.Bits.CYCEn =3D 1; > + CtrlReg.Bits.CYCThresh =3D 5; > + > + // > + // Write to TSCEn is always supported > + // > + CtrlReg.Bits.TSCEn =3D 1; > + } else { > + DEBUG ((DEBUG_INFO, "ProcTrace: CYC packet is not supported. Faile= d > to enable Performance Collecting \n")); > + } > + } else { > + if (Ebx.Bits.ConfigurablePsb =3D=3D 1) { > + CtrlReg.Bits.CYCEn =3D 0; > + CtrlReg.Bits.CYCThresh =3D 0; > + } > + > + CtrlReg.Bits.TSCEn =3D 0; > + } > + > CPU_REGISTER_TABLE_WRITE64 ( > ProcessorNumber, > Msr, > diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec > index 1a4b9333ab..2b0de6d5c3 100644 > --- a/UefiCpuPkg/UefiCpuPkg.dec > +++ b/UefiCpuPkg/UefiCpuPkg.dec > @@ -429,5 +429,13 @@ > # @Prompt Enable CPU processor trace only on BSP. >=20 > gUefiCpuPkgTokenSpaceGuid.PcdEnableProcessorTraceOnBspOnly|FALSE|B > OOLEAN|0x60000019 >=20 > + ## This PCD indicates if enable performance collecting when CPU > processor trace is enabled.

> + # CYC/TSC timing packets will be generated to collect performance dat= a if > this PCD is TRUE. > + # This PCD is ignored if CPU processor trace is disabled.

> + # TRUE - Performance collecting will be enabled in processor trace.<= BR> > + # FASLE - Performance collecting will be disabled in processor trace.=
> + # @Prompt Enable performance collecting when processor trace is > enabled. > + > gUefiCpuPkgTokenSpaceGuid.ProcTraceEnablePerformanceCollecting|FALSE > |BOOLEAN|0x60000020 > + > [UserExtensions.TianoCore."ExtraFiles"] > UefiCpuPkgExtra.uni > -- > 2.39.1.windows.1