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From: "Ni, Ray" <ray.ni@intel.com>
To: Sunil V L <sunilvl@ventanamicro.com>,
	"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Dong, Eric" <eric.dong@intel.com>,
	"Kumar, Rahul R" <rahul.r.kumar@intel.com>,
	Daniel Schaefer <git@danielschaefer.me>,
	"Abner Chang" <abner.chang@amd.com>,
	Gerd Hoffmann <kraxel@redhat.com>
Subject: Re: [edk2-staging/RiscV64QemuVirt PATCH V7 08/20] UefiCpuPkg/CpuTimerLib: Add RISC-V instance
Date: Thu, 9 Feb 2023 05:37:29 +0000	[thread overview]
Message-ID: <MN6PR11MB8244F115F6DCC0096E29A8DF8CD99@MN6PR11MB8244.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20230128191807.2080547-9-sunilvl@ventanamicro.com>

Can you rename CpuTimerLib to RiscVTimerLib or something else that's more specific?
RiscV64 sub-directory might not be necessary.

> -----Original Message-----
> From: Sunil V L <sunilvl@ventanamicro.com>
> Sent: Sunday, January 29, 2023 3:18 AM
> To: devel@edk2.groups.io
> Cc: Dong, Eric <eric.dong@intel.com>; Ni, Ray <ray.ni@intel.com>; Kumar,
> Rahul R <rahul.r.kumar@intel.com>; Daniel Schaefer
> <git@danielschaefer.me>; Abner Chang <abner.chang@amd.com>; Gerd
> Hoffmann <kraxel@redhat.com>
> Subject: [edk2-staging/RiscV64QemuVirt PATCH V7 08/20]
> UefiCpuPkg/CpuTimerLib: Add RISC-V instance
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076
> 
> This is mostly copied from
> edk2-platforms/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib
> 
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Rahul Kumar <rahul1.kumar@intel.com>
> Cc: Daniel Schaefer <git@danielschaefer.me>
> Cc: Abner Chang <abner.chang@amd.com>
> Cc: Gerd Hoffmann <kraxel@redhat.com>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> Acked-by: Abner Chang <abner.chang@amd.com>
> ---
>  UefiCpuPkg/UefiCpuPkg.dsc                                 |   1 +
>  UefiCpuPkg/Library/CpuTimerLib/BaseRiscV64CpuTimerLib.inf |  32 ++++
>  UefiCpuPkg/Library/CpuTimerLib/RiscV64/CpuTimerLib.c      | 199
> ++++++++++++++++++++
>  3 files changed, 232 insertions(+)
> 
> diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
> index 8f2be6cd1b05..2df02bf75a35 100644
> --- a/UefiCpuPkg/UefiCpuPkg.dsc
> +++ b/UefiCpuPkg/UefiCpuPkg.dsc
> @@ -199,6 +199,7 @@ [Components.RISCV64]
>    UefiCpuPkg/CpuTimerDxe/CpuTimerDxe.inf
> 
> UefiCpuPkg/Library/CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHan
> dlerLib.inf
>    UefiCpuPkg/CpuDxe/CpuDxeRiscV64.inf
> +  UefiCpuPkg/Library/CpuTimerLib/BaseRiscV64CpuTimerLib.inf
> 
>  [BuildOptions]
>    *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
> diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseRiscV64CpuTimerLib.inf
> b/UefiCpuPkg/Library/CpuTimerLib/BaseRiscV64CpuTimerLib.inf
> new file mode 100644
> index 000000000000..c920e8e098b5
> --- /dev/null
> +++ b/UefiCpuPkg/Library/CpuTimerLib/BaseRiscV64CpuTimerLib.inf
> @@ -0,0 +1,32 @@
> +## @file
> +# RISC-V Base CPU Timer Library Instance
> +#
> +#  Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All
> rights reserved.<BR>
> +#  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.<BR>
> +#
> +#  SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +##
> +
> +[Defines]
> +  INF_VERSION                    = 0x0001001B
> +  BASE_NAME                      = BaseRisV64CpuTimerLib
> +  FILE_GUID                      = B635A600-EA24-4199-88E8-5761EEA96A51
> +  MODULE_TYPE                    = BASE
> +  VERSION_STRING                 = 1.0
> +  LIBRARY_CLASS                  = TimerLib
> +
> +[Sources]
> +  RiscV64/CpuTimerLib.c
> +
> +[Packages]
> +  MdePkg/MdePkg.dec
> +  UefiCpuPkg/UefiCpuPkg.dec
> +
> +[LibraryClasses]
> +  BaseLib
> +  PcdLib
> +  DebugLib
> +
> +[Pcd]
> +  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ##
> CONSUMES
> diff --git a/UefiCpuPkg/Library/CpuTimerLib/RiscV64/CpuTimerLib.c
> b/UefiCpuPkg/Library/CpuTimerLib/RiscV64/CpuTimerLib.c
> new file mode 100644
> index 000000000000..9c8efc0f3530
> --- /dev/null
> +++ b/UefiCpuPkg/Library/CpuTimerLib/RiscV64/CpuTimerLib.c
> @@ -0,0 +1,199 @@
> +/** @file
> +  RISC-V instance of Timer Library.
> +
> +  Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All
> rights reserved.<BR>
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include <Uefi.h>
> +#include <Library/BaseLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/PcdLib.h>
> +#include <Register/RiscV64/RiscVImpl.h>
> +
> +/**
> +  Stalls the CPU for at least the given number of ticks.
> +
> +  Stalls the CPU for at least the given number of ticks. It's invoked by
> +  MicroSecondDelay() and NanoSecondDelay().
> +
> +  @param  Delay     A period of time to delay in ticks.
> +
> +**/
> +VOID
> +InternalRiscVTimerDelay (
> +  IN UINT32  Delay
> +  )
> +{
> +  UINT32  Ticks;
> +  UINT32  Times;
> +
> +  Times  = Delay >> (RISCV_TIMER_COMPARE_BITS - 2);
> +  Delay &= ((1 << (RISCV_TIMER_COMPARE_BITS - 2)) - 1);
> +  do {
> +    //
> +    // The target timer count is calculated here
> +    //
> +    Ticks = RiscVReadTimer () + Delay;
> +    Delay = 1 << (RISCV_TIMER_COMPARE_BITS - 2);
> +    while (((Ticks - RiscVReadTimer ()) & (1 << (RISCV_TIMER_COMPARE_BITS
> - 1))) == 0) {
> +      CpuPause ();
> +    }
> +  } while (Times-- > 0);
> +}
> +
> +/**
> +  Stalls the CPU for at least the given number of microseconds.
> +
> +  Stalls the CPU for the number of microseconds specified by MicroSeconds.
> +
> +  @param  MicroSeconds  The minimum number of microseconds to delay.
> +
> +  @return MicroSeconds
> +
> +**/
> +UINTN
> +EFIAPI
> +MicroSecondDelay (
> +  IN UINTN  MicroSeconds
> +  )
> +{
> +  InternalRiscVTimerDelay (
> +    (UINT32)DivU64x32 (
> +              MultU64x32 (
> +                MicroSeconds,
> +                PcdGet64 (PcdCpuCoreCrystalClockFrequency)
> +                ),
> +              1000000u
> +              )
> +    );
> +  return MicroSeconds;
> +}
> +
> +/**
> +  Stalls the CPU for at least the given number of nanoseconds.
> +
> +  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
> +
> +  @param  NanoSeconds The minimum number of nanoseconds to delay.
> +
> +  @return NanoSeconds
> +
> +**/
> +UINTN
> +EFIAPI
> +NanoSecondDelay (
> +  IN UINTN  NanoSeconds
> +  )
> +{
> +  InternalRiscVTimerDelay (
> +    (UINT32)DivU64x32 (
> +              MultU64x32 (
> +                NanoSeconds,
> +                PcdGet64 (PcdCpuCoreCrystalClockFrequency)
> +                ),
> +              1000000000u
> +              )
> +    );
> +  return NanoSeconds;
> +}
> +
> +/**
> +  Retrieves the current value of a 64-bit free running performance counter.
> +
> +  Retrieves the current value of a 64-bit free running performance counter.
> The
> +  counter can either count up by 1 or count down by 1. If the physical
> +  performance counter counts by a larger increment, then the counter
> values
> +  must be translated. The properties of the counter can be retrieved from
> +  GetPerformanceCounterProperties().
> +
> +  @return The current value of the free running performance counter.
> +
> +**/
> +UINT64
> +EFIAPI
> +GetPerformanceCounter (
> +  VOID
> +  )
> +{
> +  return (UINT64)RiscVReadTimer ();
> +}
> +
> +/**return
> +  Retrieves the 64-bit frequency in Hz and the range of performance counter
> +  values.
> +
> +  If StartValue is not NULL, then the value that the performance counter
> starts
> +  with immediately after is it rolls over is returned in StartValue. If
> +  EndValue is not NULL, then the value that the performance counter end
> with
> +  immediately before it rolls over is returned in EndValue. The 64-bit
> +  frequency of the performance counter in Hz is always returned. If
> StartValue
> +  is less than EndValue, then the performance counter counts up. If
> StartValue
> +  is greater than EndValue, then the performance counter counts down. For
> +  example, a 64-bit free running counter that counts up would have a
> StartValue
> +  of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running
> counter
> +  that counts down would have a StartValue of 0xFFFFFF and an EndValue of
> 0.
> +
> +  @param  StartValue  The value the performance counter starts with when
> it
> +                      rolls over.
> +  @param  EndValue    The value that the performance counter ends with
> before
> +                      it rolls over.
> +
> +  @return The frequency in Hz.
> +
> +**/
> +UINT64
> +EFIAPI
> +GetPerformanceCounterProperties (
> +  OUT      UINT64 *StartValue, OPTIONAL
> +  OUT      UINT64                    *EndValue     OPTIONAL
> +  )
> +{
> +  if (StartValue != NULL) {
> +    *StartValue = 0;
> +  }
> +
> +  if (EndValue != NULL) {
> +    *EndValue = 32 - 1;
> +  }
> +
> +  return PcdGet64 (PcdCpuCoreCrystalClockFrequency);
> +}
> +
> +/**
> +  Converts elapsed ticks of performance counter to time in nanoseconds.
> +
> +  This function converts the elapsed ticks of running performance counter to
> +  time value in unit of nanoseconds.
> +
> +  @param  Ticks     The number of elapsed ticks of running performance
> counter.
> +
> +  @return The elapsed time in nanoseconds.
> +
> +**/
> +UINT64
> +EFIAPI
> +GetTimeInNanoSecond (
> +  IN      UINT64  Ticks
> +  )
> +{
> +  UINT64  NanoSeconds;
> +  UINT32  Remainder;
> +
> +  //
> +  //          Ticks
> +  // Time = --------- x 1,000,000,000
> +  //        Frequency
> +  //
> +  NanoSeconds = MultU64x32 (DivU64x32Remainder (Ticks, PcdGet64
> (PcdCpuCoreCrystalClockFrequency), &Remainder), 1000000000u);
> +
> +  //
> +  // Frequency < 0x100000000, so Remainder < 0x100000000, then
> (Remainder * 1,000,000,000)
> +  // will not overflow 64-bit.
> +  //
> +  NanoSeconds += DivU64x32 (MultU64x32 ((UINT64)Remainder,
> 1000000000u), PcdGet64 (PcdCpuCoreCrystalClockFrequency));
> +
> +  return NanoSeconds;
> +}
> --
> 2.38.0


  parent reply	other threads:[~2023-02-09  5:37 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-28 19:17 [edk2-staging/RiscV64QemuVirt PATCH V7 00/20] Add support for RISC-V virt machine Sunil V L
2023-01-28 19:17 ` [edk2-staging/RiscV64QemuVirt PATCH V7 01/20] MdePkg/Register: Add register definition header files for RISC-V Sunil V L
2023-02-06 15:44   ` [edk2-devel] " Andrei Warkentin
2023-02-09  1:44   ` Michael D Kinney
2023-01-28 19:17 ` [edk2-staging/RiscV64QemuVirt PATCH V7 02/20] MdePkg/BaseLib: RISC-V: Add few more helper functions Sunil V L
2023-02-06 15:46   ` [edk2-devel] " Andrei Warkentin
2023-02-09  1:43   ` Michael D Kinney
2023-02-09  7:21     ` Sunil V L
2023-01-28 19:17 ` [edk2-staging/RiscV64QemuVirt PATCH V7 03/20] MdePkg: Add BaseRiscVSbiLib Library for RISC-V Sunil V L
2023-02-06 15:47   ` [edk2-devel] " Andrei Warkentin
2023-02-09  1:45   ` Michael D Kinney
2023-02-09  7:18     ` [edk2-devel] " Sunil V L
2023-02-09 15:47       ` Michael D Kinney
2023-01-28 19:17 ` [edk2-staging/RiscV64QemuVirt PATCH V7 04/20] UefiCpuPkg: Add RISCV_EFI_BOOT_PROTOCOL related definitions Sunil V L
2023-02-06 15:47   ` [edk2-devel] " Andrei Warkentin
2023-02-09  5:16   ` Ni, Ray
2023-01-28 19:17 ` [edk2-staging/RiscV64QemuVirt PATCH V7 05/20] UefiCpuPkg: Add CpuTimerDxe module Sunil V L
2023-02-08 18:02   ` [edk2-devel] " Michael D Kinney
2023-02-08 18:12     ` Sunil V L
2023-02-09  5:21   ` Ni, Ray
2023-02-09 10:17   ` Michael Brown
2023-02-09 10:28     ` Sunil V L
2023-02-09 10:30       ` Michael Brown
2023-02-09 10:37         ` Sunil V L
2023-01-28 19:17 ` [edk2-staging/RiscV64QemuVirt PATCH V7 06/20] UefiCpuPkg/CpuExceptionHandlerLib: Add RISC-V instance Sunil V L
2023-02-09  5:24   ` [edk2-devel] " Ni, Ray
2023-01-28 19:17 ` [edk2-staging/RiscV64QemuVirt PATCH V7 07/20] UefiCpuPkg/CpuDxe: " Sunil V L
2023-02-06 15:58   ` [edk2-devel] " Andrei Warkentin
2023-02-08  5:05     ` Sunil V L
2023-02-09  5:43       ` Ni, Ray
2023-02-09  5:49         ` Sunil V L
2023-01-28 19:17 ` [edk2-staging/RiscV64QemuVirt PATCH V7 08/20] UefiCpuPkg/CpuTimerLib: " Sunil V L
2023-01-30 11:07   ` [edk2-devel] " dhaval
2023-01-30 13:08     ` Sunil V L
2023-02-06 16:00   ` Andrei Warkentin
2023-02-09  5:37   ` Ni, Ray [this message]
2023-01-28 19:17 ` [edk2-staging/RiscV64QemuVirt PATCH V7 09/20] UefiCpuPkg/UefiCpuPkg.ci.yaml: Ignore RISC-V file Sunil V L
2023-02-06 16:00   ` [edk2-devel] " Andrei Warkentin
2023-02-09  1:50   ` Michael D Kinney
2023-02-09  5:38   ` Ni, Ray
2023-01-28 19:17 ` [edk2-staging/RiscV64QemuVirt PATCH V7 10/20] EmbeddedPkg: Enable PcdPrePiCpuIoSize for RISC-V Sunil V L
2023-02-06 16:00   ` [edk2-devel] " Andrei Warkentin
2023-02-09  1:51   ` Michael D Kinney
2023-01-28 19:17 ` [edk2-staging/RiscV64QemuVirt PATCH V7 11/20] ArmVirtPkg/PlatformHasAcpiDtDxe: Move to OvmfPkg Sunil V L
2023-02-06 16:01   ` [edk2-devel] " Andrei Warkentin
2023-01-28 19:17 ` [edk2-staging/RiscV64QemuVirt PATCH V7 12/20] ArmVirtPkg: Fix up the location of PlatformHasAcpiDtDxe Sunil V L
2023-02-06 16:01   ` [edk2-devel] " Andrei Warkentin
2023-01-28 19:18 ` [edk2-staging/RiscV64QemuVirt PATCH V7 13/20] OvmfPkg/RiscVVirt: Add PlatformBootManagerLib library Sunil V L
2023-02-06 16:01   ` [edk2-devel] " Andrei Warkentin
2023-01-28 19:18 ` [edk2-staging/RiscV64QemuVirt PATCH V7 14/20] OvmfPkg/RiscVVirt: Add PrePiHobListPointerLib library Sunil V L
2023-02-06 16:01   ` [edk2-devel] " Andrei Warkentin
2023-01-28 19:18 ` [edk2-staging/RiscV64QemuVirt PATCH V7 15/20] OvmfPkg/RiscVVirt: Add ResetSystemLib library Sunil V L
2023-02-06 16:01   ` [edk2-devel] " Andrei Warkentin
2023-01-28 19:18 ` [edk2-staging/RiscV64QemuVirt PATCH V7 16/20] OvmfPkg/RiscVVirt: Add VirtNorFlashPlatformLib library Sunil V L
2023-02-06 16:02   ` [edk2-devel] " Andrei Warkentin
2023-01-28 19:18 ` [edk2-staging/RiscV64QemuVirt PATCH V7 17/20] OvmfPkg/RiscVVirt: Add PciCpuIo2Dxe module Sunil V L
2023-01-30 10:12   ` [edk2-devel] " dhaval
2023-01-30 13:05     ` Sunil V L
2023-01-30 14:33       ` dhaval
2023-02-06 16:02   ` Andrei Warkentin
2023-01-28 19:18 ` [edk2-staging/RiscV64QemuVirt PATCH V7 18/20] OvmfPkg/RiscVVirt: Add SEC module Sunil V L
2023-01-30  5:17   ` [edk2-devel] " dhaval
2023-01-30  6:00     ` Sunil V L
2023-02-06 16:03   ` Andrei Warkentin
2023-01-28 19:18 ` [edk2-staging/RiscV64QemuVirt PATCH V7 19/20] OvmfPkg/RiscVVirt: Add build files for Qemu Virt platform Sunil V L
2023-02-06 16:03   ` [edk2-devel] " Andrei Warkentin
2023-01-28 19:18 ` [edk2-staging/RiscV64QemuVirt PATCH V7 20/20] Maintainers.txt: Add entry for OvmfPkg/RiscVVirt Sunil V L
2023-02-06 16:04   ` [edk2-devel] " Andrei Warkentin
2023-02-09  1:51   ` Michael D Kinney
2023-02-09  3:32     ` [edk2-devel] " Yao, Jiewen
2023-02-09  4:34       ` Sunil V L
2023-02-09  5:07         ` Yao, Jiewen
2023-02-09  5:15           ` Chang, Abner
2023-02-09 14:05           ` Yao, Jiewen
2023-02-09 15:19             ` Sunil V L
2023-02-09 15:21               ` Yao, Jiewen
     [not found] ` <173E8F29CD0D02D8.27165@groups.io>
2023-01-30 13:43   ` [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V7 11/20] ArmVirtPkg/PlatformHasAcpiDtDxe: Move to OvmfPkg Sunil V L
2023-02-03 12:29     ` Ard Biesheuvel
     [not found] ` <173E8F254E9BED62.27165@groups.io>
2023-02-02 14:35   ` [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V7 03/20] MdePkg: Add BaseRiscVSbiLib Library for RISC-V Sunil V L
     [not found] ` <173E8F293E682CB4.27165@groups.io>
2023-02-03  9:46   ` [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V7 10/20] EmbeddedPkg: Enable PcdPrePiCpuIoSize " Sunil V L

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