Gerd,
I agree that the logic might be duplicated in multi places.

But even CPU supports 1G paging, caller can decide whether to use 1G paging or 2M paging, or 4K paging.
Using a single API to encapsulate the entire logic may not seem flexible.
Maybe, a lib API to detect 1G paging capability can be added to CpuLib.

Thanks,
Ray
________________________________
From: Gerd Hoffmann <kraxel@redhat.com>
Sent: Monday, May 13, 2024 19:07
To: Tan, Dun <dun.tan@intel.com>
Cc: devel@edk2.groups.io <devel@edk2.groups.io>; Ni, Ray <ray.ni@intel.com>; Laszlo Ersek <lersek@redhat.com>; Kumar, Rahul R <rahul.r.kumar@intel.com>; Wu, Jiaxin <jiaxin.wu@intel.com>
Subject: Re: [PATCH 10/18] UefiCpuPkg:Relocate AP to new safe buffer in PeiMpLib

  Hi,

> +  if (sizeof (UINTN) == sizeof (UINT64)) {
> +    //
> +    // Check Page5Level Support or not.
> +    //
> +    Cr4.UintN         = AsmReadCr4 ();
> +    Page5LevelSupport = (Cr4.Bits.LA57 ? TRUE : FALSE);
> +
> +    //
> +    // Check Page1G Support or not.
> +    //
> +    Page1GSupport = FALSE;
> +    AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);
> +    if (RegEax >= CPUID_EXTENDED_CPU_SIG) {
> +      AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &RegEdx.Uint32);
> +      if (RegEdx.Bits.Page1GB != 0) {
> +        Page1GSupport = TRUE;
> +      }
> +    }
> +
> +    //
> +    // Decide Paging Mode according Page5LevelSupport & Page1GSupport.
> +    //
> +    if (Page5LevelSupport) {
> +      PagingMode = Page1GSupport ? Paging5Level1GB : Paging5Level;
> +    } else {
> +      PagingMode = Page1GSupport ? Paging4Level1GB : Paging4Level;
> +    }
> +  } else {
> +    PagingMode = PagingPae;
> +  }

I'm wondering whenever CpuPageTableLib should get a function for this?
I suspect there a multiple places in edk2 which will need this
functionality ...

take care,
  Gerd



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