Re: [edk2-devel] [PATCH v1 1/3] UefiCpuPkg/SecCore: Migrate page table to permanent memory

["Ni, Ray" <ray.ni@intel.com>]

Gerd,
My understanding is that when code dereferences memory address, the code itself is responsible for
supplying the sign-extended linear address.
The page table creation logic still maps the entire linear memory space supported by the CPU.

Why do you think covering the half of the space is better?

Thanks,
Ray

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Gerd
> Hoffmann
> Sent: Tuesday, May 9, 2023 10:39 PM
> To: devel@edk2.groups.io; Wu, Jiaxin <jiaxin.wu@intel.com>
> Cc: Dong, Eric <eric.dong@intel.com>; Ni, Ray <ray.ni@intel.com>; Zeng, Star
> <star.zeng@intel.com>; Kumar, Rahul R <rahul.r.kumar@intel.com>
> Subject: Re: [edk2-devel] [PATCH v1 1/3] UefiCpuPkg/SecCore: Migrate page
> table to permanent memory
> 
>   Hi,
> 
> > +  if (PagingMode == Paging4Level1GB || PagingMode == Paging4Level) {
> > +    //
> > +    // The max lineaddress bits is 48 for 4 level page table.
> > +    //
> > +    VirPhyAddressSize.Bits.PhysicalAddressBits = MIN
> (VirPhyAddressSize.Bits.PhysicalAddressBits, 48);
> > +  }
> 
> virtual addresses in long mode are sign-extended.  Which means you have
> only 47 bits (or 56 bits with 5-level paging) for identity mappings.
> 
> take care,
>   Gerd
> 
> 
> 
> 
>