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charset="us-ascii" Content-Transfer-Encoding: quoted-printable The changes look good to me. Please change the macro per comments to patch #1, then update this patch ac= cordingly. > -----Original Message----- > From: Liu, Zhiguang > Sent: Friday, April 28, 2023 2:42 PM > To: devel@edk2.groups.io > Cc: Liu, Zhiguang ; Dong, Eric > ; Ni, Ray ; Kumar, Rahul R > ; Gerd Hoffmann ; De, > Debkumar ; West, Catharine > > Subject: [PATCH v3 3/5] UefiCpuPkg/ResetVector: Combine > PageTables1G.asm and PageTables2M.asm >=20 > Combine PageTables1G.asm and PageTables2M.asm to reuse code. >=20 > Cc: Eric Dong > Cc: Ray Ni > Cc: Rahul Kumar > Cc: Gerd Hoffmann > Cc: Debkumar De > Cc: Catharine West > Signed-off-by: Zhiguang Liu > --- > UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb | 8 +-- > .../X64/{PageTables1G.asm =3D> PageTables.asm} | 38 ++++++++--- > .../ResetVector/Vtf0/X64/PageTables2M.asm | 63 ------------------- > 3 files changed, 33 insertions(+), 76 deletions(-) > rename UefiCpuPkg/ResetVector/Vtf0/X64/{PageTables1G.asm =3D> > PageTables.asm} (58%) > delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm >=20 > diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb > b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb > index bdea1fb875..136361e62c 100644 > --- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb > +++ b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb > @@ -2,7 +2,7 @@ > ; @file > ; This file includes all other code files to assemble the reset vector c= ode > ; > -; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.
> +; Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.
> ; SPDX-License-Identifier: BSD-2-Clause-Patent > ; > ;-----------------------------------------------------------------------= ------- > @@ -38,11 +38,7 @@ > %include "PageTables.inc" >=20 > %ifdef ARCH_X64 > - %ifdef PAGE_TABLE_1G > - %include "X64/PageTables1G.asm" > - %else > - %include "X64/PageTables2M.asm" > - %endif > + %include "X64/PageTables.asm" > %endif >=20 > %ifdef DEBUG_PORT80 > diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm > b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm > similarity index 58% > rename from UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm > rename to UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm > index 2b0de6020c..469fed0006 100644 > --- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables1G.asm > +++ b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm > @@ -1,10 +1,11 @@ > ;-----------------------------------------------------------------------= ------- > ; @file > -; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x8000000000 > (512GB) > +; Emits Page Tables for 1:1 mapping. > +; If using 1G page table, map addresses 0 - 0x8000000000 (512GB), > +; else, map addresses 0 - 0x100000000 (4GB) > ; > ; Copyright (c) 2021 - 2023, Intel Corporation. All rights reserved.
> ; SPDX-License-Identifier: BSD-2-Clause-Patent > -; Linear-Address Translation to a 1-GByte Page > ; > ;-----------------------------------------------------------------------= ------- >=20 > @@ -36,6 +37,7 @@ BITS 64 > PAGE_NLE_ATTR) >=20 > %define PDP_1G(x) ((x << 30) + PAGE_BLP_ATTR) > +%define PTE_2MB(x) ((x << 21) + PAGE_BLP_ATTR) >=20 > ALIGN 16 >=20 > @@ -46,14 +48,36 @@ Pml4: > DQ PG_NLE(Pdp) > TIMES 0x1000 - ($ - Pml4) DB 0 >=20 > +%ifdef PAGE_TABLE_1G > Pdp: > ; > ; Page-directory pointer table (512 * 1GB entries =3D> 512GB) > ; > -%assign i 0 > -%rep 512 > - DQ PDP_1G(i) > - %assign i i+1 > -%endrep > + %assign i 0 > + %rep 512 > + DQ PDP_1G(i) > + %assign i i+1 > + %endrep > +%else > +Pdp: > + ; > + ; Page-directory pointer table (4 * 1GB entries =3D> 4GB) > + ; > + DQ PG_NLE(Pd) > + DQ PG_NLE(Pd + 0x1000) > + DQ PG_NLE(Pd + 0x2000) > + DQ PG_NLE(Pd + 0x3000) > + TIMES 0x1000 - ($ - Pdp) DB 0 >=20 > +Pd: > + ; > + ; Page-Directory (2048 * 2MB entries =3D> 4GB) > + ; Four pages below, each is pointed by one entry in Pdp. > + ; > + %assign i 0 > + %rep 0x800 > + DQ PTE_2MB(i) > + %assign i i+1 > + %endrep > +%endif > EndOfPageTables: > diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm > b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm > deleted file mode 100644 > index cdf0fb41b7..0000000000 > --- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables2M.asm > +++ /dev/null > @@ -1,63 +0,0 @@ > -;-----------------------------------------------------------------------= ------- > -; @file > -; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x100000000 (4G= B) > -; > -; Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.
> -; SPDX-License-Identifier: BSD-2-Clause-Patent > -; > -;-----------------------------------------------------------------------= ------- > - > -BITS 64 > - > -%define ALIGN_TOP_TO_4K_FOR_PAGING > - > -; > -; Page table big leaf page attribute > -; Big leaf page contains PDPTE 1GB page and PDE 2MB page > -; > -%define PAGE_BLP_ATTR (PAGE_SIZE + \ > - PAGE_ACCESSED + \ > - PAGE_DIRTY + \ > - PAGE_READ_WRITE + \ > - PAGE_PRESENT) > - > -; > -; Page table no-leaf entry attribute > -; > -%define PAGE_NLE_ATTR (PAGE_ACCESSED + \ > - PAGE_READ_WRITE + \ > - PAGE_PRESENT) > - > -%define PG_NLE(address) (ADDR_OF(address) + \ > - PAGE_NLE_ATTR) > -%define PTE_2MB(x) ((x << 21) + PAGE_BLP_ATTR) > - > -Pml4: > - ; > - ; PML4 (1 * 512GB entry) > - ; > - DQ PG_NLE(Pdp) > - TIMES 0x1000 - ($ - Pml4) DB 0 > - > -Pdp: > - ; > - ; Page-directory pointer table (4 * 1GB entries =3D> 4GB) > - ; > - DQ PG_NLE(Pd) > - DQ PG_NLE(Pd + 0x1000) > - DQ PG_NLE(Pd + 0x2000) > - DQ PG_NLE(Pd + 0x3000) > - TIMES 0x1000 - ($ - Pdp) DB 0 > - > -Pd: > - ; > - ; Page-Directory (2048 * 2MB entries =3D> 4GB) > - ; Four pages below, each is pointed by one entry in Pdp. > - ; > -%assign i 0 > -%rep 0x800 > - DQ PTE_2MB(i) > - %assign i i+1 > -%endrep > - > -EndOfPageTables: > -- > 2.31.1.windows.1