* Re: [PATCH] Fix variables may be used uninitialize
[not found] <20210716063733.723-1-wesleyx.hsu@intel.com>
@ 2021-07-16 8:33 ` Chaganty, Rangasai V
2021-07-19 3:15 ` Ni, Ray
1 sibling, 0 replies; 3+ messages in thread
From: Chaganty, Rangasai V @ 2021-07-16 8:33 UTC (permalink / raw)
To: Hsu, WesleyX, devel@edk2.groups.io; +Cc: Ni, Ray
Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>
-----Original Message-----
From: Hsu, WesleyX <wesleyx.hsu@intel.com>
Sent: Thursday, July 15, 2021 11:38 PM
To: devel@edk2.groups.io
Cc: Hsu, WesleyX <wesleyx.hsu@intel.com>; Ni, Ray <ray.ni@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
Subject: [PATCH] Fix variables may be used uninitialize
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3491
Initialize variables may be used uninitialized after adding "-ffat-lto-objects" option in GCC5 tool chain.
Change-Id: Iec8c9a884bac5cf1ce7258867c074c4668e5fa44
Signed-off-by: WesleyX Hsu <wesleyx.hsu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
---
Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/TranslationTable.c | 5 +++++
Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c | 7 ++++++-
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/TranslationTable.c b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/TranslationTable.c
index 341e2beb..2a5fa637 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/TranslationTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/Translat
+++ ionTable.c
@@ -107,6 +107,11 @@ CreateSecondLevelPagingEntryTable (
UINT64 EndAddress;
BOOLEAN Is5LevelPaging;
+ Lvl4PagesStart = 0;
+ Lvl4PagesEnd = 0;
+ Lvl4PtEntry = NULL;
+ Lvl5PtEntry = NULL;
+
if (MemoryLimit == 0) {
return EFI_SUCCESS;
}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
index d152039f..01375139 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationT
+++ able.c
@@ -133,7 +133,7 @@ CreateContextEntry (
mVtdUnitInformation[VtdIndex].Is5LevelPaging = TRUE;
if ((mAcpiDmarTable->HostAddressWidth <= 48) &&
((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) != 0)) {
- mVtdUnitInformation[VtdIndex].Is5LevelPaging = FALSE;
+ mVtdUnitInformation[VtdIndex].Is5LevelPaging = FALSE;
}
} else if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
DEBUG((DEBUG_ERROR, "!!!! Page-table type is not supported on VTD %d !!!!\n", VtdIndex)); @@ -195,6 +195,11 @@ CreateSecondLevelPagingEntryTable (
UINT64 BaseAddress;
UINT64 EndAddress;
+ Lvl4PagesStart = 0;
+ Lvl4PagesEnd = 0;
+ Lvl4PtEntry = NULL;
+ Lvl5PtEntry = NULL;
+
if (MemoryLimit == 0) {
return EFI_SUCCESS;
}
--
2.26.2.windows.1
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] Fix variables may be used uninitialize
[not found] <20210716063733.723-1-wesleyx.hsu@intel.com>
2021-07-16 8:33 ` Chaganty, Rangasai V
@ 2021-07-19 3:15 ` Ni, Ray
1 sibling, 0 replies; 3+ messages in thread
From: Ni, Ray @ 2021-07-19 3:15 UTC (permalink / raw)
To: Hsu, WesleyX, devel@edk2.groups.io; +Cc: Chaganty, Rangasai V
Reviewed-by: Ray Ni <ray.ni@intel.com>
-----Original Message-----
From: Hsu, WesleyX <wesleyx.hsu@intel.com>
Sent: Friday, July 16, 2021 2:38 PM
To: devel@edk2.groups.io
Cc: Hsu, WesleyX <wesleyx.hsu@intel.com>; Ni, Ray <ray.ni@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
Subject: [PATCH] Fix variables may be used uninitialize
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3491
Initialize variables may be used uninitialized after adding "-ffat-lto-objects" option in GCC5 tool chain.
Change-Id: Iec8c9a884bac5cf1ce7258867c074c4668e5fa44
Signed-off-by: WesleyX Hsu <wesleyx.hsu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
---
Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/TranslationTable.c | 5 +++++
Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c | 7 ++++++-
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/TranslationTable.c b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/TranslationTable.c
index 341e2beb..2a5fa637 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/TranslationTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/Translat
+++ ionTable.c
@@ -107,6 +107,11 @@ CreateSecondLevelPagingEntryTable (
UINT64 EndAddress;
BOOLEAN Is5LevelPaging;
+ Lvl4PagesStart = 0;
+ Lvl4PagesEnd = 0;
+ Lvl4PtEntry = NULL;
+ Lvl5PtEntry = NULL;
+
if (MemoryLimit == 0) {
return EFI_SUCCESS;
}
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
index d152039f..01375139 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationT
+++ able.c
@@ -133,7 +133,7 @@ CreateContextEntry (
mVtdUnitInformation[VtdIndex].Is5LevelPaging = TRUE;
if ((mAcpiDmarTable->HostAddressWidth <= 48) &&
((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) != 0)) {
- mVtdUnitInformation[VtdIndex].Is5LevelPaging = FALSE;
+ mVtdUnitInformation[VtdIndex].Is5LevelPaging = FALSE;
}
} else if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
DEBUG((DEBUG_ERROR, "!!!! Page-table type is not supported on VTD %d !!!!\n", VtdIndex)); @@ -195,6 +195,11 @@ CreateSecondLevelPagingEntryTable (
UINT64 BaseAddress;
UINT64 EndAddress;
+ Lvl4PagesStart = 0;
+ Lvl4PagesEnd = 0;
+ Lvl4PtEntry = NULL;
+ Lvl5PtEntry = NULL;
+
if (MemoryLimit == 0) {
return EFI_SUCCESS;
}
--
2.26.2.windows.1
^ permalink raw reply [flat|nested] 3+ messages in thread