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Thread-Topic: [edk2-platforms: PATCH] Platform/Intel: Correct CPU APIC IDs. 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Examples (ple= ase check other places too): - Line 213, 215, 275 etc. - Should be changed DEBUG_INFO.=20 Also, please remove the comment in line 251, Regards, Sai -----Original Message----- From: Chen, TinaX Y =20 Sent: Monday, July 12, 2021 10:58 PM To: devel@edk2.groups.io Cc: Lin, JackX ; Chiu, Chasel ;= Huang, Jenny ; Yao, Jiewen ; = Ni, Ray ; Chaganty, Rangasai V ; Chen, TinaX Y Subject: [edk2-platforms: PATCH] Platform/Intel: Correct CPU APIC IDs. From: JackX REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3365 BIOS cannot find correct AcpiProcId in mApicIdMap because of there is no su= itable map, that causes ACPI_BIOS_ERROR. Remove mApicIdMap for determing AcpiProcId, uses normal countings instead. Signed-off-by: JackX Lin Cc: Chasel Chiu Cc: Jenny Huang Cc: Jiewen Yao Cc: Ray Ni Cc: Rangasai V Chaganty Cc: Tinax Chen Cc: JackX Lin --- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 230 +++++++= +++++++++++++++++++++++++++++++++++++++++----------------------------------= ---------------------------------------------------------------------------= ------------------------------------------------------------------------- 1 file changed, 48 insertions(+), 182 deletions(-) diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b= /Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c index 2b51c34ef2..5a717295e0 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c @@ -1,14 +1,13 @@ /** @file ACPI Platform Driver -Copyright (c) 2017 - 2019, Intel Corpora= tion. All rights reserved.
+Copyright (c) 2017 - 2021, Intel Corporation= . All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **= / #include "AcpiPlatform.h" -#define MAX_CPU_NUM (FixedPcdGet32(PcdMaxCpuT= hreadCount) * FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuSo= cketCount)) #pragma pack(1) @@ -16,7 +15,6 @@ typedef struct { UINT32 AcpiProcessorId; UINT32 ApicId; UINT32 Flags;- UINT32 = SwProcApicId; UINT32 SocketNum; } EFI_CPU_ID_ORDER_MAP; @@ -58,138 +5= 6,17 @@ BOOLEAN mX2ApicEnabled; EFI_MP_SERVICES_PROTOCOL *mMpService; BOOLEAN mCpu= OrderSorted;-EFI_CPU_ID_ORDER_MAP mCpuApicIdOrderTable[MAX_CPU_NUM];= -UINTN mNumberOfCPUs =3D 0;+EFI_CPU_ID_ORDER_MAP = *mCpuApicIdOrderTable =3D NULL;+UINTN mNumberOfCpu= s =3D 0; UINTN mNumberOfEnabledCPUs =3D 0; -// follow= ing are possible APICID Map for SKX-static const UINT32 ApicIdMapA[] =3D { = //for SKUs have number of core > 16- //it is 14 + 14 + 14 + 14 format- 0= x00000000, 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00= 000006, 0x00000007,- 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x000= 0000C, 0x0000000D, 0x00000010, 0x00000011,- 0x00000012, 0x00000013, 0x0000= 0014, 0x00000015, 0x00000016, 0x00000017, 0x00000018, 0x00000019,- 0x00000= 01A, 0x0000001B, 0x0000001C, 0x0000001D, 0x00000020, 0x00000021, 0x00000022= , 0x00000023,- 0x00000024, 0x00000025, 0x00000026, 0x00000027, 0x00000028,= 0x00000029, 0x0000002A, 0x0000002B,- 0x0000002C, 0x0000002D, 0x00000030, = 0x00000031, 0x00000032, 0x00000033, 0x00000034, 0x00000035,- 0x00000036, 0= x00000037, 0x00000038, 0x00000039, 0x0000003A, 0x0000003B, 0x0000003C, 0x00= 00003D-};--static const UINT32 ApicIdMapB[] =3D { //for SKUs have number of= cores <=3D 16 use 32 ID space- //it is 16+16 format- 0x00000000, 0x00000= 001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007= ,- 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D,= 0x0000000E, 0x0000000F,- 0x00000010, 0x00000011, 0x00000012, 0x00000013, = 0x00000014, 0x00000015, 0x00000016, 0x00000017,- 0x00000018, 0x00000019, 0= x0000001A, 0x0000001B, 0x0000001C, 0x0000001D, 0x0000001E, 0x0000001F,- 0x= FFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFF= FFFFF, 0xFFFFFFFF,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFF= FFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFF= FFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF-};---static= const UINT32 ApicIdMapC[] =3D { //for SKUs have number of cores <=3D 16 us= e 64 ID space- //it is 16+0+16+0 format- 0x00000000, 0x00000001, 0x000000= 02, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007,- 0x0000000= 8, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, = 0x0000000F,- 0x00000020, 0x00000021, 0x00000022, 0x00000023, 0x00000024, 0= x00000025, 0x00000026, 0x00000027,- 0x00000028, 0x00000029, 0x0000002A, 0x= 0000002B, 0x0000002C, 0x0000002D, 0x0000002E, 0x0000002F,- 0xFFFFFFFF, 0xF= FFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFF= FFFF,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFF= FFF, 0xFFFFFFFF, 0xFFFFFFFF,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFF= FF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF-};--static const UINT32 = ApicIdMapD[] =3D { //for SKUs have number of cores <=3D 8 use 16 ID space- = //it is 16 format- 0x00000000, 0x00000001, 0x00000002, 0x00000003, 0x0000= 0004, 0x00000005, 0x00000006, 0x00000007,- 0x00000008, 0x00000009, 0x00000= 00A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, 0x0000000F,- 0xFFFFFF= FF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,= 0xFFFFFFFF,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, = 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0= xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,- 0xFFFFFFFF, 0x= FFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFF= FFFFF,- 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFF= FFFF, 0xFFFFFFFF, 0xFFFFFFFF-};--const UINT32 *mApicIdMap =3D NULL;- /**- = This function detect the APICID map and update ApicID Map pointer-- @param= None-- @retval VOID--**/-VOID DetectApicIdMap(VOID)-{- UINTN = CoreCount;-- CoreCount =3D 0;-- if(mApicIdMap !=3D NULL) {- retu= rn; //aleady initialized- }-- mApicIdMap =3D ApicIdMapA; // default to= > 16C SKUs-- CoreCount =3D mNumberOfEnabledCPUs / 2;- DEBUG ((DEBUG_INFO= , "CoreCount - %d\n", CoreCount));-- //DEBUG((EFI_D_ERROR, ":: Default to = use Map A @ %08X FusedCoreCount: %02d, sktlevel: %d\n",mApicIdMap, FusedCor= eCount, mNumOfBitShift));- // Dont assert for single core, single thread s= ystem.- //ASSERT (CoreCount !=3D 0);-- if(CoreCount <=3D 16) {-- if(mN= umOfBitShift =3D=3D 4) {- mApicIdMap =3D ApicIdMapD;- //DEBUG((EF= I_D_ERROR, ":: Use Map B @ %08X\n",mApicIdMap));- }-- if(mNumOfBitShi= ft =3D=3D 5) {- mApicIdMap =3D ApicIdMapB;- //DEBUG((EFI_D_ERROR,= ":: Use Map B @ %08X\n",mApicIdMap));- }-- if(mNumOfBitShift =3D=3D = 6) {- mApicIdMap =3D ApicIdMapC;- //DEBUG((EFI_D_ERROR, ":: Use M= ap C @ %08X\n",mApicIdMap));- }-- }-- return;-}--/**- This function r= eturn the CoreThreadId of ApicId from ACPI ApicId Map array+ This function= searches mCpuApicIdOrderTable to find the BSP ApicId, and returns a number= where the BSP is. @param ApicId - @retval Index of ACPI ApicId Map arr= ay-+ @return Where the BSP is. **/-UINT32-GetIndexFromApicId (- UINT3= 2 ApicId- )-{- UINT32 CoreThreadId;- UINT32 i;-- ASSERT (mApicIdMap != =3D NULL);-- CoreThreadId =3D ApicId & ((1 << mNumOfBitShift) - 1);-- for= (i =3D 0; i < (FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuT= hreadCount)); i++) {- if(mApicIdMap[i] =3D=3D CoreThreadId) {- brea= k;- }- }-- ASSERT (i <=3D (FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPc= dGet32(PcdMaxCpuThreadCount)));-- return i;-}- UINT32 ApicId2SwProcApicId = ( UINT32 ApicId@@ -197,7 +74,7 @@ ApicId2SwProcApicId ( { UINT32 Index; - for (Index =3D 0; Index < MAX_CPU_NUM; Index++) {+ f= or (Index =3D 0; Index < mNumberOfCpus; Index++) { if ((mCpuApicIdOrder= Table[Index].Flags =3D=3D 1) && (mCpuApicIdOrderTable[Index].ApicId =3D=3D = ApicId)) { return Index; }@@ -214,13 +91,12 @@ DebugDisplayReOrde= rTable( { UINT32 Index; - DEBUG ((EFI_D_ERROR, "Index AcpiProcId ApicId Flag= s SwApicId Skt\n"));- for (Index=3D0; IndexGetProcessorInfo ( = mMpService, = CurrProcessor,@@ -302,20 +177,12 @@ SortCpuLocalApicInTable ( ); if ((ProcessorInfoBu= ffer.StatusFlag & PROCESSOR_ENABLED_BIT) !=3D 0) {- if(ProcessorInfo= Buffer.ProcessorId & 1) { //is 2nd thread- CpuIdMapPtr =3D (EFI_CP= U_ID_ORDER_MAP *)&mCpuApicIdOrderTable[(Index - 1) + MAX_CPU_NUM / 2];- = } else { //is primary thread CpuIdMapPtr =3D (EFI_CPU_ID_ORDE= R_MAP *)&mCpuApicIdOrderTable[Index];- Index++;- } = CpuIdMapPtr->ApicId =3D (UINT32)ProcessorInfoBuffer.ProcessorId; C= puIdMapPtr->Flags =3D ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLE= D_BIT) !=3D 0); CpuIdMapPtr->SocketNum =3D (UINT32)ProcessorInfoBuf= fer.Location.Package;- CpuIdMapPtr->AcpiProcessorId =3D (CpuIdMapPtr= ->SocketNum * FixedPcdGet32(PcdMaxCpuCoreCount) * FixedPcdGet32(PcdMaxCpuTh= readCount)) + GetIndexFromApicId(CpuIdMapPtr->ApicId); //CpuIdMapPtr->ApicI= d;- CpuIdMapPtr->SwProcApicId =3D ((UINT32)(ProcessorInfoBuffer.Loca= tion.Package << mNumOfBitShift) + (((UINT32)ProcessorInfoBuffer.ProcessorId= ) & CoreThreadMask));- if(mX2ApicEnabled) { //if X2Apic, re-order th= e socket # so it starts from base 0 and contiguous+ CpuIdMapPtr->Acp= iProcessorId =3D Index; //may not necessory!!!!!- } = //update processorbitMask if (CpuIdMapPtr->Flags =3D=3D 1) {@@ -= 323,7 +190,6 @@ SortCpuLocalApicInTable ( if(mForceX2ApicId) { CpuIdMapPtr->SocketNum &=3D 0x7= ; CpuIdMapPtr->AcpiProcessorId &=3D 0xFF; //keep lower 8bit due= to use Proc obj in dsdt- CpuIdMapPtr->SwProcApicId &=3D 0xFF; = } } } else { //not enabled@@ -331,13 +197,12 @@ Sor= tCpuLocalApicInTable ( CpuIdMapPtr->ApicId =3D (UINT32)-1; CpuIdMapPtr->Flags = =3D 0; CpuIdMapPtr->AcpiProcessorId =3D (UINT32)-1;- CpuIdMa= pPtr->SwProcApicId =3D (UINT32)-1; CpuIdMapPtr->SocketNum =3D (UINT= 32)-1; } //end if PROC ENABLE } //end for CurrentProcessor /= /keep for debug purpose- DEBUG(( EFI_D_ERROR, "::ACPI:: APIC ID Order T= able Init. CoreThreadMask =3D %x, mNumOfBitShift =3D %x\n", CoreThreadMa= sk, mNumOfBitShift));+ DEBUG (( DEBUG_ERROR, "::ACPI:: APIC ID Order Ta= ble Init. CoreThreadMask =3D %x, mNumOfBitShift =3D %x\n", CoreThreadMas= k, mNumOfBitShift)); DebugDisplayReOrderTable(); //make sure 1st e= ntry is BSP@@ -346,14 +211,14 @@ SortCpuLocalApicInTable ( } else { BspApicId =3D (*(volatile UINT32 *)(UINTN)0xFEE00020) >= > 24; }- DEBUG ((EFI_D_INFO, "BspApicId - 0x%x\n", BspApicId));+ = DEBUG ((DEBUG_INFO, "BspApicId - 0x%x\n", BspApicId)); if(mCpuApicIdOr= derTable[0].ApicId !=3D BspApicId) { //check to see if 1st entry is B= SP, if not swap it Index =3D ApicId2SwProcApicId(BspApicId); - i= f(MAX_CPU_NUM <=3D Index) {- DEBUG ((EFI_D_ERROR, "Asserting the Sor= tCpuLocalApicInTable Index Bufferflow\n"));+ if(mNumberOfCpus <=3D Ind= ex) {+ DEBUG ((DEBUG_ERROR, "Asserting the SortCpuLocalApicInTable I= ndex Bufferflow\n")); return EFI_INVALID_PARAMETER; } @@ -362= ,9 +227,6 @@ SortCpuLocalApicInTable ( mCpuApicIdOrderTable[0].ApicId =3D TempVal; mCpuApicIdOrderTab= le[Index].Flags =3D mCpuApicIdOrderTable[0].Flags; mCpuApicIdOrderTab= le[0].Flags =3D 1;- TempVal =3D mCpuApicIdOrderTable[Index].SwProcApic= Id;- mCpuApicIdOrderTable[Index].SwProcApicId =3D mCpuApicIdOrderTable= [0].SwProcApicId;- mCpuApicIdOrderTable[0].SwProcApicId =3D TempVal; = //swap AcpiProcId TempVal =3D mCpuApicIdOrderTable[Index].AcpiPr= ocessorId; mCpuApicIdOrderTable[Index].AcpiProcessorId =3D mCpuApicId= OrderTable[0].AcpiProcessorId;@@ -373,27 +235,24 @@ SortCpuLocalApicInTable= ( } //Make sure no holes between enabled threads- for(CurrProces= sor =3D 0; CurrProcessor < MAX_CPU_NUM; CurrProcessor++) {+ for (CurrPro= cessor =3D 0; CurrProcessor < mNumberOfCpus; CurrProcessor++) { if(m= CpuApicIdOrderTable[CurrProcessor].Flags =3D=3D 0) { //make sure di= sabled entry has ProcId set to FFs mCpuApicIdOrderTable[CurrProcess= or].ApicId =3D (UINT32)-1; mCpuApicIdOrderTable[CurrProcessor].Acpi= ProcessorId =3D (UINT32)-1;- mCpuApicIdOrderTable[CurrProcessor].SwP= rocApicId =3D (UINT32)-1; - for(Index =3D CurrProcessor+1; Index < M= AX_CPU_NUM; Index++) {+ for (Index =3D CurrProcessor+1; Index < mNum= berOfCpus; Index++) { if(mCpuApicIdOrderTable[Index].Flags =3D=3D= 1) { //move enabled entry up mCpuApicIdOrderTable[= CurrProcessor].Flags =3D 1; mCpuApicIdOrderTable[CurrProcessor]= .ApicId =3D mCpuApicIdOrderTable[Index].ApicId; mCpuApicIdOrder= Table[CurrProcessor].AcpiProcessorId =3D mCpuApicIdOrderTable[Index].AcpiPr= ocessorId;- mCpuApicIdOrderTable[CurrProcessor].SwProcApicId =3D= mCpuApicIdOrderTable[Index].SwProcApicId; mCpuApicIdOrderTable= [CurrProcessor].SocketNum =3D mCpuApicIdOrderTable[Index].SocketNum; = //disable moved entry mCpuApicIdOrderTable[Index].Flags = =3D 0; mCpuApicIdOrderTable[Index].ApicId =3D (UINT32)-1; = mCpuApicIdOrderTable[Index].AcpiProcessorId =3D (UINT32)-1;- = mCpuApicIdOrderTable[Index].SwProcApicId =3D (UINT32)-1; br= eak; } }@@ -401,7 +260,7 @@ SortCpuLocalApicInTable ( } //keep for debug purpose- DEBUG ((EFI_D_ERROR, "APIC ID Orde= r Table ReOrdered\n"));+ DEBUG ((DEBUG_ERROR, "APIC ID Order Table ReOrd= ered\n")); DebugDisplayReOrderTable(); mCpuOrderSorted =3D TRUE;@@= -871,18 +730,22 @@ InstallMadtFromScratch ( NewMadtTable =3D NULL; MaxMadtStructCount =3D 0; - DetectApicIdMap();= + mCpuApicIdOrderTable =3D AllocateZeroPool (mNumberOfCpus * sizeof (EFI_C= PU_ID_ORDER_MAP));+ if (mCpuApicIdOrderTable =3D=3D NULL) {+ DEBUG ((DE= BUG_ERROR, "Could not allocate mCpuApicIdOrderTable structure pointer array= \n"));+ return EFI_OUT_OF_RESOURCES;+ } // Call for Local APIC ID Re= order Status =3D SortCpuLocalApicInTable (); if (EFI_ERROR (Status)) {-= DEBUG ((EFI_D_ERROR, "SortCpuLocalApicInTable failed: %r\n", Status));+= DEBUG ((DEBUG_ERROR, "SortCpuLocalApicInTable failed: %r\n", Status)); = goto Done; } MaxMadtStructCount =3D (UINT32) (- MAX_CPU_NUM + = // processor local APIC structures- MAX_CPU_NUM + // processor loca= l x2APIC structures+ mNumberOfCpus + // processor local APIC structures= + mNumberOfCpus + // processor local x2APIC structures 1 + PcdGet8(= PcdPcIoApicCount) + // I/O APIC structures 2 + // interr= upt source override structures 1 + // local APIC NMI struc= tures@@ -906,11 +769,11 @@ InstallMadtFromScratch ( // Status =3D InitializeMadtHeader (&MadtTableHeader); if (EFI_ERROR= (Status)) {- DEBUG ((EFI_D_ERROR, "InitializeMadtHeader failed: %r\n", = Status));+ DEBUG ((DEBUG_ERROR, "InitializeMadtHeader failed: %r\n", Sta= tus)); goto Done; } - DEBUG ((EFI_D_INFO, "Number of CPUs detected = =3D %d \n", mNumberOfCPUs));+ DEBUG ((DEBUG_INFO, "Number of CPUs detected= =3D %d \n", mNumberOfCpus)); // // Build Processor Local APIC Structu= res and Processor Local X2APIC Structures@@ -923,7 +786,7 @@ InstallMadtFro= mScratch ( ProcLocalX2ApicStruct.Reserved[0] =3D 0; ProcLocalX2ApicStruct.Reserve= d[1] =3D 0; - for (Index =3D 0; Index < MAX_CPU_NUM; Index++) {+ for (Ind= ex =3D 0; Index < mNumberOfCpus; Index++) { // // If x2APIC mode is= not enabled, and if it is possible to express the // APIC ID as a UINT= 8, use a processor local APIC structure. Otherwise,@@ -953,7 +816,7 @@ Inst= allMadtFromScratch ( ); } if (EFI_ERROR (Status)) {- DEBUG ((EFI_D_ERROR, = "CopyMadtStructure (local APIC/x2APIC) failed: %r\n", Status));+ DEBUG= ((DEBUG_ERROR, "CopyMadtStructure (local APIC/x2APIC) failed: %r\n", Statu= s)); goto Done; } }@@ -978,7 +841,7 @@ InstallMadtFromScratch ( &MadtStructs[MadtStructsIndex++] ); if (EFI_ERROR (Status)= ) {- DEBUG ((EFI_D_ERROR, "CopyMadtStructure (I/O APIC) failed: %r\n",= Status));+ DEBUG ((DEBUG_ERROR, "CopyMadtStructure (I/O APIC) failed:= %r\n", Status)); goto Done; } }@@ -1000,7 +863,7 @@ InstallMad= tFromScratch ( &MadtStructs[MadtStructsIndex++] ); if (EFI_ERROR (S= tatus)) {- DEBUG ((EFI_D_ERROR, "CopyMadtStructure (I/O APIC) failed= : %r\n", Status));+ DEBUG ((DEBUG_ERROR, "CopyMadtStructure (I/O APIC)= failed: %r\n", Status)); goto Done; } }@@ -1026,7 +889,7 @= @ InstallMadtFromScratch ( &MadtStructs[MadtStructsIndex++] ); if (EFI_ERROR (Status)) {- = DEBUG ((EFI_D_ERROR, "CopyMadtStructure (IRQ2 source override) failed: %r= \n", Status));+ DEBUG ((DEBUG_ERROR, "CopyMadtStructure (IRQ2 source ove= rride) failed: %r\n", Status)); goto Done; } @@ -1045,7 +908,7 @@ Ins= tallMadtFromScratch ( &MadtStructs[MadtStructsIndex++] ); if (EFI_ERROR (Status)) {- = DEBUG ((EFI_D_ERROR, "CopyMadtStructure (IRQ9 source override) failed: %r= \n", Status));+ DEBUG ((DEBUG_ERROR, "CopyMadtStructure (IRQ9 source ove= rride) failed: %r\n", Status)); goto Done; } @@ -1065,7 +928,7 @@ Ins= tallMadtFromScratch ( &MadtStructs[MadtStructsIndex++] ); if (EFI_ERROR (Status)) {- = DEBUG ((EFI_D_ERROR, "CopyMadtStructure (APIC NMI) failed: %r\n", Status)= );+ DEBUG ((DEBUG_ERROR, "CopyMadtStructure (APIC NMI) failed: %r\n", St= atus)); goto Done; } @@ -1105,7 +968,7 @@ InstallMadtFromScratch ( (UINT8 **)&NewMadtTable ); if (EFI_ERROR (Status)) {- DEBUG (= (EFI_D_ERROR, "BuildAcpiTable failed: %r\n", Status));+ DEBUG ((DEBUG_ER= ROR, "BuildAcpiTable failed: %r\n", Status)); goto Done; } @@ -1136,6= +999,10 @@ Done: FreePool (NewMadtTable); } + if (mCpuApicIdOrderTable !=3D NULL) {+= FreePool (mCpuApicIdOrderTable);+ }+ return Status; } @@ -1324,9 +11= 91,9 @@ PlatformUpdateTables ( FadtHeader->XGpe1Blk.AccessSize =3D 0; } - DEBUG(( EFI_D_ERRO= R, "ACPI FADT table @ address 0x%x\n", Table ));- DEBUG(( EFI_D_ERROR, "= IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch ));- DEBUG(( EFI_D_ERRO= R, " Flags 0x%x\n", FadtHeader->Flags ));+ DEBUG ((DEBUG_ERROR, "ACPI F= ADT table @ address 0x%x\n", Table));+ DEBUG ((DEBUG_ERROR, " IaPcBootA= rch 0x%x\n", FadtHeader->IaPcBootArch));+ DEBUG ((DEBUG_ERROR, " Flags = 0x%x\n", FadtHeader->Flags)); break; case EFI_ACPI_3_0_HIGH_PRECISIO= N_EVENT_TIMER_TABLE_SIGNATURE:@@ -1346,8 +1213,8 @@ PlatformUpdateTables ( HpetBlockId.Bits.VendorId =3D HpetCapabilities.Bits.VendorId; = HpetTable->EventTimerBlockId =3D HpetBlockId.Uint32; HpetTable->Ma= inCounterMinimumClockTickInPeriodicMode =3D (UINT16)HpetCapabilities.Bits.C= ounterClockPeriod;- DEBUG(( EFI_D_ERROR, "ACPI HPET table @ address 0x%x= \n", Table ));- DEBUG(( EFI_D_ERROR, " HPET base 0x%x\n", PcdGet32 (Pcd= HpetBaseAddress) ));+ DEBUG ((DEBUG_ERROR, "ACPI HPET table @ address 0x= %x\n", Table));+ DEBUG ((DEBUG_ERROR, " HPET base 0x%x\n", PcdGet32 (Pc= dHpetBaseAddress))); break; case EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAP= PED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE:@@ -1526,7= +1393,6 @@ InstallAcpiPlatform ( EFI_STATUS Status; EFI_EVENT En= dOfDxeEvent; - Status =3D gBS->LocateProtocol (&gEfiMpServiceProtocolGuid= , NULL, (VOID **)&mMpService); ASSERT_EFI_ERROR (Status); @@ -1551,11 +14= 17,11 @@ InstallAcpiPlatform ( // mMpService->GetNumberOfProcessors ( mMpService,- = &mNumberOfCPUs,+ &mNumberOfCpus, &mNu= mberOfEnabledCPUs );- ASSERT (mNumberOfCPUs <=3D MAX_CPU_NUM= && mNumberOfEnabledCPUs >=3D 1);- DEBUG ((DEBUG_INFO, "mNumberOfCPUs - %d= \n", mNumberOfCPUs));++ DEBUG ((DEBUG_INFO, "mNumberOfCpus - %d\n", mNumbe= rOfCpus)); DEBUG ((DEBUG_INFO, "mNumberOfEnabledCPUs - %d\n", mNumberOfEn= abledCPUs)); DEBUG ((DEBUG_INFO, "mX2ApicEnabled - 0x%x\n", mX2ApicEnabl= ed));--=20 2.26.2.windows.1