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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Pushed as eb2d49b5a7..d64b135db -----Original Message----- From: Desimone, Nathaniel L =20 Sent: Wednesday, December 15, 2021 4:40 PM To: devel@edk2.groups.io; Oram, Isaac W Cc: Chaganty, Rangasai V ; Chiu, Chasel Subject: RE: [edk2-devel][edk2-platforms][PATCH V2 1/1] Platform/Intel/Read= me : Fix platform list Reviewed-by: Nate DeSimone -----Original Message----- From: devel@edk2.groups.io On Behalf Of Oram, Isaac = W Sent: Wednesday, December 15, 2021 3:59 PM To: devel@edk2.groups.io Cc: Oram, Isaac W ; Desimone, Nathaniel L ; Chaganty, Rangasai V ; Chiu, Chasel Subject: [edk2-devel][edk2-platforms][PATCH V2 1/1] Platform/Intel/Readme := Fix platform list V1: The list of WhiskeyLake and Whitley boards got confused at some earlier mer= ge Untabified V2: Moved JunctionCity, MtOlympus, and TiogaPass into an OCP section which fixe= d a table format issue Fixed .md format issue where line wasn't made bold b= ecause of space Cc: Nate DeSimone Cc: Sai Chaganty Cc: Chasel Chiu Signed-off-by: Isaac Oram --- Platform/Intel/Readme.md | 58 ++++++++++---------- 1 file changed, 29 insertions(+), 29 deletions(-) diff --git a/Platform/Intel/Readme.md b/Platform/Intel/Readme.md index 6fe8= e076f3..6f055f2524 100644 --- a/Platform/Intel/Readme.md +++ b/Platform/Intel/Readme.md @@ -92,17 +92,13 @@ A UEFI firmware implementation using MinPlatformPkg is = constructed using the fol =20 *Note: RVP =3D Reference and Validation Platform* =20 -#### Microsoft +#### Open Compute Project (OCP) =20 | Machine Name | Supported Chipsets = | BoardPkg | Board Name | ----------------------------------------|---------------------------------= -----------|------------------------------|--------------------| +| Junction City | IceLake-SP (Xeon Scalable) = | WhitleyOpenBoardPkg | JunctionCity | | Mt. Olympus | Purley = | PurleyOpenBoardPkg | BoardMtOlympus | - -| Machine Name | Supported Chipsets = | BoardPkg | Board Name | -----------------------------------------|---------------------------------= -----------|------------------------------|--------------------| | TiogaPass | Purley = | PurleyOpenBoardPkg | BoardTiogaPass | -----------------------------------------|---------------------------------= -----------|------------------------------|--------------------| -| JunctionCity | IceLake-SP (Xeon Scalable) = | WhitleyOpenBoardPkg | JunctionCity | =20 =20 #### Simics @@ -264,38 +260,42 @@ return back to the minimum platform caller. | | | | | |------PurleyOpenBoardPkg | | | |------BoardMtOlympus - | | | |---build_config.cfg: BoardMtOl= ympus specific - | | | | build set= tings, environment variables. - | | | |---build_board.py: Optional bo= ard-specific pre-build, - | | | build, post= -build and clean functions. - | | |------PurleyOpenBoardPkg + | | | | |---build_config.cfg: BoardMtOl= ympus specific + | | | | | build set= tings, environment variables. + | | | | |---build_board.py: Optional bo= ard-specific pre-build, + | | | | build, post= -build and clean functions. | | | |------BoardTiogaPass | | | |---build_config.cfg: BoardTiog= aPass specific | | | | build set= tings, environment variables. | | | |---build_board.py: Optional bo= ard-specific pre-build, - | | | build, post= -build and clean functions. =20 + | | | build, post= -build and clean functions. | | | | | |------SimicsOpenBoardPkg | | | |------BoardX58Ich10 | | | |---build_config.cfg: BoardX58I= ch10 specific | | | build set= tings, environment variables. | | | - | | |------WhiskeylakeOpenBoardPkg + | | |------WhitleyOpenBoardPkg | | | |------CooperCityRvp | | | | |---build_config.cfg: CooperCit= yRvp specific build - | | | | settings = environment variables. + | | | | | settings = environment variables. + | | | | |---build_board.py: Board-speci= fic pre-build, + | | | | build, post= -build and clean functions. + | | | |------JunctionCity + | | | | |---build_config.cfg: CooperCit= yRvp specific build + | | | | | settings = environment variables. + | | | | |---build_board.py: Board-speci= fic pre-build, + | | | | build, post= -build and clean functions. | | | |------WilsonCityRvp | | | |---build_config.cfg: WilsonCit= yRvp specific build - | | | settings = environment variables. + | | | | settings = environment variables. + | | | |---build_board.py: Board-speci= fic pre-build, + | | | build, post= -build and clean functions. | | | - | | |------WhitleyOpenBoardPkg + | | |------WhiskeylakeOpenBoardPkg | | | |------UpXtreme - | | | |---build_config.cfg: UpXtreme = specific build - | | | settings = environment variables. - | | |------WhitleyOpenBoardPkg - | | | |------JunctionCity - | | | |---build_config.cfg: JunctionC= ity specific build - | | | settings = environment variables. + | | | | |---build_config.cfg: UpXtreme = specific build + | | | | settings = environment variables. | | | |------WhiskeylakeURvp | | | |---build_config.cfg: Whiskeyla= keURvp specific build | | | settings = environment variables. @@ -335,10 +335,10 @@ For PurleyOpenBoardPkg (TiogaPass) 4. Type "bld" to = build Purley BoardTiogaPass board UEFI firmware image, "bld release" for re= lease build, "bld clean" to remove intermediate files."bld cache-produce" Generate a cache of binar= y files in the specified directory, "bld cache-consume" Consume a cache of binary files from the specified = directory, BINARY_CACHE_PATH is empty, - used "BinCache" as default path. =20 -5. Final BIOS image will be Build\PurleyOpenBoardPkg\BoardTiagoPass\DEBUG_= VS2015x86\FV\PLATFORM.fd or =20 + used "BinCache" as default path. +5. Final BIOS image will be +Build\PurleyOpenBoardPkg\BoardTiagoPass\DEBUG_VS2015x86\FV\PLATFORM.fd +or Build\PurleyOpenBoardPkg\BoardTiagoPass\RELEASE_VS2015x86\FV\PLATFORM.f= d, depending on bld batch script input. -6. This BIOS image needs to be merged with SPS FW =20 +6. This BIOS image needs to be merged with SPS FW =20 ### **Known limitations** =20 @@ -355,7 +355,7 @@ For PurleyOpenBoardPkg (TiogaPass) 2. This firmware pr= oject does not build with the GCC compiler. 3. The validated version of iASL compiler that can build MinPurley is 2018= 0629. Older versions may generate ACPI build errors. =20 -**PurleyOpenBoardPkg Tioga Pass ** +**PurleyOpenBoardPkg Tioga Pass** 1. This firmware project has only been tested on the Tioga Pass hardware. 2. This firmware project build has only been tested using the Microsoft Vi= sual Studio 2015 build tools. 3. This firmware project does not build with the GCC compiler. @@ -367,9 +367,9 @@ For PurleyOpenBoardPkg (TiogaPass) 9. Verified Mellano= x card detection during POST and OS 10. LINUX Boot Support (PcdLinuxBootEn= able needs to be enabled) =20 -1. Follow directions on http://osresearch.net/Building/ to compile the hea= ds kernel and initrd for qemu-system_x86_64=20 -2. Copy the following built files=20 -(1) initrd.cpio.xz to LinuxBootPkg/LinuxBinaries/initrd.cpio.xz=20 +1. Follow directions on http://osresearch.net/Building/ to compile the=20 +heads kernel and initrd for qemu-system_x86_64 2. Copy the following=20 +built files +(1) initrd.cpio.xz to LinuxBootPkg/LinuxBinaries/initrd.cpio.xz (2) bzimage to LinuxBootPkg/LinuxBinaries/linux.efi =20 =20 -- 2.27.0.windows.1