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cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7544.47; Fri, 10 May 2024 01:14:37 +0000 X-Received: from MW4PR11MB5776.namprd11.prod.outlook.com ([fe80::4bea:b8f6:b86f:6942]) by MW4PR11MB5776.namprd11.prod.outlook.com ([fe80::4bea:b8f6:b86f:6942%4]) with mapi id 15.20.7544.041; Fri, 10 May 2024 01:14:37 +0000 From: "Chaganty, Rangasai V" To: "Desimone, Nathaniel L" , "devel@edk2.groups.io" CC: "Chiu, Chasel" , Liming Gao , "Dong, Eric" , "Chuang, Rosen" , "Kasbekar, Saloni" Subject: Re: [edk2-devel] [edk2-platforms] [PATCH v1 1/2] MinPlatform: Add MpInfo2HobPei Thread-Topic: [edk2-platforms] [PATCH v1 1/2] MinPlatform: Add MpInfo2HobPei Thread-Index: AQHaoaUsoWJ2h0+2rUyYhjy50adqGrGPqh0w Date: Fri, 10 May 2024 01:14:37 +0000 Message-ID: References: <20240509000918.2336-1-nathaniel.l.desimone@intel.com> <20240509000918.2336-2-nathaniel.l.desimone@intel.com> In-Reply-To: <20240509000918.2336-2-nathaniel.l.desimone@intel.com> Accept-Language: en-US X-MS-Has-Attach: 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List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Thu, 09 May 2024 18:14:46 -0700 Resent-From: rangasai.v.chaganty@intel.com Reply-To: devel@edk2.groups.io,rangasai.v.chaganty@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: mIlJVHgLUJUnX9BO0WN0CZebx7686176AA= Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=fjFHJTub; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io Hi Nate,=20 Looks good.=20 In addition to optimization suggested by Chasel to save unnecessary call to= locate PPI, you might also want to consider checking for checking "no erro= r" status for locate PPI and perhaps avoid a "goto" label. With that, Reviewed-by: Sai Chaganty for th= e whole patch series.=20 Thanks, Sai -----Original Message----- From: Desimone, Nathaniel L =20 Sent: Wednesday, May 8, 2024 5:09 PM To: devel@edk2.groups.io Cc: Chiu, Chasel ; Liming Gao ; Dong, Eric ; Chaganty, Rangasai V ; Chuang, Rosen ; Kasbekar, Saloni= Subject: [edk2-platforms] [PATCH v1 1/2] MinPlatform: Add MpInfo2HobPei MpInfo2HobPei provides backwards compatibility between FSP binaries built w= ith older versions of EDK II and the latest EDK II. Newer versions of CpuMpPei produce the gMpInformation2HobGuid. This HOB is = required by newer implementations of the CPU DXE driver, however older vers= ions of CpuMpPei do not produce it. This PEIM will check if CpuMpPei create= s gMpInformation2HobGuid and if it does not it creates it. Cc: Chasel Chiu Cc: Liming Gao Cc: Eric Dong Cc: Sai Chaganty Cc: Rosen Chuang Cc: Saloni Kasbekar Signed-off-by: Nate DeSimone --- .../FspWrapper/MpInfo2HobPei/MpInfo2HobPei.c | 236 ++++++++++++++++++ .../MpInfo2HobPei/MpInfo2HobPei.inf | 47 ++++ .../Intel/MinPlatformPkg/MinPlatformPkg.dsc | 3 +- 3 files changed, 285 insertions(+), 1 deletion(-) create mode 100644 Plat= form/Intel/MinPlatformPkg/FspWrapper/MpInfo2HobPei/MpInfo2HobPei.c create mode 100644 Platform/Intel/MinPlatformPkg/FspWrapper/MpInfo2HobPei/= MpInfo2HobPei.inf diff --git a/Platform/Intel/MinPlatformPkg/FspWrapper/MpInfo2HobPei/MpInfo2= HobPei.c b/Platform/Intel/MinPlatformPkg/FspWrapper/MpInfo2HobPei/MpInfo2Ho= bPei.c new file mode 100644 index 0000000000..4cbc4cf7e6 --- /dev/null +++ b/Platform/Intel/MinPlatformPkg/FspWrapper/MpInfo2HobPei/MpInfo2HobP +++ ei.c @@ -0,0 +1,236 @@ +/** @file + Multi-processor Info 2 HOB PEIM. + + The purpose of this PEIM is to provide backwards compatibility=20 + between FSP binaries built with older versions of EDK II and the latest = EDK II. + + Newer versions of CpuMpPei produce the gMpInformation2HobGuid. This=20 + HOB is required by newer implementations of the CPU DXE driver,=20 + however older versions of CpuMpPei do not produce it. This PEIM will=20 + check if CpuMpPei creates gMpInformation2HobGuid and if it does not it c= reates it. + +Copyright (c) 2024, Intel Corporation. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include #include=20 + + +#include +#include +#include + +typedef struct { + EDKII_PEI_MP_SERVICES2_PPI *CpuMpPpi2; + UINT8 *CoreTypes; +} GET_PROCESSOR_CORE_TYPE_BUFFER; + +/** + Get CPU core type. + + @param[in, out] Buffer Argument of the procedure. +**/ +VOID +EFIAPI +GetProcessorCoreType ( + IN OUT VOID *Buffer + ) +{ + EFI_STATUS Status; + UINT8 *CoreTypes; + CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX NativeModelIdAndCoreTypeEax; + UINTN ProcessorIndex; + GET_PROCESSOR_CORE_TYPE_BUFFER *Params; + + Params =3D (GET_PROCESSOR_CORE_TYPE_BUFFER *)Buffer; Status =3D=20 + Params->CpuMpPpi2->WhoAmI (Params->CpuMpPpi2, &ProcessorIndex); =20 + ASSERT_EFI_ERROR (Status); + + CoreTypes =3D Params->CoreTypes; + AsmCpuidEx (CPUID_HYBRID_INFORMATION,=20 +CPUID_HYBRID_INFORMATION_MAIN_LEAF,=20 +&NativeModelIdAndCoreTypeEax.Uint32, NULL, NULL, NULL); + CoreTypes[ProcessorIndex] =3D=20 +(UINT8)NativeModelIdAndCoreTypeEax.Bits.CoreType; +} + +/** + Create gMpInformation2HobGuid. +**/ +VOID +BuildMpInformationHob ( + IN EDKII_PEI_MP_SERVICES2_PPI *CpuMpPpi2 + ) +{ + GET_PROCESSOR_CORE_TYPE_BUFFER Buffer; + EFI_STATUS Status; + UINTN ProcessorIndex; + UINTN NumberOfProcessors; + UINTN NumberOfEnabledProcessors; + UINTN NumberOfProcessorsInHob; + UINTN MaxProcessorsPerHob; + MP_INFORMATION2_HOB_DATA *MpInformation2HobData; + MP_INFORMATION2_ENTRY *MpInformation2Entry; + UINTN Index; + UINT8 *CoreTypes; + UINT32 CpuidMaxInput; + UINTN CoreTypePages; + + ProcessorIndex =3D 0; + MpInformation2HobData =3D NULL; + MpInformation2Entry =3D NULL; + CoreTypes =3D NULL; + CoreTypePages =3D 0; + + Status =3D CpuMpPpi2->GetNumberOfProcessors ( + CpuMpPpi2, + &NumberOfProcessors, + &NumberOfEnabledProcessors + ); + ASSERT_EFI_ERROR (Status); + if (EFI_ERROR (Status)) { + goto Done; + } + + // + // Get Processors CoreType + // + AsmCpuid (CPUID_SIGNATURE, &CpuidMaxInput, NULL, NULL, NULL); if=20 + (CpuidMaxInput >=3D CPUID_HYBRID_INFORMATION) { + CoreTypePages =3D EFI_SIZE_TO_PAGES (sizeof (UINT8) * NumberOfProcesso= rs); + CoreTypes =3D AllocatePages (CoreTypePages); + ASSERT (CoreTypes !=3D NULL); + if (CoreTypes =3D=3D NULL) { + goto Done; + } + + Buffer.CoreTypes =3D CoreTypes; + Buffer.CpuMpPpi2 =3D CpuMpPpi2; + Status =3D CpuMpPpi2->StartupAllCPUs ( + CpuMpPpi2, + GetProcessorCoreType, + 0, + (VOID *)&Buffer + ); + ASSERT_EFI_ERROR (Status); + } + + MaxProcessorsPerHob =3D ((MAX_UINT16 & ~7) - sizeof (EFI_HOB_GUID_TY= PE) - sizeof (MP_INFORMATION2_HOB_DATA)) / sizeof (MP_INFORMATION2_ENTRY); + NumberOfProcessorsInHob =3D MaxProcessorsPerHob; + + // + // Create MP_INFORMATION2_HOB. when the max HobLength 0xFFF8 is not=20 + enough, there // will be a MP_INFORMATION2_HOB series in the HOB list. + // In the HOB list, there is a gMpInformation2HobGuid with 0 value=20 + NumberOfProcessors // fields to indicate it's the last MP_INFORMATION2_H= OB. + // + while (NumberOfProcessorsInHob !=3D 0) { + NumberOfProcessorsInHob =3D MIN (NumberOfProcessors - ProcessorIndex, = MaxProcessorsPerHob); + MpInformation2HobData =3D BuildGuidHob ( + &gMpInformation2HobGuid, + sizeof (MP_INFORMATION2_HOB_DATA) + sizeof= (MP_INFORMATION2_ENTRY) * NumberOfProcessorsInHob + ); + ASSERT (MpInformation2HobData !=3D NULL); + if (MpInformation2HobData =3D=3D NULL) { + goto Done; + } + + MpInformation2HobData->Version =3D MP_INFORMATION2_HOB_REVI= SION; + MpInformation2HobData->ProcessorIndex =3D ProcessorIndex; + MpInformation2HobData->NumberOfProcessors =3D (UINT16)NumberOfProcesso= rsInHob; + MpInformation2HobData->EntrySize =3D sizeof (MP_INFORMATION2_= ENTRY); + + DEBUG ((DEBUG_INFO, "Creating MpInformation2 HOB...\n")); + + for (Index =3D 0; Index < NumberOfProcessorsInHob; Index++) { + MpInformation2Entry =3D &MpInformation2HobData->Entry[Index]; + Status =3D CpuMpPpi2->GetProcessorInfo ( + CpuMpPpi2, + (Index + ProcessorIndex) | CPU_V2= _EXTENDED_TOPOLOGY, + &MpInformation2Entry->ProcessorIn= fo + ); + ASSERT_EFI_ERROR (Status); + + MpInformation2Entry->CoreType =3D (CoreTypes !=3D NULL) ?=20 + CoreTypes[Index + ProcessorIndex] : 0; + + DEBUG (( + DEBUG_INFO, + " Processor[%04d]: ProcessorId =3D 0x%lx, StatusFlag =3D 0x%x, Co= reType =3D 0x%x\n", + Index + ProcessorIndex, + MpInformation2Entry->ProcessorInfo.ProcessorId, + MpInformation2Entry->ProcessorInfo.StatusFlag, + MpInformation2Entry->CoreType + )); + DEBUG (( + DEBUG_INFO, + " Location =3D Package:%d Core:%d Thread:%d\n", + MpInformation2Entry->ProcessorInfo.Location.Package, + MpInformation2Entry->ProcessorInfo.Location.Core, + MpInformation2Entry->ProcessorInfo.Location.Thread + )); + DEBUG (( + DEBUG_INFO, + " Location2 =3D Package:%d Die:%d Tile:%d Module:%d Core:%d Thr= ead:%d\n", + MpInformation2Entry->ProcessorInfo.ExtendedInformation.Location2.P= ackage, + MpInformation2Entry->ProcessorInfo.ExtendedInformation.Location2.D= ie, + MpInformation2Entry->ProcessorInfo.ExtendedInformation.Location2.T= ile, + MpInformation2Entry->ProcessorInfo.ExtendedInformation.Location2.M= odule, + MpInformation2Entry->ProcessorInfo.ExtendedInformation.Location2.C= ore, + MpInformation2Entry->ProcessorInfo.ExtendedInformation.Location2.T= hread + )); + } + + ProcessorIndex +=3D NumberOfProcessorsInHob; } + +Done: + if (CoreTypes !=3D NULL) { + FreePages (CoreTypes, CoreTypePages); + } +} + +/** + Check if CpuMpPei creates gMpInformation2HobGuid and if it does not=20 +it + creates it. + + @param[in] ImageHandle Handle for the image of this driver + @param[in] SystemTable Pointer to the EFI System Table + + @retval EFI_UNSUPPORTED +**/ +EFI_STATUS +EFIAPI +MpInfo2HobPeiEntryPoint ( + IN EFI_PEI_FILE_HANDLE FileHandle, + IN CONST EFI_PEI_SERVICES **PeiServices + ) +{ + EFI_STATUS Status; + EFI_PEI_PPI_DESCRIPTOR *TempPpiDescriptor; + EDKII_PEI_MP_SERVICES2_PPI *CpuMpPpi2; + EFI_HOB_GUID_TYPE *GuidHob; + + Status =3D PeiServicesLocatePpi ( + &gEdkiiPeiMpServices2PpiGuid, + 0, + &TempPpiDescriptor, + (VOID **)&CpuMpPpi2 + ); + ASSERT_EFI_ERROR (Status); + if (EFI_ERROR (Status)) { + goto Done; + } + + GuidHob =3D GetFirstGuidHob (&gMpInformation2HobGuid); if (GuidHob =3D= =3D=20 + NULL) { + DEBUG ((DEBUG_INFO, "gMpInformation2HobGuid was not created by CpuMpPe= i, creating now\n")); + BuildMpInformationHob (CpuMpPpi2); + } + +Done: + return Status; +} diff --git a/Platform/Intel/MinPlatformPkg/FspWrapper/MpInfo2HobPei/MpInfo2= HobPei.inf b/Platform/Intel/MinPlatformPkg/FspWrapper/MpInfo2HobPei/MpInfo2= HobPei.inf new file mode 100644 index 0000000000..eecfdbf422 --- /dev/null +++ b/Platform/Intel/MinPlatformPkg/FspWrapper/MpInfo2HobPei/MpInfo2HobP +++ ei.inf @@ -0,0 +1,47 @@ +### @file +# Component information file for the Multi-processor Info 2 HOB PEIM. +# +# The purpose of this PEIM is to provide backwards compatibility=20 +between FSP # binaries built with older versions of EDK II and the latest = EDK II. +# +# Newer versions of CpuMpPei produce the gMpInformation2HobGuid. This=20 +HOB is # required by newer implementations of the CPU DXE driver,=20 +however older # versions of CpuMpPei do not produce it. This PEIM will=20 +check if CpuMpPei # creates gMpInformation2HobGuid and if it does not it c= reates it. +# +# Copyright (c) 2024, Intel Corporation. All rights reserved.
# #=20 +SPDX-License-Identifier: BSD-2-Clause-Patent # ### + +[Defines] + INF_VERSION =3D 0x00010017 + BASE_NAME =3D MpInfo2HobPei + FILE_GUID =3D 010B5607-D5B3-4302-BCBC-C1A68087E9BE + VERSION_STRING =3D 1.0 + MODULE_TYPE =3D PEIM + ENTRY_POINT =3D MpInfo2HobPeiEntryPoint + +[LibraryClasses] + PeimEntryPoint + DebugLib + MemoryAllocationLib + HobLib + +[Packages] + MdePkg/MdePkg.dec + UefiCpuPkg/UefiCpuPkg.dec + MinPlatformPkg/MinPlatformPkg.dec + +[Sources] + MpInfo2HobPei.c + +[Guids] + gMpInformation2HobGuid ## SOMETIMES_PRODUCES ##= HOB + +[Ppis] + gEdkiiPeiMpServices2PpiGuid ## CONSUMES + +[Depex] + gEdkiiPeiMpServices2PpiGuid diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc b/Platform/In= tel/MinPlatformPkg/MinPlatformPkg.dsc index ecb4d8f65e..30cdf1fb82 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc @@ -1,7 +1,7 @@ ## @file # Platform description. # -# Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2024, Intel Corporation. All rights=20 +reserved.
# Copyright (c) Microsoft Corporation.
# # SPDX-License-Identifier: = BSD-2-Clause-Patent @@ -150,6 +150,7 @@ MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootMana= gerLib.inf =20 MinPlatformPkg/FspWrapper/SaveMemoryConfig/SaveMemoryConfig.inf + MinPlatformPkg/FspWrapper/MpInfo2HobPei/MpInfo2HobPei.inf MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapp= erHobProcessLib.inf MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrap= perPlatformSecLib.inf MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapper= PlatformLib.inf -- 2.44.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118780): https://edk2.groups.io/g/devel/message/118780 Mute This Topic: https://groups.io/mt/105992897/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-