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From: "Nate DeSimone" <nathaniel.l.desimone@intel.com>
To: "Chiu, Chasel" <chasel.chiu@intel.com>,
	"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Zeng, Star" <star.zeng@intel.com>
Subject: Re: [PATCH] IntelFsp2Pkg: Update Function header to support IA32/X64.
Date: Tue, 1 Nov 2022 00:52:21 +0000	[thread overview]
Message-ID: <MW4PR11MB5821A9515F42A2CF633B0D8FCD369@MW4PR11MB5821.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20221028025829.1033-1-chasel.chiu@intel.com>

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>

> -----Original Message-----
> From: Chiu, Chasel <chasel.chiu@intel.com>
> Sent: Thursday, October 27, 2022 7:58 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>; Zeng, Star <star.zeng@intel.com>
> Subject: [PATCH] IntelFsp2Pkg: Update Function header to support IA32/X64.
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4126
> 
> Common functions will have either 32bit or 64bit instances which having
> different return code size. Function header should support both scenarios.
> 
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
> ---
>  IntelFsp2Pkg/FspSecCore/SecFsp.h                 |  4 ++--
>  IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h | 12 ++++++------
>  2 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/IntelFsp2Pkg/FspSecCore/SecFsp.h b/IntelFsp2Pkg/FspSecCore/SecFsp.h
> index e84528b378..d7a5976c12 100644
> --- a/IntelFsp2Pkg/FspSecCore/SecFsp.h
> +++ b/IntelFsp2Pkg/FspSecCore/SecFsp.h
> @@ -70,7 +70,7 @@ FspDataPointerFixUp (
>    @return   FSP binary base address.
>  
>  **/
> -UINT32
> +UINTN
>  EFIAPI
>  AsmGetFspBaseAddress (
>    VOID
> @@ -82,7 +82,7 @@ AsmGetFspBaseAddress (
>    @return   FSP binary base address.
>  
>  **/
> -UINT32
> +UINTN
>  EFIAPI
>  AsmGetFspInfoHeader (
>    VOID
> diff --git a/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h b/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h
> index c91ea4a78f..598fdb9ec5 100644
> --- a/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h
> +++ b/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h
> @@ -17,10 +17,10 @@
>    The callee should not use XMM6/XMM7.
>    The return address is saved in MM7.
>  
> -  @retval in saved in EAX - 0 means platform initialization success.
> +  @retval in saved in EAX/RAX - 0 means platform initialization success.
>                              other means platform initialization fail.
>  **/
> -UINT32
> +UINTN
>  EFIAPI
>  SecPlatformInit (
>    VOID
> @@ -37,10 +37,10 @@ SecPlatformInit (
>  
>    @param[in] FsptUpdDataPtr     Address pointer to the FSPT_UPD data structure. It is saved in ESP.
>  
> -  @retval in saved in EAX - 0 means Microcode is loaded successfully.
> +  @retval in saved in EAX/RAX - 0 means Microcode is loaded successfully.
>                              other means Microcode is not loaded successfully.
>  **/
> -UINT32
> +UINTN
>  EFIAPI
>  LoadMicrocode (
>    IN  VOID  *FsptUpdDataPtr
> @@ -56,10 +56,10 @@ LoadMicrocode (
>  
>    @param[in] FsptUpdDataPtr     Address pointer to the FSPT_UPD data structure. It is saved in ESP.
>  
> -  @retval in saved in EAX - 0 means CAR initialization success.
> +  @retval in saved in EAX/RAX - 0 means CAR initialization success.
>                              other means CAR initialization fail.
>  **/
> -UINT32
> +UINTN
>  EFIAPI
>  SecCarInit (
>    IN  VOID  *FsptUpdDataPtr
> -- 
> 2.35.0.windows.1

  reply	other threads:[~2022-11-01  0:52 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-28  2:58 [PATCH] IntelFsp2Pkg: Update Function header to support IA32/X64 Chiu, Chasel
2022-11-01  0:52 ` Nate DeSimone [this message]
2022-11-01 19:15   ` Chiu, Chasel
2022-11-01 21:55     ` [edk2-devel] " Michael Kubacki
2022-11-01 21:56       ` Michael Kubacki

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