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charset="us-ascii" Content-Transfer-Encoding: quoted-printable The series has been pushed as ~af3727a..19d3b5d -----Original Message----- From: devel@edk2.groups.io On Behalf Of Nate DeSimon= e Sent: Monday, June 6, 2022 4:17 PM To: devel@edk2.groups.io Cc: Chiu, Chasel ; Sinha, Ankit ; Chaganty, Rangasai V ; Kubacki, Michael= ; Luo, Heng ; Kethi Red= dy, Deepika ; Esakkithevar, Kathappan ; Benjamin Doron ; = Soller, Jeremy Subject: [edk2-devel] [edk2-platforms] [PATCH V2 0/4] Enable CPU pwr mgmt i= n FADT for Intel client boards Changes in V2: - Moved FSP dispatch mode PCD additions for GalagoPro3 to a seperate patch= series This patch series sets the DUTY_OFFSET and DUTY_WIDTH fields in the ACPI FA= DT to 1 and 3 respectively. This will enable OS power management to set the= CPU clock speed in the P_CNT register on these platforms. Cc: Chasel Chiu Cc: Ankit Sinha Cc: Sai Chaganty Cc: Michael Kubacki Cc: Heng Luo Cc: Deepika Kethi Reddy Cc: Kathappan Esakkithevar Cc: Benjamin Doron Cc: Jeremy Soller Signed-off-by: Nate DeSimone Nate DeSimone (4): KabylakeOpenBoardPkg: Indicate width of CLK duty cycle in FADT WhiskeylakeOpenBoardPkg: Indicate width of CLK duty cycle in FADT CometlakeOpenBoardPkg: Indicate width of CLK duty cycle in FADT TigerlakeOpenBoardPkg: Indicate width of CLK duty cycle in FADT .../CometlakeURvp/OpenBoardPkgPcd.dsc | 9 ++++++++- .../AspireVn7Dash572G/OpenBoardPkgPcd.dsc | 9 ++++++++- .../GalagoPro3/OpenBoardPkgPcd.dsc | 8 +++++++- .../KabylakeRvp3/OpenBoardPkgPcd.dsc | 11 +++++++++-- .../TigerlakeURvp/OpenBoardPkgPcd.dsc | 10 +++++++++- .../UpXtreme/OpenBoardPkgPcd.dsc | 9 ++++++++- .../WhiskeylakeURvp/OpenBoardPkgPcd.dsc | 9 ++++++++- 7 files changed, 57 insertions(+), 8 deletions(-) -- 2.27.0.windows.1