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Thread-Topic: [PATCH v4] IntelFsp2Pkg: Add FSPI_ARCH_UPD. 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Nate DeSimone -----Original Message----- From: Chiu, Chasel =20 Sent: Friday, July 22, 2022 10:49 AM To: devel@edk2.groups.io Cc: Chiu, Chasel ; Desimone, Nathaniel L ; Zeng, Star Subject: [PATCH v4] IntelFsp2Pkg: Add FSPI_ARCH_UPD. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3993 Adding the missing FSPI_ARCH_UPD, FSP_GLOBAL_DATA_VERSION bumpping up, and = some comments for clarification. Also fixed a bug in SplitFspBin.py for FSP-I support. Cc: Nate DeSimone Cc: Star Zeng Signed-off-by: Chasel Chiu --- IntelFsp2Pkg/Include/FspEas/FspApi.h | 71 +++++++++++++++++++++++++++= +++++++++++++++++++++++++++++++++++++------- IntelFsp2Pkg/Include/FspGlobalData.h | 2 +- IntelFsp2Pkg/Include/Guid/FspHeaderFile.h | 21 +++++++++++++++++++-- IntelFsp2Pkg/Tools/SplitFspBin.py | 2 +- 4 files changed, 85 insertions(+), 11 deletions(-) diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h b/IntelFsp2Pkg/Include/Fs= pEas/FspApi.h index bf46f13f73..361e916b5f 100644 --- a/IntelFsp2Pkg/Include/FspEas/FspApi.h +++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h @@ -1,6 +1,6 @@ /** @file Intel FSP API definition from Intel Firmware Support Package E= xternal- Architecture Specification v2.0 - v2.2+ Architecture Specificati= on v2.0 and above. Copyright (c) 2014 - 2022, Intel Corporation. All rig= hts reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent@@ -100,13 = +100,14 @@ typedef struct { /// "XXXXXX_T" for FSP-T /// "XXXXXX_M" for FSP-M /// "XXXXXX_S" for= FSP-S+ /// "XXXXXX_I" for FSP-I /// Where XXXXXX is an unique signature= /// UINT64 Signature; /// /// Revision of the Data structure.- = /// For FSP spec 2.0/2.1 value is 1.- /// For FSP spec 2.2 value is 2= .+ /// For FSP spec 2.0/2.1, this value is 1 and only FSPM_UPD having AR= CH_UPD.+ /// For FSP spec 2.2 and above, this value is 2 and ARCH_UPD pr= esent in all UPD structures. /// UINT8 Revision; UINT8 Reserv= ed[23];@@ -134,7 +135,7 @@ typedef struct { } FSPT_ARCH_UPD; ///-/// FSPT_ARCH2_UPD Configuration.+/// FSPT_ARCH2_UPD= Configuration for FSP 2.4 and above. /// typedef struct { ///@@ -196,7 += 197,7 @@ typedef struct { } FSPM_ARCH_UPD; ///-/// FSPM_ARCH2_UPD Configuration.+/// FSPM_ARCH2_UPD= Configuration for FSP 2.4 and above. /// typedef struct { ///@@ -209,6 += 210,13 @@ typedef struct { /// UINT32 Length; ///+ /// Pointer to the non-vol= atile storage (NVS) data buffer.+ /// If it is NULL it indicates the NVS d= ata is not available.+ /// This value is deprecated starting with v2.4 of = the FSP specification,+ /// and will be removed in an upcoming version of = the FSP specification.+ ///+ EFI_PHYSICAL_ADDRESS NvsBufferPtr;+ /// = /// Pointer to the temporary stack base address to be /// consumed insi= de FspMemoryInit() API. ///@@ -232,7 +240,7 @@ typedef struct { /// This value is only valid if Revision is >=3D 2. /// EFI_PHYSICAL= _ADDRESS FspEventHandler;- UINT8 Reserved1[24];+ UIN= T8 Reserved1[16]; } FSPM_ARCH2_UPD; ///@@ -265,7 +273,7 = @@ typedef struct { } FSPS_ARCH_UPD; ///-/// FSPS_ARCH2_UPD Configuration.+/// FSPS_ARCH2_UPD= Configuration for FSP 2.4 and above. /// typedef struct { ///@@ -285,6 += 293,40 @@ typedef struct { UINT8 Reserved1[16]; } FSPS_ARCH2_UPD; +///+/// FSPI_A= RCH_UPD Configuration.+///+typedef struct {+ ///+ /// Revision of the str= ucture is 1 for this version of the specification.+ ///+ UINT8 = Revision;+ UINT8 Reserved[3];+ ///+ /// Length= of the structure in bytes. The current value for this field is 64.+ ///+ = UINT32 Length;+ ///+ /// The physical memory-mapped bas= e address of the bootloader SMM firmware volume (FV).+ ///+ EFI_PHYSICAL_= ADDRESS BootloaderSmmFvBaseAddress;+ ///+ /// The length in bytes of t= he bootloader SMM firmware volume (FV).+ ///+ UINT64 Boo= tloaderSmmFvLength;+ ///+ /// The physical memory-mapped base address of = the bootloader SMM FV context data.+ /// This data is provided to bootload= er SMM drivers through a HOB by the FSP MM Foundation.+ ///+ EFI_PHYSICAL= _ADDRESS BootloaderSmmFvContextData;+ ///+ /// The length in bytes of = the bootloader SMM FV context data.+ /// This data is provided to bootload= er SMM drivers through a HOB by the FSP MM Foundation.+ ///+ UINT16 = BootloaderSmmFvContextDataLength;+ UINT8 Res= erved1[30];+} FSPI_ARCH_UPD;+ /// /// FSPT_UPD_COMMON Configuration. ///@@ = -393,6 +435,21 @@ typedef struct { FSPS_ARCH2_UPD FspsArchUpd; } FSPS_UPD_COMMON_FSP24; +///+/// FSPI_UP= D_COMMON Configuration.+///+typedef struct {+ ///+ /// FSP_UPD_HEADER Con= figuration.+ ///+ FSP_UPD_HEADER FspUpdHeader;++ ///+ /// FSPI_ARCH_= UPD Configuration.+ ///+ FSPI_ARCH_UPD FspiArchUpd;+} FSPI_UPD_COMMON= ;+ /// /// Enumeration of FSP_INIT_PHASE for NOTIFY_PHASE. ///diff --git a/= IntelFsp2Pkg/Include/FspGlobalData.h b/IntelFsp2Pkg/Include/FspGlobalData.h index 697b20ed4c..cf94f7b6a5 100644 --- a/IntelFsp2Pkg/Include/FspGlobalData.h +++ b/IntelFsp2Pkg/Include/FspGlobalData.h @@ -12,7 +12,7 @@ #define FSP_IN_API_MODE 0 #define FSP_IN_DISPATCH_MODE 1-#de= fine FSP_GLOBAL_DATA_VERSION 1+#define FSP_GLOBAL_DATA_VERSION 0x2 #prag= ma pack(1) diff --git a/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h b/IntelFs= p2Pkg/Include/Guid/FspHeaderFile.h index c7fb63168f..5381716d81 100644 --- a/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h +++ b/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h @@ -52,7 +52,7 @@ typedef struct { UINT8 Reserved1[2]; /// /// Byte 0x0A: Indicates compliance with= a revision of this specification in the BCD format.- /// For r= evision v2.3 the value will be 0x23.+ /// For revision v2.4 the= value will be 0x24. /// UINT8 SpecVersion; ///@@ -93,11 +93,28 @= @ typedef struct { /// Bit 0: Graphics Support - Set to 1 when FSP supports enabling Grap= hics Display. /// Bit 1: Dispatch Mode Support - Set to 1 when FSP supp= orts the optional Dispatch Mode API defined in Section 7.2 and 9. This bit = is only valid if FSP HeaderRevision is >=3D 4. /// Bit 2: 64-bit mode s= upport - Set to 1 to indicate FSP supports 64-bit long mode interfaces. Set= to 0 to indicate FSP supports 32-bit mode interfaces. This bit is only val= id if FSP HeaderRevision is >=3D 7.- /// Bits 15:3 - Reserved+ /// Bi= t 3: FSP Variable Services Support - Set to 1 to indicate FSP utilizes the = FSP Variable Services defined in Section 9.6 to store non-volatile data. Th= is bit is only valid if FSP HeaderRevision is >=3D 7.+ /// Bits 15:4 - R= eserved /// UINT16 ImageAttribute; /// /// Byte 0x22: Attributes= of the FSP Component.+ /// Bit 0 - Build Type+ /// 0 - Debug Build= + /// 1 - Release Build+ /// Bit 1 - Release Type+ /// 0 - Tes= t Release+ /// 1 - Official Release+ /// Bit 11:2 - Reserved+ /// = Bits 15:12 - Component Type+ /// 0000 - Reserved+ /// 0001 - FS= P-T+ /// 0010 - FSP-M+ /// 0011 - FSP-S+ /// 0100 - FSP-I (F= SP SMM)+ /// 0101 to 0111 - Reserved+ /// 1000 - FSP-O+ /// = 1001 to 1111 - Reserved /// UINT16 ComponentAttribute; ///diff --g= it a/IntelFsp2Pkg/Tools/SplitFspBin.py b/IntelFsp2Pkg/Tools/SplitFspBin.py index 317d9c1fa0..ddabab7d8c 100644 --- a/IntelFsp2Pkg/Tools/SplitFspBin.py +++ b/IntelFsp2Pkg/Tools/SplitFspBin.py @@ -492,7 +492,7 @@ class FspImage: self.FihOffset =3D fihoff self.Offset =3D offset = self.FvIdxList =3D []- self.Type =3D "XTMSIXXXXOXXXXXXX"[(fih= .ComponentAttribute >> 12) & 0x0F]+ self.Type =3D "XTMSIXXXOXXX= XXXX"[(fih.ComponentAttribute >> 12) & 0x0F] self.PatchList =3D pat= ch self.PatchList.append(fihoff + 0x1C) --=20 2.35.0.windows.1