[edk2-devel] edk2-platforms: developing Whitley Lake package

[edk2-devel] edk2-platforms: developing Whitley Lake package

[Alireza Banejad]

Hello everyone,
I am trying to port edk2-platforms for an IceLake-SP board which uses
a C621a chipset. digging into the repo I found out that the most
compatible board inside WhitelyLakePkg is the WilsonCityRvp (The
ReadMe file inside Platform/Intel explicitly says it is IceLake-SP ).
I built it but it didn't work at all. looking into the Uba/Pei files I
found this gpio table:
#define GPIO_SKL_H_GPP_A0 0x01000000
#define GPIO_SKL_H_GPP_A1 0x01000001
#define GPIO_SKL_H_GPP_A2 0x01000002
#define GPIO_SKL_H_GPP_A3 0x01000003
#define GPIO_SKL_H_GPP_A4 0x01000004
#define GPIO_SKL_H_GPP_A5 0x01000005
#define GPIO_SKL_H_GPP_A6 0x01000006
#define GPIO_SKL_H_GPP_A7 0x01000007
#define GPIO_SKL_H_GPP_A8 0x01000008
#define GPIO_SKL_H_GPP_A9 0x01000009
#define GPIO_SKL_H_GPP_A10 0x0100000A
#define GPIO_SKL_H_GPP_A11 0x0100000B
#define GPIO_SKL_H_GPP_A12 0x0100000C
#define GPIO_SKL_H_GPP_A13 0x0100000D
#define GPIO_SKL_H_GPP_A14 0x0100000E
#define GPIO_SKL_H_GPP_A15 0x0100000F
#define GPIO_SKL_H_GPP_A16 0x01000010
#define GPIO_SKL_H_GPP_A17 0x01000011
...
Looking at the macro names I think this is meant for the SkyLake-H
platform but why does WilsonCityRvp(IceLake-SP) use this table as
well? Also, I am having a hard time understanding the values assigned
for these macros? are they the offset for each gpio register? because
in the c620 series datasheet the offset of gpio registers (A to L)
starts from 0x400.


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Re: [edk2-devel] edk2-platforms: developing Whitley Lake package

[Nate DeSimone]

Hi Alireza,

The GPIO table for Wilson City is stored in this file:

edk2-platforms/Platform/Intel/WhitleyOpenBoardPkg/Uba/UbaMain/TypeWilsonCityRP/Pei/GpioTable.c

Note that IceLake-SP (ICX) pairs with the Lewisburg (LBG) PCH. The pin definitions for LBG come from this file: edk2-platforms/Silicon/Intel/WhitleySiliconPkg/Pch/SouthClusterLbg/Include/GpioPinsSklH.h

You are right that the GPIO pin definitions are very similar to the SunrisePoint-H (SPT-H) PCH definitions, which are here: edk2-platforms/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/GpioPinsSklH.h

But if you compare the two files you will see that the GPIO pins are not identical. LBG was used for 3 generations of Xeon: SkyLake-SP, Cascade Lake, and IceLake-SP/Cooper Lake. The lineage of LBG being a descendant from SPT probably makes more sense now.

Hope that helps,
Nate

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Alireza Banejad
Sent: Wednesday, November 1, 2023 12:21 AM
To: devel@edk2.groups.io
Subject: [edk2-devel] edk2-platforms: developing Whitley Lake package

Hello everyone,
I am trying to port edk2-platforms for an IceLake-SP board which uses a C621a chipset. digging into the repo I found out that the most compatible board inside WhitelyLakePkg is the WilsonCityRvp (The ReadMe file inside Platform/Intel explicitly says it is IceLake-SP ).
I built it but it didn't work at all. looking into the Uba/Pei files I found this gpio table:
#define GPIO_SKL_H_GPP_A0 0x01000000
#define GPIO_SKL_H_GPP_A1 0x01000001
#define GPIO_SKL_H_GPP_A2 0x01000002
#define GPIO_SKL_H_GPP_A3 0x01000003
#define GPIO_SKL_H_GPP_A4 0x01000004
#define GPIO_SKL_H_GPP_A5 0x01000005
#define GPIO_SKL_H_GPP_A6 0x01000006
#define GPIO_SKL_H_GPP_A7 0x01000007
#define GPIO_SKL_H_GPP_A8 0x01000008
#define GPIO_SKL_H_GPP_A9 0x01000009
#define GPIO_SKL_H_GPP_A10 0x0100000A
#define GPIO_SKL_H_GPP_A11 0x0100000B
#define GPIO_SKL_H_GPP_A12 0x0100000C
#define GPIO_SKL_H_GPP_A13 0x0100000D
#define GPIO_SKL_H_GPP_A14 0x0100000E
#define GPIO_SKL_H_GPP_A15 0x0100000F
#define GPIO_SKL_H_GPP_A16 0x01000010
#define GPIO_SKL_H_GPP_A17 0x01000011
...
Looking at the macro names I think this is meant for the SkyLake-H platform but why does WilsonCityRvp(IceLake-SP) use this table as well? Also, I am having a hard time understanding the values assigned for these macros? are they the offset for each gpio register? because in the c620 series datasheet the offset of gpio registers (A to L) starts from 0x400.







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