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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Pushed: https://github.com/tianocore/edk2-platforms/commit/f427247 -----Original Message----- From: devel@edk2.groups.io On Behalf Of Nate DeSimon= e Sent: Tuesday, June 7, 2022 4:23 PM To: devel@edk2.groups.io Cc: Sinha, Ankit ; Chiu, Chasel ; Gao, Liming ; Dong, Eric ; Kubacki, Michael Subject: [edk2-devel] [PATCH V2 1/1] MinPlatformPkg: Add PCDs to update FAD= T entries from board package From: Ankit Sinha Adds new PCDs to allow entries in FADT to be customized during platform int= egration. Board packages will can update these PCDs during boot. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Liming Gao Cc: Eric Dong Cc: Michael Kubacki Signed-off-by: Ankit Sinha --- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 84 ++++++= ++++++-------- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf | 23 ++++++ Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 43 ++++++= +--- 3 files changed, 106 insertions(+), 44 deletions(-) diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b= /Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c index 508de9101306..3c9f79de5c6c 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c @@ -1165,6 +1165,11 @@ PlatformUpdateTables ( // Update the creator revision // TableHeader->CreatorRevision =3D PcdGet32(PcdAcpiDefaultCreatorRevis= ion); + + // + // Update the oem revision + // + TableHeader->OemRevision =3D PcdGet32(PcdAcpiDefaultOemRevision); } } =20 @@ -1187,44 +1192,53 @@ PlatformUpdateTables ( case EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE: FadtHeader =3D (EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *) Table; =20 - FadtHeader->PreferredPmProfile =3D PcdGet8 (PcdFadtPreferredPmProfile)= ; - FadtHeader->IaPcBootArch =3D PcdGet16 (PcdFadtIaPcBootArch); - FadtHeader->Flags =3D PcdGet32 (PcdFadtFlags); + FadtHeader->PreferredPmProfile =3D PcdGet8 (PcdFadtPref= erredPmProfile); + FadtHeader->IaPcBootArch =3D PcdGet16 (PcdFadtIaP= cBootArch); + FadtHeader->Flags =3D PcdGet32 (PcdFadtFla= gs); + FadtHeader->AcpiEnable =3D PcdGet8 (PcdAcpiEnab= leSwSmi); + FadtHeader->AcpiDisable =3D PcdGet8 (PcdAcpiDisa= bleSwSmi); + FadtHeader->Pm1aEvtBlk =3D PcdGet16 (PcdAcpiPm1= AEventBlockAddress); + FadtHeader->Pm1bEvtBlk =3D PcdGet16 (PcdAcpiPm1= BEventBlockAddress); + FadtHeader->Pm1aCntBlk =3D PcdGet16 (PcdAcpiPm1= AControlBlockAddress); + FadtHeader->Pm1bCntBlk =3D PcdGet16 (PcdAcpiPm1= BControlBlockAddress); + FadtHeader->Pm2CntBlk =3D PcdGet16 (PcdAcpiPm2= ControlBlockAddress); + FadtHeader->PmTmrBlk =3D PcdGet16 (PcdAcpiPmT= imerBlockAddress); + FadtHeader->Gpe0Blk =3D PcdGet16 (PcdAcpiGpe= 0BlockAddress); + FadtHeader->Gpe0BlkLen =3D PcdGet8 (PcdAcpiGpe0= BlockLength); + FadtHeader->Gpe1Blk =3D PcdGet16 (PcdAcpiGpe= 1BlockAddress); + FadtHeader->Gpe1Base =3D PcdGet8 (PcdAcpiGpe1= Base); =20 - FadtHeader->AcpiEnable =3D PcdGet8 (PcdAcpiEnableSwSmi); - FadtHeader->AcpiDisable =3D PcdGet8 (PcdAcpiDisableSwSmi); + FadtHeader->XPm1aEvtBlk.Address =3D PcdGet16 (PcdAcpiPm1= AEventBlockAddress); + FadtHeader->XPm1aCntBlk.Address =3D PcdGet16 (PcdAcpiPm1= AControlBlockAddress); + FadtHeader->XPm1bCntBlk.Address =3D PcdGet16 (PcdAcpiPm1= BControlBlockAddress); + FadtHeader->XPm2CntBlk.Address =3D PcdGet16 (PcdAcpiPm2= ControlBlockAddress); + FadtHeader->XPmTmrBlk.Address =3D PcdGet16 (PcdAcpiPmT= imerBlockAddress); + FadtHeader->XGpe0Blk.Address =3D PcdGet16 (PcdAcpiGpe= 0BlockAddress); + FadtHeader->XGpe1Blk.Address =3D PcdGet16 (PcdAcpiGpe= 1BlockAddress); =20 - FadtHeader->Pm1aEvtBlk =3D PcdGet16 (PcdAcpiPm1AEventBlockAddress); - FadtHeader->Pm1bEvtBlk =3D PcdGet16 (PcdAcpiPm1BEventBlockAddress); - FadtHeader->Pm1aCntBlk =3D PcdGet16 (PcdAcpiPm1AControlBlockAddress); - FadtHeader->Pm1bCntBlk =3D PcdGet16 (PcdAcpiPm1BControlBlockAddress); - FadtHeader->Pm2CntBlk =3D PcdGet16 (PcdAcpiPm2ControlBlockAddress); - FadtHeader->PmTmrBlk =3D PcdGet16 (PcdAcpiPmTimerBlockAddress); - FadtHeader->Gpe0Blk =3D PcdGet16 (PcdAcpiGpe0BlockAddress); - FadtHeader->Gpe0BlkLen =3D 0x20; - FadtHeader->Gpe1Blk =3D PcdGet16 (PcdAcpiGpe1BlockAddress); + FadtHeader->ResetReg.AccessSize =3D PcdGet8 (PcdAcpiRese= tRegAccessSize); + FadtHeader->XPm1aEvtBlk.AccessSize =3D PcdGet8 (PcdAcpiXPm1= aEvtBlkAccessSize); + FadtHeader->XPm1bEvtBlk.AccessSize =3D PcdGet8 (PcdAcpiXPm1= bEvtBlkAccessSize); + FadtHeader->XPm1aCntBlk.AccessSize =3D PcdGet8 (PcdAcpiXPm1= aCntBlkAccessSize); + FadtHeader->XPm1bCntBlk.AccessSize =3D PcdGet8 (PcdAcpiXPm1= bCntBlkAccessSize); + FadtHeader->XPm2CntBlk.AccessSize =3D PcdGet8 (PcdAcpiXPm2= CntBlkAccessSize); + FadtHeader->XPmTmrBlk.AccessSize =3D PcdGet8 (PcdAcpiXPmT= mrBlkAccessSize); + FadtHeader->XGpe0Blk.AccessSize =3D PcdGet8 (PcdAcpiXGpe= 0BlkAccessSize); + FadtHeader->XGpe1Blk.AccessSize =3D PcdGet8 (PcdAcpiXGpe= 1BlkAccessSize); =20 - FadtHeader->XPm1aEvtBlk.Address =3D PcdGet16 (PcdAcpiPm1AEventBlockAdd= ress); - FadtHeader->XPm1bEvtBlk.Address =3D PcdGet16 (PcdAcpiPm1BEventBlockAdd= ress); - if (FadtHeader->XPm1bEvtBlk.Address =3D=3D 0) { - FadtHeader->XPm1bEvtBlk.AccessSize =3D 0; - } - FadtHeader->XPm1aCntBlk.Address =3D PcdGet16 (PcdAcpiPm1AControlBlockA= ddress); - FadtHeader->XPm1bCntBlk.Address =3D PcdGet16 (PcdAcpiPm1BControlBlockA= ddress); - if (FadtHeader->XPm1bCntBlk.Address =3D=3D 0) { - FadtHeader->XPm1bCntBlk.AccessSize =3D 0; - } - FadtHeader->XPm2CntBlk.Address =3D PcdGet16 (PcdAcpiPm2ControlBlockAd= dress); - //if (FadtHeader->XPm2CntBlk.Address =3D=3D 0) { - FadtHeader->XPm2CntBlk.AccessSize =3D 0; - //} - FadtHeader->XPmTmrBlk.Address =3D PcdGet16 (PcdAcpiPmTimerBlockAddre= ss); - FadtHeader->XGpe0Blk.Address =3D PcdGet16 (PcdAcpiGpe0BlockAddress)= ; - FadtHeader->XGpe1Blk.Address =3D PcdGet16 (PcdAcpiGpe1BlockAddress)= ; - if (FadtHeader->XGpe1Blk.Address =3D=3D 0) { - FadtHeader->XGpe1Blk.AddressSpaceId =3D 0; - FadtHeader->XGpe1Blk.AccessSize =3D 0; - } + FadtHeader->SleepControlReg.AddressSpaceId =3D PcdGet8 (PcdAcpiSlee= pControlRegAddressSpaceId); + FadtHeader->SleepControlReg.RegisterBitOffset =3D PcdGet8 (PcdAcpiSlee= pControlRegRegisterBitOffset); + FadtHeader->SleepControlReg.AccessSize =3D PcdGet8 (PcdAcpiSlee= pControlRegAccessSize); + FadtHeader->SleepControlReg.Address =3D PcdGet64 (PcdAcpiSle= epControlRegAddress); + FadtHeader->SleepStatusReg.AddressSpaceId =3D PcdGet8 (PcdAcpiSlee= pStatusRegAddressSpaceId); + FadtHeader->SleepStatusReg.RegisterBitWidth =3D PcdGet8 (PcdAcpiSlee= pStatusRegRegisterBitWidth); + FadtHeader->SleepStatusReg.RegisterBitOffset =3D PcdGet8 (PcdAcpiSlee= pStatusRegRegisterBitOffset); + FadtHeader->SleepStatusReg.AccessSize =3D PcdGet8 (PcdAcpiSlee= pStatusRegAccessSize); + FadtHeader->SleepStatusReg.Address =3D PcdGet64 (PcdAcpiSle= epStatusRegAddress); + + FadtHeader->S4BiosReq =3D PcdGet8 (PcdAcpiS4Bi= osReq); + FadtHeader->XPm1aEvtBlk.Address =3D PcdGet16 (PcdAcpiPm1= AEventBlockAddress); + FadtHeader->XPm1bEvtBlk.Address =3D PcdGet16 (PcdAcpiPm1= BEventBlockAddress); =20 FadtHeader->DutyOffset =3D PcdGet8 (PcdFadtDutyOffset); FadtHeader->DutyWidth =3D PcdGet8 (PcdFadtDutyWidth); diff --git a/Pla= tform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf b/Platform/Inte= l/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf index 59ef5e2e544e..119212d2216b 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf @@ -62,6 +62,7 @@ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount =20 gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset @@ -79,7 +80,29 @@ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffset + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq + =20 gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/In= tel/MinPlatformPkg/MinPlatformPkg.dec index 22f371ee1ec8..68ab1d702d6a 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec @@ -115,6 +115,40 @@ gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|0x900= 00025 gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x900000= 26 gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x90000027 + + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT + 16|0x00010035 + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT + 16|0x00010036 + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x1804|UI + NT16|0x0001037 + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BControlBlockAddress|0x0000|UI + NT16|0x00010038 + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress|0x1850|UIN + T16|0x00010039 =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress|0x1808|UINT16 + |0x0001003A =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x1880|UINT16|0x + 0001003B =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength|0x00|UINT8|0x0001 + 003C =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT16|0x + 0001003D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base|0x00|UINT8|0x00010040 + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize|0x00|UINT8|0x0 + 0010042 + + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize|0x00|UINT8| + 0x00010043 + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize|0x00|UINT8| + 0x00010044 + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize|0x00|UINT8| + 0x00010045 + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize|0x00|UINT8| + 0x00010046 + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize|0x00|UINT8|0 + x00010047 + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize|0x00|UINT8|0x + 00010048 + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize|0x00|UINT8|0x0 + 0010049 =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize|0x00|UINT8|0x0 + 001004A + + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId|0x0 + 0|UINT8|0x0001004B =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth|0 + x00|UINT8|0x0001004C =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffset| + 0x00|UINT8|0x0001004D =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize|0x00|UI + NT8|0x0001004E =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress|0x00000000 + 00000000|UINT64|0x0001004F + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId|0x00 + |UINT8|0x00010050 + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth|0x + 00|UINT8|0x00010051 + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset|0 + x00|UINT8|0x00010052 + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize|0x00|UIN + T8|0x00010053 + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress|0x000000000 + 0000000|UINT64|0x00010054 + =20 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq|0x0000|UINT8|0x00010055 + # # FADT Duty Offset - The zero-based index of where the processor's duty = cycle # setting is within the processor's P_CNT register. @@ -260,15 +294,6 @@ gMinPlatformPkgTokenSpaceGuid.PcdPciSegmentCount |0x1 |UI= NT8|0x4001004E gMinPlatformPkgTokenSpaceGuid.PcdRandomizePlatformHierarchy |TRUE |BOOL= EAN|0x4001004F =20 - gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT16= |0x00010035 - gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT16= |0x00010036 - gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x1804|UINT= 16|0x0001037 - gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BControlBlockAddress|0x0000|UINT= 16|0x00010038 - gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress|0x1850|UINT1= 6|0x00010039 - gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress|0x1808|UINT16|0= x0001003A - gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x1880|UINT16|0x00= 01003B - gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT16|0x00= 01003C - gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000|UINT3= 2|0x0010004 gMinPlatformPkgTokenSpaceGuid.PcdFspCpuPeiApWakeupBufferAddr|0x9f000|UIN= T32|0x30000008 =20 -- 2.27.0.windows.1