From: "Nate DeSimone" <nathaniel.l.desimone@intel.com>
To: "Oram, Isaac W" <isaac.w.oram@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Chiu, Chasel" <chasel.chiu@intel.com>,
"Bu, Daocheng" <daocheng.bu@intel.com>,
"Zhang, Hongbin1" <hongbin1.zhang@intel.com>
Subject: Re: [edk2-devel][edk2-platforms][PATCH V2 0/2] WhitleyOpenBoardPkg board porting template
Date: Tue, 8 Feb 2022 01:04:32 +0000 [thread overview]
Message-ID: <MW4PR11MB5821E9D1DBBFC99F7C56FEC9CD2D9@MW4PR11MB5821.namprd11.prod.outlook.com> (raw)
In-Reply-To: <cover.1643911928.git.isaac.w.oram@intel.com>
For the series...
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: Oram, Isaac W <isaac.w.oram@intel.com>
Sent: Thursday, February 3, 2022 10:17 AM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>; Bu, Daocheng <daocheng.bu@intel.com>; Zhang, Hongbin1 <hongbin1.zhang@intel.com>
Subject: [edk2-devel][edk2-platforms][PATCH V2 0/2] WhitleyOpenBoardPkg board porting template
This series adds a template for board porting and the infrastruture to support.
V2:
1/2: No change
2/2: Updated Readme.md per feedback, elaborating on naming and fixing formatting issues.
V1:
The WhitleyOpenBoardPkg/Readme.md documents the step by step instructions to create a new board tip that builds.
The BoardPortTemplate contains build files and typically required Universal Board Abstraction (UBA) modules that enable detailed customization.
The UBA modules are customized to have fewer deltas between board ports. For DXE, this means I removed the board names in data structures, functions, etc.
Because they are all compiled into different drivers per board anyway.
PEI still has decorated names as the UBA module is a library and thus multiple board name collisions are a concern.
The only other changes to UBA modules was to use newer DEBUG_INFO and DEBUG_ERROR styles.
I did not add the BoardPortTemplate to Platform/Intel/build.cfg. It is buildable so it could be added.
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Daocheng Bu <daocheng.bu@intel.com>
Cc: Hongbin Zhang <hongbin1.zhang@intel.com>
Isaac Oram (2):
WhitleyOpenBoardPkg/BoardPortTemplate: Add a template for board
porting.
WhitleyOpenBoardPkg/PlatformInfo: Add board ID vendor range
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Include/Dsc/UbaSingleBoardPei.dsc | 36 +
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Include/Fdf/UbaSingleBoardDxe.fdf | 12 +
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/PlatformPkg.dsc | 40 +
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/PlatformPkg.fdf | 807 ++++++++++++++++++++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.c | 99 +++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.h | 118 +++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.inf | 47 ++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.c | 115 +++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.h | 57 ++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.inf | 47 ++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.c | 127 +++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.h | 27 +
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.inf | 44 ++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/AcpiTablePcds.c | 52 ++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/GpioTable.c | 287 +++++++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/IioBifurInit.c | 246 ++++++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/KtiEparam.c | 68 ++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PcdData.c | 273 +++++++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PchEarlyUpdate.c | 92 +++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PeiBoardInit.h | 77 ++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PeiBoardInitLib.c | 156 ++++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PeiBoardInitLib.inf | 166 ++++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/SlotTable.c | 171 +++++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/SoftStrapFixup.c | 119 +++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/UsbOC.c | 124 +++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/build_board.py | 125 +++
Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/build_config.cfg | 36 +
Platform/Intel/WhitleyOpenBoardPkg/Platform/Pei/PlatformInfo/PlatformInfo.c | 3 +-
Platform/Intel/WhitleyOpenBoardPkg/Readme.md | 124 +++
Silicon/Intel/WhitleySiliconPkg/Include/PlatformInfoTypes.h | 8 +-
30 files changed, 3701 insertions(+), 2 deletions(-) create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Include/Dsc/UbaSingleBoardPei.dsc
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Include/Fdf/UbaSingleBoardDxe.fdf
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/PlatformPkg.dsc
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/PlatformPkg.fdf
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.c
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.h
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.inf
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.c
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.h
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.inf
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.c
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.h
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.inf
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/AcpiTablePcds.c
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/GpioTable.c
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/IioBifurInit.c
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/KtiEparam.c
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PcdData.c
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PchEarlyUpdate.c
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PeiBoardInit.h
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PeiBoardInitLib.c
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PeiBoardInitLib.inf
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/SlotTable.c
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/SoftStrapFixup.c
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/UsbOC.c
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/build_board.py
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/build_config.cfg
create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Readme.md
--
2.27.0.windows.1
next prev parent reply other threads:[~2022-02-08 1:04 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-03 18:17 [edk2-devel][edk2-platforms][PATCH V2 0/2] WhitleyOpenBoardPkg board porting template Oram, Isaac W
2022-02-03 18:17 ` [edk2-devel][edk2-platforms][PATCH V2 1/2] WhitleyOpenBoardPkg/BoardPortTemplate: Add a template for board porting Oram, Isaac W
2022-02-03 18:17 ` [edk2-devel][edk2-platforms][PATCH V2 2/2] WhitleyOpenBoardPkg/PlatformInfo: Add board ID vendor range Oram, Isaac W
2022-02-04 4:43 ` [edk2-devel][edk2-platforms][PATCH V2 0/2] WhitleyOpenBoardPkg board porting template Bu, Daocheng
2022-02-08 1:04 ` Nate DeSimone [this message]
2022-02-08 1:50 ` Oram, Isaac W
-- strict thread matches above, loose matches on Subject: below --
2022-01-25 1:31 Oram, Isaac W
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