* Re: [edk2-devel] [PATCH V2 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package
[not found] <16F67A1A07BB8E8C.19661@groups.io>
@ 2022-06-09 22:27 ` Nate DeSimone
2022-06-09 22:36 ` Nate DeSimone
1 sibling, 0 replies; 2+ messages in thread
From: Nate DeSimone @ 2022-06-09 22:27 UTC (permalink / raw)
To: devel@edk2.groups.io, Desimone, Nathaniel L
Cc: Sinha, Ankit, Chiu, Chasel, Gao, Liming, Dong, Eric,
Kubacki, Michael
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Nate DeSimone
Sent: Tuesday, June 7, 2022 4:23 PM
To: devel@edk2.groups.io
Cc: Sinha, Ankit <ankit.sinha@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>; Gao, Liming <gaoliming@byosoft.com.cn>; Dong, Eric <eric.dong@intel.com>; Kubacki, Michael <michael.kubacki@microsoft.com>
Subject: [edk2-devel] [PATCH V2 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package
From: Ankit Sinha <ankit.sinha@intel.com>
Adds new PCDs to allow entries in FADT to be customized during platform integration. Board packages will can update these PCDs during boot.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Ankit Sinha <ankit.sinha@intel.com>
---
Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 84 ++++++++++++--------
Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf | 23 ++++++
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 43 +++++++---
3 files changed, 106 insertions(+), 44 deletions(-)
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
index 508de9101306..3c9f79de5c6c 100644
--- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
+++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
@@ -1165,6 +1165,11 @@ PlatformUpdateTables (
// Update the creator revision
//
TableHeader->CreatorRevision = PcdGet32(PcdAcpiDefaultCreatorRevision);
+
+ //
+ // Update the oem revision
+ //
+ TableHeader->OemRevision = PcdGet32(PcdAcpiDefaultOemRevision);
}
}
@@ -1187,44 +1192,53 @@ PlatformUpdateTables (
case EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE:
FadtHeader = (EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *) Table;
- FadtHeader->PreferredPmProfile = PcdGet8 (PcdFadtPreferredPmProfile);
- FadtHeader->IaPcBootArch = PcdGet16 (PcdFadtIaPcBootArch);
- FadtHeader->Flags = PcdGet32 (PcdFadtFlags);
+ FadtHeader->PreferredPmProfile = PcdGet8 (PcdFadtPreferredPmProfile);
+ FadtHeader->IaPcBootArch = PcdGet16 (PcdFadtIaPcBootArch);
+ FadtHeader->Flags = PcdGet32 (PcdFadtFlags);
+ FadtHeader->AcpiEnable = PcdGet8 (PcdAcpiEnableSwSmi);
+ FadtHeader->AcpiDisable = PcdGet8 (PcdAcpiDisableSwSmi);
+ FadtHeader->Pm1aEvtBlk = PcdGet16 (PcdAcpiPm1AEventBlockAddress);
+ FadtHeader->Pm1bEvtBlk = PcdGet16 (PcdAcpiPm1BEventBlockAddress);
+ FadtHeader->Pm1aCntBlk = PcdGet16 (PcdAcpiPm1AControlBlockAddress);
+ FadtHeader->Pm1bCntBlk = PcdGet16 (PcdAcpiPm1BControlBlockAddress);
+ FadtHeader->Pm2CntBlk = PcdGet16 (PcdAcpiPm2ControlBlockAddress);
+ FadtHeader->PmTmrBlk = PcdGet16 (PcdAcpiPmTimerBlockAddress);
+ FadtHeader->Gpe0Blk = PcdGet16 (PcdAcpiGpe0BlockAddress);
+ FadtHeader->Gpe0BlkLen = PcdGet8 (PcdAcpiGpe0BlockLength);
+ FadtHeader->Gpe1Blk = PcdGet16 (PcdAcpiGpe1BlockAddress);
+ FadtHeader->Gpe1Base = PcdGet8 (PcdAcpiGpe1Base);
- FadtHeader->AcpiEnable = PcdGet8 (PcdAcpiEnableSwSmi);
- FadtHeader->AcpiDisable = PcdGet8 (PcdAcpiDisableSwSmi);
+ FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress);
+ FadtHeader->XPm1aCntBlk.Address = PcdGet16 (PcdAcpiPm1AControlBlockAddress);
+ FadtHeader->XPm1bCntBlk.Address = PcdGet16 (PcdAcpiPm1BControlBlockAddress);
+ FadtHeader->XPm2CntBlk.Address = PcdGet16 (PcdAcpiPm2ControlBlockAddress);
+ FadtHeader->XPmTmrBlk.Address = PcdGet16 (PcdAcpiPmTimerBlockAddress);
+ FadtHeader->XGpe0Blk.Address = PcdGet16 (PcdAcpiGpe0BlockAddress);
+ FadtHeader->XGpe1Blk.Address = PcdGet16 (PcdAcpiGpe1BlockAddress);
- FadtHeader->Pm1aEvtBlk = PcdGet16 (PcdAcpiPm1AEventBlockAddress);
- FadtHeader->Pm1bEvtBlk = PcdGet16 (PcdAcpiPm1BEventBlockAddress);
- FadtHeader->Pm1aCntBlk = PcdGet16 (PcdAcpiPm1AControlBlockAddress);
- FadtHeader->Pm1bCntBlk = PcdGet16 (PcdAcpiPm1BControlBlockAddress);
- FadtHeader->Pm2CntBlk = PcdGet16 (PcdAcpiPm2ControlBlockAddress);
- FadtHeader->PmTmrBlk = PcdGet16 (PcdAcpiPmTimerBlockAddress);
- FadtHeader->Gpe0Blk = PcdGet16 (PcdAcpiGpe0BlockAddress);
- FadtHeader->Gpe0BlkLen = 0x20;
- FadtHeader->Gpe1Blk = PcdGet16 (PcdAcpiGpe1BlockAddress);
+ FadtHeader->ResetReg.AccessSize = PcdGet8 (PcdAcpiResetRegAccessSize);
+ FadtHeader->XPm1aEvtBlk.AccessSize = PcdGet8 (PcdAcpiXPm1aEvtBlkAccessSize);
+ FadtHeader->XPm1bEvtBlk.AccessSize = PcdGet8 (PcdAcpiXPm1bEvtBlkAccessSize);
+ FadtHeader->XPm1aCntBlk.AccessSize = PcdGet8 (PcdAcpiXPm1aCntBlkAccessSize);
+ FadtHeader->XPm1bCntBlk.AccessSize = PcdGet8 (PcdAcpiXPm1bCntBlkAccessSize);
+ FadtHeader->XPm2CntBlk.AccessSize = PcdGet8 (PcdAcpiXPm2CntBlkAccessSize);
+ FadtHeader->XPmTmrBlk.AccessSize = PcdGet8 (PcdAcpiXPmTmrBlkAccessSize);
+ FadtHeader->XGpe0Blk.AccessSize = PcdGet8 (PcdAcpiXGpe0BlkAccessSize);
+ FadtHeader->XGpe1Blk.AccessSize = PcdGet8 (PcdAcpiXGpe1BlkAccessSize);
- FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress);
- FadtHeader->XPm1bEvtBlk.Address = PcdGet16 (PcdAcpiPm1BEventBlockAddress);
- if (FadtHeader->XPm1bEvtBlk.Address == 0) {
- FadtHeader->XPm1bEvtBlk.AccessSize = 0;
- }
- FadtHeader->XPm1aCntBlk.Address = PcdGet16 (PcdAcpiPm1AControlBlockAddress);
- FadtHeader->XPm1bCntBlk.Address = PcdGet16 (PcdAcpiPm1BControlBlockAddress);
- if (FadtHeader->XPm1bCntBlk.Address == 0) {
- FadtHeader->XPm1bCntBlk.AccessSize = 0;
- }
- FadtHeader->XPm2CntBlk.Address = PcdGet16 (PcdAcpiPm2ControlBlockAddress);
- //if (FadtHeader->XPm2CntBlk.Address == 0) {
- FadtHeader->XPm2CntBlk.AccessSize = 0;
- //}
- FadtHeader->XPmTmrBlk.Address = PcdGet16 (PcdAcpiPmTimerBlockAddress);
- FadtHeader->XGpe0Blk.Address = PcdGet16 (PcdAcpiGpe0BlockAddress);
- FadtHeader->XGpe1Blk.Address = PcdGet16 (PcdAcpiGpe1BlockAddress);
- if (FadtHeader->XGpe1Blk.Address == 0) {
- FadtHeader->XGpe1Blk.AddressSpaceId = 0;
- FadtHeader->XGpe1Blk.AccessSize = 0;
- }
+ FadtHeader->SleepControlReg.AddressSpaceId = PcdGet8 (PcdAcpiSleepControlRegAddressSpaceId);
+ FadtHeader->SleepControlReg.RegisterBitOffset = PcdGet8 (PcdAcpiSleepControlRegRegisterBitOffset);
+ FadtHeader->SleepControlReg.AccessSize = PcdGet8 (PcdAcpiSleepControlRegAccessSize);
+ FadtHeader->SleepControlReg.Address = PcdGet64 (PcdAcpiSleepControlRegAddress);
+ FadtHeader->SleepStatusReg.AddressSpaceId = PcdGet8 (PcdAcpiSleepStatusRegAddressSpaceId);
+ FadtHeader->SleepStatusReg.RegisterBitWidth = PcdGet8 (PcdAcpiSleepStatusRegRegisterBitWidth);
+ FadtHeader->SleepStatusReg.RegisterBitOffset = PcdGet8 (PcdAcpiSleepStatusRegRegisterBitOffset);
+ FadtHeader->SleepStatusReg.AccessSize = PcdGet8 (PcdAcpiSleepStatusRegAccessSize);
+ FadtHeader->SleepStatusReg.Address = PcdGet64 (PcdAcpiSleepStatusRegAddress);
+
+ FadtHeader->S4BiosReq = PcdGet8 (PcdAcpiS4BiosReq);
+ FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress);
+ FadtHeader->XPm1bEvtBlk.Address = PcdGet16 (PcdAcpiPm1BEventBlockAddress);
FadtHeader->DutyOffset = PcdGet8 (PcdFadtDutyOffset);
FadtHeader->DutyWidth = PcdGet8 (PcdFadtDutyWidth); diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
index 59ef5e2e544e..119212d2216b 100644
--- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
+++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
@@ -62,6 +62,7 @@
gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount
gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base
gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch
gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags
gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset
@@ -79,7 +80,29 @@
gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress
gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress
gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength
gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffset
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq
+
gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress
gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress
diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
index 22f371ee1ec8..68ab1d702d6a 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
@@ -115,6 +115,40 @@
gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|0x90000025
gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x90000026
gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x90000027
+
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT
+ 16|0x00010035
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT
+ 16|0x00010036
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x1804|UI
+ NT16|0x0001037
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BControlBlockAddress|0x0000|UI
+ NT16|0x00010038
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress|0x1850|UIN
+ T16|0x00010039
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress|0x1808|UINT16
+ |0x0001003A
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x1880|UINT16|0x
+ 0001003B
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength|0x00|UINT8|0x0001
+ 003C
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT16|0x
+ 0001003D
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base|0x00|UINT8|0x00010040
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize|0x00|UINT8|0x0
+ 0010042
+
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize|0x00|UINT8|
+ 0x00010043
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize|0x00|UINT8|
+ 0x00010044
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize|0x00|UINT8|
+ 0x00010045
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize|0x00|UINT8|
+ 0x00010046
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize|0x00|UINT8|0
+ x00010047
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize|0x00|UINT8|0x
+ 00010048
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize|0x00|UINT8|0x0
+ 0010049
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize|0x00|UINT8|0x0
+ 001004A
+
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId|0x0
+ 0|UINT8|0x0001004B
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth|0
+ x00|UINT8|0x0001004C
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffset|
+ 0x00|UINT8|0x0001004D
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize|0x00|UI
+ NT8|0x0001004E
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress|0x00000000
+ 00000000|UINT64|0x0001004F
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId|0x00
+ |UINT8|0x00010050
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth|0x
+ 00|UINT8|0x00010051
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset|0
+ x00|UINT8|0x00010052
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize|0x00|UIN
+ T8|0x00010053
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress|0x000000000
+ 0000000|UINT64|0x00010054
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq|0x0000|UINT8|0x00010055
+
#
# FADT Duty Offset - The zero-based index of where the processor's duty cycle
# setting is within the processor's P_CNT register.
@@ -260,15 +294,6 @@
gMinPlatformPkgTokenSpaceGuid.PcdPciSegmentCount |0x1 |UINT8|0x4001004E
gMinPlatformPkgTokenSpaceGuid.PcdRandomizePlatformHierarchy |TRUE |BOOLEAN|0x4001004F
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT16|0x00010035
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT16|0x00010036
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x1804|UINT16|0x0001037
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BControlBlockAddress|0x0000|UINT16|0x00010038
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress|0x1850|UINT16|0x00010039
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress|0x1808|UINT16|0x0001003A
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x1880|UINT16|0x0001003B
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT16|0x0001003C
-
gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000|UINT32|0x0010004
gMinPlatformPkgTokenSpaceGuid.PcdFspCpuPeiApWakeupBufferAddr|0x9f000|UINT32|0x30000008
--
2.27.0.windows.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [edk2-devel] [PATCH V2 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package
[not found] <16F67A1A07BB8E8C.19661@groups.io>
2022-06-09 22:27 ` [edk2-devel] [PATCH V2 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package Nate DeSimone
@ 2022-06-09 22:36 ` Nate DeSimone
1 sibling, 0 replies; 2+ messages in thread
From: Nate DeSimone @ 2022-06-09 22:36 UTC (permalink / raw)
To: devel@edk2.groups.io, Desimone, Nathaniel L
Cc: Sinha, Ankit, Chiu, Chasel, Gao, Liming, Dong, Eric,
Kubacki, Michael
Pushed: https://github.com/tianocore/edk2-platforms/commit/f427247
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Nate DeSimone
Sent: Tuesday, June 7, 2022 4:23 PM
To: devel@edk2.groups.io
Cc: Sinha, Ankit <ankit.sinha@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>; Gao, Liming <gaoliming@byosoft.com.cn>; Dong, Eric <eric.dong@intel.com>; Kubacki, Michael <michael.kubacki@microsoft.com>
Subject: [edk2-devel] [PATCH V2 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package
From: Ankit Sinha <ankit.sinha@intel.com>
Adds new PCDs to allow entries in FADT to be customized during platform integration. Board packages will can update these PCDs during boot.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Ankit Sinha <ankit.sinha@intel.com>
---
Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 84 ++++++++++++--------
Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf | 23 ++++++
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 43 +++++++---
3 files changed, 106 insertions(+), 44 deletions(-)
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
index 508de9101306..3c9f79de5c6c 100644
--- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
+++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
@@ -1165,6 +1165,11 @@ PlatformUpdateTables (
// Update the creator revision
//
TableHeader->CreatorRevision = PcdGet32(PcdAcpiDefaultCreatorRevision);
+
+ //
+ // Update the oem revision
+ //
+ TableHeader->OemRevision = PcdGet32(PcdAcpiDefaultOemRevision);
}
}
@@ -1187,44 +1192,53 @@ PlatformUpdateTables (
case EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE:
FadtHeader = (EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *) Table;
- FadtHeader->PreferredPmProfile = PcdGet8 (PcdFadtPreferredPmProfile);
- FadtHeader->IaPcBootArch = PcdGet16 (PcdFadtIaPcBootArch);
- FadtHeader->Flags = PcdGet32 (PcdFadtFlags);
+ FadtHeader->PreferredPmProfile = PcdGet8 (PcdFadtPreferredPmProfile);
+ FadtHeader->IaPcBootArch = PcdGet16 (PcdFadtIaPcBootArch);
+ FadtHeader->Flags = PcdGet32 (PcdFadtFlags);
+ FadtHeader->AcpiEnable = PcdGet8 (PcdAcpiEnableSwSmi);
+ FadtHeader->AcpiDisable = PcdGet8 (PcdAcpiDisableSwSmi);
+ FadtHeader->Pm1aEvtBlk = PcdGet16 (PcdAcpiPm1AEventBlockAddress);
+ FadtHeader->Pm1bEvtBlk = PcdGet16 (PcdAcpiPm1BEventBlockAddress);
+ FadtHeader->Pm1aCntBlk = PcdGet16 (PcdAcpiPm1AControlBlockAddress);
+ FadtHeader->Pm1bCntBlk = PcdGet16 (PcdAcpiPm1BControlBlockAddress);
+ FadtHeader->Pm2CntBlk = PcdGet16 (PcdAcpiPm2ControlBlockAddress);
+ FadtHeader->PmTmrBlk = PcdGet16 (PcdAcpiPmTimerBlockAddress);
+ FadtHeader->Gpe0Blk = PcdGet16 (PcdAcpiGpe0BlockAddress);
+ FadtHeader->Gpe0BlkLen = PcdGet8 (PcdAcpiGpe0BlockLength);
+ FadtHeader->Gpe1Blk = PcdGet16 (PcdAcpiGpe1BlockAddress);
+ FadtHeader->Gpe1Base = PcdGet8 (PcdAcpiGpe1Base);
- FadtHeader->AcpiEnable = PcdGet8 (PcdAcpiEnableSwSmi);
- FadtHeader->AcpiDisable = PcdGet8 (PcdAcpiDisableSwSmi);
+ FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress);
+ FadtHeader->XPm1aCntBlk.Address = PcdGet16 (PcdAcpiPm1AControlBlockAddress);
+ FadtHeader->XPm1bCntBlk.Address = PcdGet16 (PcdAcpiPm1BControlBlockAddress);
+ FadtHeader->XPm2CntBlk.Address = PcdGet16 (PcdAcpiPm2ControlBlockAddress);
+ FadtHeader->XPmTmrBlk.Address = PcdGet16 (PcdAcpiPmTimerBlockAddress);
+ FadtHeader->XGpe0Blk.Address = PcdGet16 (PcdAcpiGpe0BlockAddress);
+ FadtHeader->XGpe1Blk.Address = PcdGet16 (PcdAcpiGpe1BlockAddress);
- FadtHeader->Pm1aEvtBlk = PcdGet16 (PcdAcpiPm1AEventBlockAddress);
- FadtHeader->Pm1bEvtBlk = PcdGet16 (PcdAcpiPm1BEventBlockAddress);
- FadtHeader->Pm1aCntBlk = PcdGet16 (PcdAcpiPm1AControlBlockAddress);
- FadtHeader->Pm1bCntBlk = PcdGet16 (PcdAcpiPm1BControlBlockAddress);
- FadtHeader->Pm2CntBlk = PcdGet16 (PcdAcpiPm2ControlBlockAddress);
- FadtHeader->PmTmrBlk = PcdGet16 (PcdAcpiPmTimerBlockAddress);
- FadtHeader->Gpe0Blk = PcdGet16 (PcdAcpiGpe0BlockAddress);
- FadtHeader->Gpe0BlkLen = 0x20;
- FadtHeader->Gpe1Blk = PcdGet16 (PcdAcpiGpe1BlockAddress);
+ FadtHeader->ResetReg.AccessSize = PcdGet8 (PcdAcpiResetRegAccessSize);
+ FadtHeader->XPm1aEvtBlk.AccessSize = PcdGet8 (PcdAcpiXPm1aEvtBlkAccessSize);
+ FadtHeader->XPm1bEvtBlk.AccessSize = PcdGet8 (PcdAcpiXPm1bEvtBlkAccessSize);
+ FadtHeader->XPm1aCntBlk.AccessSize = PcdGet8 (PcdAcpiXPm1aCntBlkAccessSize);
+ FadtHeader->XPm1bCntBlk.AccessSize = PcdGet8 (PcdAcpiXPm1bCntBlkAccessSize);
+ FadtHeader->XPm2CntBlk.AccessSize = PcdGet8 (PcdAcpiXPm2CntBlkAccessSize);
+ FadtHeader->XPmTmrBlk.AccessSize = PcdGet8 (PcdAcpiXPmTmrBlkAccessSize);
+ FadtHeader->XGpe0Blk.AccessSize = PcdGet8 (PcdAcpiXGpe0BlkAccessSize);
+ FadtHeader->XGpe1Blk.AccessSize = PcdGet8 (PcdAcpiXGpe1BlkAccessSize);
- FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress);
- FadtHeader->XPm1bEvtBlk.Address = PcdGet16 (PcdAcpiPm1BEventBlockAddress);
- if (FadtHeader->XPm1bEvtBlk.Address == 0) {
- FadtHeader->XPm1bEvtBlk.AccessSize = 0;
- }
- FadtHeader->XPm1aCntBlk.Address = PcdGet16 (PcdAcpiPm1AControlBlockAddress);
- FadtHeader->XPm1bCntBlk.Address = PcdGet16 (PcdAcpiPm1BControlBlockAddress);
- if (FadtHeader->XPm1bCntBlk.Address == 0) {
- FadtHeader->XPm1bCntBlk.AccessSize = 0;
- }
- FadtHeader->XPm2CntBlk.Address = PcdGet16 (PcdAcpiPm2ControlBlockAddress);
- //if (FadtHeader->XPm2CntBlk.Address == 0) {
- FadtHeader->XPm2CntBlk.AccessSize = 0;
- //}
- FadtHeader->XPmTmrBlk.Address = PcdGet16 (PcdAcpiPmTimerBlockAddress);
- FadtHeader->XGpe0Blk.Address = PcdGet16 (PcdAcpiGpe0BlockAddress);
- FadtHeader->XGpe1Blk.Address = PcdGet16 (PcdAcpiGpe1BlockAddress);
- if (FadtHeader->XGpe1Blk.Address == 0) {
- FadtHeader->XGpe1Blk.AddressSpaceId = 0;
- FadtHeader->XGpe1Blk.AccessSize = 0;
- }
+ FadtHeader->SleepControlReg.AddressSpaceId = PcdGet8 (PcdAcpiSleepControlRegAddressSpaceId);
+ FadtHeader->SleepControlReg.RegisterBitOffset = PcdGet8 (PcdAcpiSleepControlRegRegisterBitOffset);
+ FadtHeader->SleepControlReg.AccessSize = PcdGet8 (PcdAcpiSleepControlRegAccessSize);
+ FadtHeader->SleepControlReg.Address = PcdGet64 (PcdAcpiSleepControlRegAddress);
+ FadtHeader->SleepStatusReg.AddressSpaceId = PcdGet8 (PcdAcpiSleepStatusRegAddressSpaceId);
+ FadtHeader->SleepStatusReg.RegisterBitWidth = PcdGet8 (PcdAcpiSleepStatusRegRegisterBitWidth);
+ FadtHeader->SleepStatusReg.RegisterBitOffset = PcdGet8 (PcdAcpiSleepStatusRegRegisterBitOffset);
+ FadtHeader->SleepStatusReg.AccessSize = PcdGet8 (PcdAcpiSleepStatusRegAccessSize);
+ FadtHeader->SleepStatusReg.Address = PcdGet64 (PcdAcpiSleepStatusRegAddress);
+
+ FadtHeader->S4BiosReq = PcdGet8 (PcdAcpiS4BiosReq);
+ FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress);
+ FadtHeader->XPm1bEvtBlk.Address = PcdGet16 (PcdAcpiPm1BEventBlockAddress);
FadtHeader->DutyOffset = PcdGet8 (PcdFadtDutyOffset);
FadtHeader->DutyWidth = PcdGet8 (PcdFadtDutyWidth); diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
index 59ef5e2e544e..119212d2216b 100644
--- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
+++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
@@ -62,6 +62,7 @@
gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount
gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base
gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch
gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags
gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset
@@ -79,7 +80,29 @@
gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress
gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress
gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength
gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffset
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq
+
gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress
gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress
diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
index 22f371ee1ec8..68ab1d702d6a 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
@@ -115,6 +115,40 @@
gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|0x90000025
gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x90000026
gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x90000027
+
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT
+ 16|0x00010035
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT
+ 16|0x00010036
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x1804|UI
+ NT16|0x0001037
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BControlBlockAddress|0x0000|UI
+ NT16|0x00010038
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress|0x1850|UIN
+ T16|0x00010039
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress|0x1808|UINT16
+ |0x0001003A
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x1880|UINT16|0x
+ 0001003B
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength|0x00|UINT8|0x0001
+ 003C
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT16|0x
+ 0001003D
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base|0x00|UINT8|0x00010040
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize|0x00|UINT8|0x0
+ 0010042
+
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize|0x00|UINT8|
+ 0x00010043
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize|0x00|UINT8|
+ 0x00010044
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize|0x00|UINT8|
+ 0x00010045
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize|0x00|UINT8|
+ 0x00010046
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize|0x00|UINT8|0
+ x00010047
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize|0x00|UINT8|0x
+ 00010048
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize|0x00|UINT8|0x0
+ 0010049
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize|0x00|UINT8|0x0
+ 001004A
+
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId|0x0
+ 0|UINT8|0x0001004B
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth|0
+ x00|UINT8|0x0001004C
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffset|
+ 0x00|UINT8|0x0001004D
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize|0x00|UI
+ NT8|0x0001004E
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress|0x00000000
+ 00000000|UINT64|0x0001004F
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId|0x00
+ |UINT8|0x00010050
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth|0x
+ 00|UINT8|0x00010051
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset|0
+ x00|UINT8|0x00010052
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize|0x00|UIN
+ T8|0x00010053
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress|0x000000000
+ 0000000|UINT64|0x00010054
+
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq|0x0000|UINT8|0x00010055
+
#
# FADT Duty Offset - The zero-based index of where the processor's duty cycle
# setting is within the processor's P_CNT register.
@@ -260,15 +294,6 @@
gMinPlatformPkgTokenSpaceGuid.PcdPciSegmentCount |0x1 |UINT8|0x4001004E
gMinPlatformPkgTokenSpaceGuid.PcdRandomizePlatformHierarchy |TRUE |BOOLEAN|0x4001004F
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT16|0x00010035
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT16|0x00010036
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x1804|UINT16|0x0001037
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BControlBlockAddress|0x0000|UINT16|0x00010038
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress|0x1850|UINT16|0x00010039
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress|0x1808|UINT16|0x0001003A
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x1880|UINT16|0x0001003B
- gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT16|0x0001003C
-
gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000|UINT32|0x0010004
gMinPlatformPkgTokenSpaceGuid.PcdFspCpuPeiApWakeupBufferAddr|0x9f000|UINT32|0x30000008
--
2.27.0.windows.1
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2022-06-09 22:27 ` [edk2-devel] [PATCH V2 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package Nate DeSimone
2022-06-09 22:36 ` Nate DeSimone
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