From: "Yao, Jiewen" <jiewen.yao@intel.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>,
"abdattar@amd.com" <abdattar@amd.com>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>,
Paul Grimes <paul.grimes@amd.com>,
Abner Chang <abner.chang@amd.com>,
"Dong, Eric" <eric.dong@intel.com>, "Ni, Ray" <ray.ni@intel.com>,
"Kumar, Rahul R" <rahul.r.kumar@intel.com>,
Gerd Hoffmann <kraxel@redhat.com>,
Ard Biesheuvel <ardb+tianocore@kernel.org>,
"Justen, Jordan L" <jordan.l.justen@intel.com>
Subject: Re: [edk2-devel] [PATCH v10 9/9] OvmfPkg: Uses MmSaveStateLib library
Date: Tue, 9 May 2023 15:41:07 +0000 [thread overview]
Message-ID: <MW4PR11MB5872B9E7A4B7484237156B9E8C769@MW4PR11MB5872.namprd11.prod.outlook.com> (raw)
In-Reply-To: <0bf1d18aeedeb3932e9afbb9ff4fa9905b08a7c6.1683182178.git.abdattar@amd.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Abdul
> Lateef Attar via groups.io
> Sent: Thursday, May 4, 2023 2:39 PM
> To: devel@edk2.groups.io
> Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>; Paul Grimes
> <paul.grimes@amd.com>; Abner Chang <abner.chang@amd.com>; Dong,
> Eric <eric.dong@intel.com>; Ni, Ray <ray.ni@intel.com>; Kumar, Rahul R
> <rahul.r.kumar@intel.com>; Gerd Hoffmann <kraxel@redhat.com>; Ard
> Biesheuvel <ardb+tianocore@kernel.org>; Yao, Jiewen
> <jiewen.yao@intel.com>; Justen, Jordan L <jordan.l.justen@intel.com>;
> Abdul Lateef Attar <abdattar@amd.com>
> Subject: [edk2-devel] [PATCH v10 9/9] OvmfPkg: Uses MmSaveStateLib
> library
>
> From: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
>
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182
>
> Uses new MmSaveStateLib library instance.
>
> Cc: Paul Grimes <paul.grimes@amd.com>
> Cc: Abner Chang <abner.chang@amd.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Rahul Kumar <rahul1.kumar@intel.com>
> Cc: Gerd Hoffmann <kraxel@redhat.com>
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Signed-off-by: Abdul Lateef Attar <abdattar@amd.com>
> ---
> OvmfPkg/OvmfPkgIa32.dsc | 1 +
> OvmfPkg/OvmfPkgIa32X64.dsc | 3 +
> OvmfPkg/OvmfPkgX64.dsc | 1 +
> .../SmmCpuFeaturesLib/SmmCpuFeaturesLib.c | 767 ------------------
> 4 files changed, 5 insertions(+), 767 deletions(-)
>
> diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
> index 86177bb94899..cde1ce4b2984 100644
> --- a/OvmfPkg/OvmfPkgIa32.dsc
> +++ b/OvmfPkg/OvmfPkgIa32.dsc
> @@ -977,6 +977,7 @@ [Components]
> <LibraryClasses>
>
> SmmCpuPlatformHookLib|OvmfPkg/Library/SmmCpuPlatformHookLibQemu
> /SmmCpuPlatformHookLibQemu.inf
>
> SmmCpuFeaturesLib|OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeature
> sLib.inf
> +
> MmSaveStateLib|UefiCpuPkg/Library/MmSaveStateLib/OvmfMmSaveStateLi
> b.inf
> }
>
> #
> diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
> index 065b54450647..a5883085257e 100644
> --- a/OvmfPkg/OvmfPkgIa32X64.dsc
> +++ b/OvmfPkg/OvmfPkgIa32X64.dsc
> @@ -4,6 +4,7 @@
> # Copyright (c) 2006 - 2023, Intel Corporation. All rights reserved.<BR>
> # (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
> # Copyright (c) Microsoft Corporation.
> +# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.<BR>
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> @@ -451,6 +452,7 @@ [LibraryClasses.common.DXE_SMM_DRIVER]
> BaseCryptLib|CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf
> PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
>
> SmmCpuRendezvousLib|UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCp
> uRendezvousLib.inf
> +
> MmSaveStateLib|UefiCpuPkg/Library/MmSaveStateLib/OvmfMmSaveStateLi
> b.inf
>
> [LibraryClasses.common.SMM_CORE]
> PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
> @@ -995,6 +997,7 @@ [Components.X64]
> <LibraryClasses>
>
> SmmCpuPlatformHookLib|OvmfPkg/Library/SmmCpuPlatformHookLibQemu
> /SmmCpuPlatformHookLibQemu.inf
>
> SmmCpuFeaturesLib|OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeature
> sLib.inf
> +
> MmSaveStateLib|UefiCpuPkg/Library/MmSaveStateLib/OvmfMmSaveStateLi
> b.inf
> }
>
> #
> diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
> index 3d405cd4ade0..d0f6536d1764 100644
> --- a/OvmfPkg/OvmfPkgX64.dsc
> +++ b/OvmfPkg/OvmfPkgX64.dsc
> @@ -1071,6 +1071,7 @@ [Components]
> <LibraryClasses>
>
> SmmCpuPlatformHookLib|OvmfPkg/Library/SmmCpuPlatformHookLibQemu
> /SmmCpuPlatformHookLibQemu.inf
>
> SmmCpuFeaturesLib|OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeature
> sLib.inf
> +
> MmSaveStateLib|UefiCpuPkg/Library/MmSaveStateLib/OvmfMmSaveStateLi
> b.inf
> }
>
> #
> diff --git a/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
> b/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
> index a009123dae88..4c354bafe42f 100644
> --- a/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
> +++ b/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
> @@ -578,773 +578,6 @@ SmmCpuFeaturesSetSmmRegister (
> ASSERT (FALSE);
> }
>
> -///
> -/// Macro used to simplify the lookup table entries of type
> -/// CPU_SMM_SAVE_STATE_LOOKUP_ENTRY
> -///
> -#define SMM_CPU_OFFSET(Field) OFFSET_OF
> (QEMU_SMRAM_SAVE_STATE_MAP, Field)
> -
> -///
> -/// Macro used to simplify the lookup table entries of type
> -/// CPU_SMM_SAVE_STATE_REGISTER_RANGE
> -///
> -#define SMM_REGISTER_RANGE(Start, End) { Start, End, End - Start + 1 }
> -
> -///
> -/// Structure used to describe a range of registers
> -///
> -typedef struct {
> - EFI_SMM_SAVE_STATE_REGISTER Start;
> - EFI_SMM_SAVE_STATE_REGISTER End;
> - UINTN Length;
> -} CPU_SMM_SAVE_STATE_REGISTER_RANGE;
> -
> -///
> -/// Structure used to build a lookup table to retrieve the widths and offsets
> -/// associated with each supported EFI_SMM_SAVE_STATE_REGISTER value
> -///
> -
> -#define SMM_SAVE_STATE_REGISTER_FIRST_INDEX 1
> -
> -typedef struct {
> - UINT8 Width32;
> - UINT8 Width64;
> - UINT16 Offset32;
> - UINT16 Offset64Lo;
> - UINT16 Offset64Hi;
> - BOOLEAN Writeable;
> -} CPU_SMM_SAVE_STATE_LOOKUP_ENTRY;
> -
> -///
> -/// Table used by GetRegisterIndex() to convert an
> EFI_SMM_SAVE_STATE_REGISTER
> -/// value to an index into a table of type
> CPU_SMM_SAVE_STATE_LOOKUP_ENTRY
> -///
> -STATIC CONST CPU_SMM_SAVE_STATE_REGISTER_RANGE
> mSmmCpuRegisterRanges[] = {
> - SMM_REGISTER_RANGE (
> - EFI_SMM_SAVE_STATE_REGISTER_GDTBASE,
> - EFI_SMM_SAVE_STATE_REGISTER_LDTINFO
> - ),
> - SMM_REGISTER_RANGE (
> - EFI_SMM_SAVE_STATE_REGISTER_ES,
> - EFI_SMM_SAVE_STATE_REGISTER_RIP
> - ),
> - SMM_REGISTER_RANGE (
> - EFI_SMM_SAVE_STATE_REGISTER_RFLAGS,
> - EFI_SMM_SAVE_STATE_REGISTER_CR4
> - ),
> - { (EFI_SMM_SAVE_STATE_REGISTER)0,
> (EFI_SMM_SAVE_STATE_REGISTER)0,0 }
> -};
> -
> -///
> -/// Lookup table used to retrieve the widths and offsets associated with
> each
> -/// supported EFI_SMM_SAVE_STATE_REGISTER value
> -///
> -STATIC CONST CPU_SMM_SAVE_STATE_LOOKUP_ENTRY
> mSmmCpuWidthOffset[] = {
> - {
> - 0, // Width32
> - 0, // Width64
> - 0, // Offset32
> - 0, // Offset64Lo
> - 0, // Offset64Hi
> - FALSE // Writeable
> - }, // Reserved
> -
> - //
> - // CPU Save State registers defined in PI SMM CPU Protocol.
> - //
> - {
> - 0, // Width32
> - 8, // Width64
> - 0, // Offset32
> - SMM_CPU_OFFSET (x64._GDTRBase), // Offset64Lo
> - SMM_CPU_OFFSET (x64._GDTRBase) + 4, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_GDTBASE = 4
> -
> - {
> - 0, // Width32
> - 8, // Width64
> - 0, // Offset32
> - SMM_CPU_OFFSET (x64._IDTRBase), // Offset64Lo
> - SMM_CPU_OFFSET (x64._IDTRBase) + 4, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_IDTBASE = 5
> -
> - {
> - 0, // Width32
> - 8, // Width64
> - 0, // Offset32
> - SMM_CPU_OFFSET (x64._LDTRBase), // Offset64Lo
> - SMM_CPU_OFFSET (x64._LDTRBase) + 4, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_LDTBASE = 6
> -
> - {
> - 0, // Width32
> - 0, // Width64
> - 0, // Offset32
> - SMM_CPU_OFFSET (x64._GDTRLimit), // Offset64Lo
> - SMM_CPU_OFFSET (x64._GDTRLimit) + 4, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_GDTLIMIT = 7
> -
> - {
> - 0, // Width32
> - 0, // Width64
> - 0, // Offset32
> - SMM_CPU_OFFSET (x64._IDTRLimit), // Offset64Lo
> - SMM_CPU_OFFSET (x64._IDTRLimit) + 4, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_IDTLIMIT = 8
> -
> - {
> - 0, // Width32
> - 0, // Width64
> - 0, // Offset32
> - SMM_CPU_OFFSET (x64._LDTRLimit), // Offset64Lo
> - SMM_CPU_OFFSET (x64._LDTRLimit) + 4, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_LDTLIMIT = 9
> -
> - {
> - 0, // Width32
> - 0, // Width64
> - 0, // Offset32
> - 0, // Offset64Lo
> - 0 + 4, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_LDTINFO = 10
> -
> - {
> - 4, // Width32
> - 4, // Width64
> - SMM_CPU_OFFSET (x86._ES), // Offset32
> - SMM_CPU_OFFSET (x64._ES), // Offset64Lo
> - 0, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_ES = 20
> -
> - {
> - 4, // Width32
> - 4, // Width64
> - SMM_CPU_OFFSET (x86._CS), // Offset32
> - SMM_CPU_OFFSET (x64._CS), // Offset64Lo
> - 0, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_CS = 21
> -
> - {
> - 4, // Width32
> - 4, // Width64
> - SMM_CPU_OFFSET (x86._SS), // Offset32
> - SMM_CPU_OFFSET (x64._SS), // Offset64Lo
> - 0, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_SS = 22
> -
> - {
> - 4, // Width32
> - 4, // Width64
> - SMM_CPU_OFFSET (x86._DS), // Offset32
> - SMM_CPU_OFFSET (x64._DS), // Offset64Lo
> - 0, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_DS = 23
> -
> - {
> - 4, // Width32
> - 4, // Width64
> - SMM_CPU_OFFSET (x86._FS), // Offset32
> - SMM_CPU_OFFSET (x64._FS), // Offset64Lo
> - 0, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_FS = 24
> -
> - {
> - 4, // Width32
> - 4, // Width64
> - SMM_CPU_OFFSET (x86._GS), // Offset32
> - SMM_CPU_OFFSET (x64._GS), // Offset64Lo
> - 0, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_GS = 25
> -
> - {
> - 0, // Width32
> - 4, // Width64
> - 0, // Offset32
> - SMM_CPU_OFFSET (x64._LDTR), // Offset64Lo
> - 0, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_LDTR_SEL = 26
> -
> - {
> - 4, // Width32
> - 4, // Width64
> - SMM_CPU_OFFSET (x86._TR), // Offset32
> - SMM_CPU_OFFSET (x64._TR), // Offset64Lo
> - 0, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_TR_SEL = 27
> -
> - {
> - 4, // Width32
> - 8, // Width64
> - SMM_CPU_OFFSET (x86._DR7), // Offset32
> - SMM_CPU_OFFSET (x64._DR7), // Offset64Lo
> - SMM_CPU_OFFSET (x64._DR7) + 4, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_DR7 = 28
> -
> - {
> - 4, // Width32
> - 8, // Width64
> - SMM_CPU_OFFSET (x86._DR6), // Offset32
> - SMM_CPU_OFFSET (x64._DR6), // Offset64Lo
> - SMM_CPU_OFFSET (x64._DR6) + 4, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_DR6 = 29
> -
> - {
> - 0, // Width32
> - 8, // Width64
> - 0, // Offset32
> - SMM_CPU_OFFSET (x64._R8), // Offset64Lo
> - SMM_CPU_OFFSET (x64._R8) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_R8 = 30
> -
> - {
> - 0, // Width32
> - 8, // Width64
> - 0, // Offset32
> - SMM_CPU_OFFSET (x64._R9), // Offset64Lo
> - SMM_CPU_OFFSET (x64._R9) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_R9 = 31
> -
> - {
> - 0, // Width32
> - 8, // Width64
> - 0, // Offset32
> - SMM_CPU_OFFSET (x64._R10), // Offset64Lo
> - SMM_CPU_OFFSET (x64._R10) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_R10 = 32
> -
> - {
> - 0, // Width32
> - 8, // Width64
> - 0, // Offset32
> - SMM_CPU_OFFSET (x64._R11), // Offset64Lo
> - SMM_CPU_OFFSET (x64._R11) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_R11 = 33
> -
> - {
> - 0, // Width32
> - 8, // Width64
> - 0, // Offset32
> - SMM_CPU_OFFSET (x64._R12), // Offset64Lo
> - SMM_CPU_OFFSET (x64._R12) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_R12 = 34
> -
> - {
> - 0, // Width32
> - 8, // Width64
> - 0, // Offset32
> - SMM_CPU_OFFSET (x64._R13), // Offset64Lo
> - SMM_CPU_OFFSET (x64._R13) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_R13 = 35
> -
> - {
> - 0, // Width32
> - 8, // Width64
> - 0, // Offset32
> - SMM_CPU_OFFSET (x64._R14), // Offset64Lo
> - SMM_CPU_OFFSET (x64._R14) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_R14 = 36
> -
> - {
> - 0, // Width32
> - 8, // Width64
> - 0, // Offset32
> - SMM_CPU_OFFSET (x64._R15), // Offset64Lo
> - SMM_CPU_OFFSET (x64._R15) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_R15 = 37
> -
> - {
> - 4, // Width32
> - 8, // Width64
> - SMM_CPU_OFFSET (x86._EAX), // Offset32
> - SMM_CPU_OFFSET (x64._RAX), // Offset64Lo
> - SMM_CPU_OFFSET (x64._RAX) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_RAX = 38
> -
> - {
> - 4, // Width32
> - 8, // Width64
> - SMM_CPU_OFFSET (x86._EBX), // Offset32
> - SMM_CPU_OFFSET (x64._RBX), // Offset64Lo
> - SMM_CPU_OFFSET (x64._RBX) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_RBX = 39
> -
> - {
> - 4, // Width32
> - 8, // Width64
> - SMM_CPU_OFFSET (x86._ECX), // Offset32
> - SMM_CPU_OFFSET (x64._RCX), // Offset64Lo
> - SMM_CPU_OFFSET (x64._RCX) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_RCX = 40
> -
> - {
> - 4, // Width32
> - 8, // Width64
> - SMM_CPU_OFFSET (x86._EDX), // Offset32
> - SMM_CPU_OFFSET (x64._RDX), // Offset64Lo
> - SMM_CPU_OFFSET (x64._RDX) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_RDX = 41
> -
> - {
> - 4, // Width32
> - 8, // Width64
> - SMM_CPU_OFFSET (x86._ESP), // Offset32
> - SMM_CPU_OFFSET (x64._RSP), // Offset64Lo
> - SMM_CPU_OFFSET (x64._RSP) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_RSP = 42
> -
> - {
> - 4, // Width32
> - 8, // Width64
> - SMM_CPU_OFFSET (x86._EBP), // Offset32
> - SMM_CPU_OFFSET (x64._RBP), // Offset64Lo
> - SMM_CPU_OFFSET (x64._RBP) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_RBP = 43
> -
> - {
> - 4, // Width32
> - 8, // Width64
> - SMM_CPU_OFFSET (x86._ESI), // Offset32
> - SMM_CPU_OFFSET (x64._RSI), // Offset64Lo
> - SMM_CPU_OFFSET (x64._RSI) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_RSI = 44
> -
> - {
> - 4, // Width32
> - 8, // Width64
> - SMM_CPU_OFFSET (x86._EDI), // Offset32
> - SMM_CPU_OFFSET (x64._RDI), // Offset64Lo
> - SMM_CPU_OFFSET (x64._RDI) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_RDI = 45
> -
> - {
> - 4, // Width32
> - 8, // Width64
> - SMM_CPU_OFFSET (x86._EIP), // Offset32
> - SMM_CPU_OFFSET (x64._RIP), // Offset64Lo
> - SMM_CPU_OFFSET (x64._RIP) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_RIP = 46
> -
> - {
> - 4, // Width32
> - 8, // Width64
> - SMM_CPU_OFFSET (x86._EFLAGS), // Offset32
> - SMM_CPU_OFFSET (x64._RFLAGS), // Offset64Lo
> - SMM_CPU_OFFSET (x64._RFLAGS) + 4, // Offset64Hi
> - TRUE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_RFLAGS = 51
> -
> - {
> - 4, // Width32
> - 8, // Width64
> - SMM_CPU_OFFSET (x86._CR0), // Offset32
> - SMM_CPU_OFFSET (x64._CR0), // Offset64Lo
> - SMM_CPU_OFFSET (x64._CR0) + 4, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_CR0 = 52
> -
> - {
> - 4, // Width32
> - 8, // Width64
> - SMM_CPU_OFFSET (x86._CR3), // Offset32
> - SMM_CPU_OFFSET (x64._CR3), // Offset64Lo
> - SMM_CPU_OFFSET (x64._CR3) + 4, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_CR3 = 53
> -
> - {
> - 0, // Width32
> - 4, // Width64
> - 0, // Offset32
> - SMM_CPU_OFFSET (x64._CR4), // Offset64Lo
> - SMM_CPU_OFFSET (x64._CR4) + 4, // Offset64Hi
> - FALSE // Writeable
> - }, // EFI_SMM_SAVE_STATE_REGISTER_CR4 = 54
> -};
> -
> -//
> -// No support for I/O restart
> -//
> -
> -/**
> - Read information from the CPU save state.
> -
> - @param Register Specifies the CPU register to read form the save state.
> -
> - @retval 0 Register is not valid
> - @retval >0 Index into mSmmCpuWidthOffset[] associated with Register
> -
> -**/
> -STATIC
> -UINTN
> -GetRegisterIndex (
> - IN EFI_SMM_SAVE_STATE_REGISTER Register
> - )
> -{
> - UINTN Index;
> - UINTN Offset;
> -
> - for (Index = 0, Offset = SMM_SAVE_STATE_REGISTER_FIRST_INDEX;
> - mSmmCpuRegisterRanges[Index].Length != 0;
> - Index++)
> - {
> - if ((Register >= mSmmCpuRegisterRanges[Index].Start) &&
> - (Register <= mSmmCpuRegisterRanges[Index].End))
> - {
> - return Register - mSmmCpuRegisterRanges[Index].Start + Offset;
> - }
> -
> - Offset += mSmmCpuRegisterRanges[Index].Length;
> - }
> -
> - return 0;
> -}
> -
> -/**
> - Read a CPU Save State register on the target processor.
> -
> - This function abstracts the differences that whether the CPU Save State
> - register is in the IA32 CPU Save State Map or X64 CPU Save State Map.
> -
> - This function supports reading a CPU Save State register in SMBase
> relocation
> - handler.
> -
> - @param[in] CpuIndex Specifies the zero-based index of the CPU save
> - state.
> - @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up
> table.
> - @param[in] Width The number of bytes to read from the CPU save
> - state.
> - @param[out] Buffer Upon return, this holds the CPU register value
> - read from the save state.
> -
> - @retval EFI_SUCCESS The register was read from Save State.
> - @retval EFI_NOT_FOUND The register is not defined for the Save
> State
> - of Processor.
> - @retval EFI_INVALID_PARAMTER This or Buffer is NULL.
> -
> -**/
> -STATIC
> -EFI_STATUS
> -ReadSaveStateRegisterByIndex (
> - IN UINTN CpuIndex,
> - IN UINTN RegisterIndex,
> - IN UINTN Width,
> - OUT VOID *Buffer
> - )
> -{
> - QEMU_SMRAM_SAVE_STATE_MAP *CpuSaveState;
> -
> - CpuSaveState = (QEMU_SMRAM_SAVE_STATE_MAP *)gSmst-
> >CpuSaveState[CpuIndex];
> -
> - if ((CpuSaveState->x86.SMMRevId & 0xFFFF) == 0) {
> - //
> - // If 32-bit mode width is zero, then the specified register can not be
> - // accessed
> - //
> - if (mSmmCpuWidthOffset[RegisterIndex].Width32 == 0) {
> - return EFI_NOT_FOUND;
> - }
> -
> - //
> - // If Width is bigger than the 32-bit mode width, then the specified
> - // register can not be accessed
> - //
> - if (Width > mSmmCpuWidthOffset[RegisterIndex].Width32) {
> - return EFI_INVALID_PARAMETER;
> - }
> -
> - //
> - // Write return buffer
> - //
> - ASSERT (CpuSaveState != NULL);
> - CopyMem (
> - Buffer,
> - (UINT8 *)CpuSaveState +
> mSmmCpuWidthOffset[RegisterIndex].Offset32,
> - Width
> - );
> - } else {
> - //
> - // If 64-bit mode width is zero, then the specified register can not be
> - // accessed
> - //
> - if (mSmmCpuWidthOffset[RegisterIndex].Width64 == 0) {
> - return EFI_NOT_FOUND;
> - }
> -
> - //
> - // If Width is bigger than the 64-bit mode width, then the specified
> - // register can not be accessed
> - //
> - if (Width > mSmmCpuWidthOffset[RegisterIndex].Width64) {
> - return EFI_INVALID_PARAMETER;
> - }
> -
> - //
> - // Write lower 32-bits of return buffer
> - //
> - CopyMem (
> - Buffer,
> - (UINT8 *)CpuSaveState +
> mSmmCpuWidthOffset[RegisterIndex].Offset64Lo,
> - MIN (4, Width)
> - );
> - if (Width >= 4) {
> - //
> - // Write upper 32-bits of return buffer
> - //
> - CopyMem (
> - (UINT8 *)Buffer + 4,
> - (UINT8 *)CpuSaveState +
> mSmmCpuWidthOffset[RegisterIndex].Offset64Hi,
> - Width - 4
> - );
> - }
> - }
> -
> - return EFI_SUCCESS;
> -}
> -
> -/**
> - Read an SMM Save State register on the target processor. If this function
> - returns EFI_UNSUPPORTED, then the caller is responsible for reading the
> - SMM Save Sate register.
> -
> - @param[in] CpuIndex The index of the CPU to read the SMM Save State.
> The
> - value must be between 0 and the NumberOfCpus field in
> - the System Management System Table (SMST).
> - @param[in] Register The SMM Save State register to read.
> - @param[in] Width The number of bytes to read from the CPU save state.
> - @param[out] Buffer Upon return, this holds the CPU register value read
> - from the save state.
> -
> - @retval EFI_SUCCESS The register was read from Save State.
> - @retval EFI_INVALID_PARAMTER Buffer is NULL.
> - @retval EFI_UNSUPPORTED This function does not support reading
> - Register.
> -**/
> -EFI_STATUS
> -EFIAPI
> -SmmCpuFeaturesReadSaveStateRegister (
> - IN UINTN CpuIndex,
> - IN EFI_SMM_SAVE_STATE_REGISTER Register,
> - IN UINTN Width,
> - OUT VOID *Buffer
> - )
> -{
> - UINTN RegisterIndex;
> - QEMU_SMRAM_SAVE_STATE_MAP *CpuSaveState;
> -
> - //
> - // Check for special EFI_SMM_SAVE_STATE_REGISTER_LMA
> - //
> - if (Register == EFI_SMM_SAVE_STATE_REGISTER_LMA) {
> - //
> - // Only byte access is supported for this register
> - //
> - if (Width != 1) {
> - return EFI_INVALID_PARAMETER;
> - }
> -
> - CpuSaveState = (QEMU_SMRAM_SAVE_STATE_MAP *)gSmst-
> >CpuSaveState[CpuIndex];
> -
> - //
> - // Check CPU mode
> - //
> - if ((CpuSaveState->x86.SMMRevId & 0xFFFF) == 0) {
> - *(UINT8 *)Buffer = 32;
> - } else {
> - *(UINT8 *)Buffer = 64;
> - }
> -
> - return EFI_SUCCESS;
> - }
> -
> - //
> - // Check for special EFI_SMM_SAVE_STATE_REGISTER_IO
> - //
> - if (Register == EFI_SMM_SAVE_STATE_REGISTER_IO) {
> - return EFI_NOT_FOUND;
> - }
> -
> - //
> - // Convert Register to a register lookup table index. Let
> - // PiSmmCpuDxeSmm implement other special registers (currently
> - // there is only EFI_SMM_SAVE_STATE_REGISTER_PROCESSOR_ID).
> - //
> - RegisterIndex = GetRegisterIndex (Register);
> - if (RegisterIndex == 0) {
> - return (Register < EFI_SMM_SAVE_STATE_REGISTER_IO ?
> - EFI_NOT_FOUND :
> - EFI_UNSUPPORTED);
> - }
> -
> - return ReadSaveStateRegisterByIndex (CpuIndex, RegisterIndex, Width,
> Buffer);
> -}
> -
> -/**
> - Writes an SMM Save State register on the target processor. If this function
> - returns EFI_UNSUPPORTED, then the caller is responsible for writing the
> - SMM Save Sate register.
> -
> - @param[in] CpuIndex The index of the CPU to write the SMM Save State.
> The
> - value must be between 0 and the NumberOfCpus field in
> - the System Management System Table (SMST).
> - @param[in] Register The SMM Save State register to write.
> - @param[in] Width The number of bytes to write to the CPU save state.
> - @param[in] Buffer Upon entry, this holds the new CPU register value.
> -
> - @retval EFI_SUCCESS The register was written to Save State.
> - @retval EFI_INVALID_PARAMTER Buffer is NULL.
> - @retval EFI_UNSUPPORTED This function does not support writing
> - Register.
> -**/
> -EFI_STATUS
> -EFIAPI
> -SmmCpuFeaturesWriteSaveStateRegister (
> - IN UINTN CpuIndex,
> - IN EFI_SMM_SAVE_STATE_REGISTER Register,
> - IN UINTN Width,
> - IN CONST VOID *Buffer
> - )
> -{
> - UINTN RegisterIndex;
> - QEMU_SMRAM_SAVE_STATE_MAP *CpuSaveState;
> -
> - //
> - // Writes to EFI_SMM_SAVE_STATE_REGISTER_LMA are ignored
> - //
> - if (Register == EFI_SMM_SAVE_STATE_REGISTER_LMA) {
> - return EFI_SUCCESS;
> - }
> -
> - //
> - // Writes to EFI_SMM_SAVE_STATE_REGISTER_IO are not supported
> - //
> - if (Register == EFI_SMM_SAVE_STATE_REGISTER_IO) {
> - return EFI_NOT_FOUND;
> - }
> -
> - //
> - // Convert Register to a register lookup table index. Let
> - // PiSmmCpuDxeSmm implement other special registers (currently
> - // there is only EFI_SMM_SAVE_STATE_REGISTER_PROCESSOR_ID).
> - //
> - RegisterIndex = GetRegisterIndex (Register);
> - if (RegisterIndex == 0) {
> - return (Register < EFI_SMM_SAVE_STATE_REGISTER_IO ?
> - EFI_NOT_FOUND :
> - EFI_UNSUPPORTED);
> - }
> -
> - CpuSaveState = (QEMU_SMRAM_SAVE_STATE_MAP *)gSmst-
> >CpuSaveState[CpuIndex];
> -
> - //
> - // Do not write non-writable SaveState, because it will cause exception.
> - //
> - if (!mSmmCpuWidthOffset[RegisterIndex].Writeable) {
> - return EFI_UNSUPPORTED;
> - }
> -
> - //
> - // Check CPU mode
> - //
> - if ((CpuSaveState->x86.SMMRevId & 0xFFFF) == 0) {
> - //
> - // If 32-bit mode width is zero, then the specified register can not be
> - // accessed
> - //
> - if (mSmmCpuWidthOffset[RegisterIndex].Width32 == 0) {
> - return EFI_NOT_FOUND;
> - }
> -
> - //
> - // If Width is bigger than the 32-bit mode width, then the specified
> - // register can not be accessed
> - //
> - if (Width > mSmmCpuWidthOffset[RegisterIndex].Width32) {
> - return EFI_INVALID_PARAMETER;
> - }
> -
> - //
> - // Write SMM State register
> - //
> - ASSERT (CpuSaveState != NULL);
> - CopyMem (
> - (UINT8 *)CpuSaveState +
> mSmmCpuWidthOffset[RegisterIndex].Offset32,
> - Buffer,
> - Width
> - );
> - } else {
> - //
> - // If 64-bit mode width is zero, then the specified register can not be
> - // accessed
> - //
> - if (mSmmCpuWidthOffset[RegisterIndex].Width64 == 0) {
> - return EFI_NOT_FOUND;
> - }
> -
> - //
> - // If Width is bigger than the 64-bit mode width, then the specified
> - // register can not be accessed
> - //
> - if (Width > mSmmCpuWidthOffset[RegisterIndex].Width64) {
> - return EFI_INVALID_PARAMETER;
> - }
> -
> - //
> - // Write lower 32-bits of SMM State register
> - //
> - CopyMem (
> - (UINT8 *)CpuSaveState +
> mSmmCpuWidthOffset[RegisterIndex].Offset64Lo,
> - Buffer,
> - MIN (4, Width)
> - );
> - if (Width >= 4) {
> - //
> - // Write upper 32-bits of SMM State register
> - //
> - CopyMem (
> - (UINT8 *)CpuSaveState +
> mSmmCpuWidthOffset[RegisterIndex].Offset64Hi,
> - (UINT8 *)Buffer + 4,
> - Width - 4
> - );
> - }
> - }
> -
> - return EFI_SUCCESS;
> -}
> -
> /**
> This function is hook point called after the
> gEfiSmmReadyToLockProtocolGuid
> notification is completely processed.
> --
> 2.25.1
>
>
>
>
>
prev parent reply other threads:[~2023-05-09 15:41 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-04 6:39 [PATCH v10 0/9] Adds AmdSmmCpuFeaturesLib and MmSaveStateLib Abdul Lateef Attar
2023-05-04 6:39 ` [PATCH v10 1/9] MdePkg: Adds AMD SMRAM save state map Abdul Lateef Attar
2023-05-04 6:39 ` [PATCH v10 2/9] UefiCpuPkg: Adds MmSaveStateLib library class Abdul Lateef Attar
2023-05-04 6:39 ` [PATCH v10 3/9] UefiCpuPkg: Implements MmSaveStateLib library instance Abdul Lateef Attar
2023-05-04 6:39 ` [PATCH v10 4/9] UefiCpuPkg/SmmCpuFeaturesLib: Restructure arch-dependent code Abdul Lateef Attar
2023-05-04 6:39 ` [PATCH v10 5/9] UefiCpuPkg: Implements SmmCpuFeaturesLib for AMD Family Abdul Lateef Attar
2023-05-04 8:33 ` Chang, Abner
2023-05-04 6:39 ` [PATCH v10 6/9] UefiCpuPkg: Implements MmSaveStateLib for Intel Abdul Lateef Attar
2023-05-04 6:39 ` [PATCH v10 7/9] UefiCpuPkg: Implements MmSaveStateLib for Ovmf Abdul Lateef Attar
2023-05-04 8:43 ` Gerd Hoffmann
2023-05-05 6:47 ` Attar, AbdulLateef (Abdul Lateef)
2023-05-04 6:39 ` [PATCH v10 8/9] UefiCpuPkg: Removes SmmCpuFeaturesReadSaveStateRegister Abdul Lateef Attar
2023-05-04 6:39 ` [PATCH v10 9/9] OvmfPkg: Uses MmSaveStateLib library Abdul Lateef Attar
2023-05-09 15:41 ` Yao, Jiewen [this message]
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