From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web10.8552.1664266919726588359 for ; Tue, 27 Sep 2022 01:22:00 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=j1cNneqp; spf=pass (domain: intel.com, ip: 134.134.136.20, mailfrom: jiewen.yao@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664266919; x=1695802919; h=from:to:cc:subject:date:message-id:references: in-reply-to:content-transfer-encoding:mime-version; bh=BUzWQOy0N+lIk8Mj9ppo1m9a2ZZXFDFgDRtp59Ju1bQ=; b=j1cNneqpmCCWpN4HiwS4/2tTdfLHTeAycmSI4PIRXU4JJosYbPsmzjYS 9TveNgTmzpbMCQ2MgtheM1AGT9HrnrEQbVKtE0wbHuv2mlanMTkMu+yzE rZO8ezSNo4QdV5NuqOpMnsZtD7/+G8AEQO42DoFsDAJ4xeK8ZXtnGef/b JtG8nRrAOi0PpCXqE41T2EIux3pJeFi8d5JaqV/rtlWbN9NAomAycjv7e OtSIjCKBnJyObb5cHwQcZ61yQ6D22pcJkNP1zRfFUOFPecZXM9TRh5ARe BhcV8UM4lbCT8dvv2061a3xB7CV7z0/KE4eaEzHGLGwhOzn8vrWCXtWxr Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10482"; a="288406243" X-IronPort-AV: E=Sophos;i="5.93,348,1654585200"; d="scan'208";a="288406243" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Sep 2022 01:21:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10482"; a="796688251" X-IronPort-AV: E=Sophos;i="5.93,348,1654585200"; d="scan'208";a="796688251" Received: from fmsmsx603.amr.corp.intel.com ([10.18.126.83]) by orsmga005.jf.intel.com with ESMTP; 27 Sep 2022 01:21:56 -0700 Received: from fmsmsx608.amr.corp.intel.com (10.18.126.88) by fmsmsx603.amr.corp.intel.com (10.18.126.83) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.31; Tue, 27 Sep 2022 01:21:55 -0700 Received: from fmsmsx608.amr.corp.intel.com (10.18.126.88) by fmsmsx608.amr.corp.intel.com (10.18.126.88) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.31; Tue, 27 Sep 2022 01:21:55 -0700 Received: from fmsedg601.ED.cps.intel.com (10.1.192.135) by fmsmsx608.amr.corp.intel.com (10.18.126.88) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.31 via Frontend Transport; Tue, 27 Sep 2022 01:21:55 -0700 Received: from NAM11-DM6-obe.outbound.protection.outlook.com (104.47.57.169) by edgegateway.intel.com (192.55.55.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2375.31; Tue, 27 Sep 2022 01:21:55 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=A8y38yfUriPs8F7w2Frnvug5ZELntoV29wNABC6i71dC+UTOktSBRFwOKtHs95BeY2d4wnb8EjzRQ5cJmw4w/ZySfbM9FQ8q73uC2srhUo9dUBOirs9K0EaZvA41qMYNqSrrWDFNQZ/K6SylbTrsuuIHkf+js+o3G3X3fOHvCCNStpItqvYLo+rnwn9nkwN1d8YjQFUhZvN+4KoAZ5zwkSWSP/wq5NmaucqL0NftSngNb1Pwo8f2lNRSsq8SyeZfD2Fo6+tevWSNUbhwva+N6foce5N159lh5WPa861A0smInqKyyBSXSlLQzuyU5AZPiwOxr7Wd/zzbps6WdSxE4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=HFf1KYgh64AuZKAeStcRSdRvif5/aMKXtSHJpOY0cNI=; b=fx4LW2G4Cr4ZSO9JHZtzDI/T7PO95tjp0xQgVF8HthLCtU0jun/ozBpv8ATFpsHMzmzSjnglV4JrloBs+03V7hHaNmT747o/AeTwDVD8X1W5VWiNenyqYKiJBPG5mNhxzrEUOy2si2wCWnbaFIpWTLH8DlImtdvfOYvKhC85Sm4zRWEIVnMpys18vxm5FRb+ap8VBy6eg5LN9CCIqPrmNZ9trZNVTHxFPgXPBcLldK2OnsrM5e4tnpGFUwQBPVxwFzYsEcPys2tw1zxdbYZmvtMPSj3rr9roQyqcgbr7gEzD8dklmCoMPMxpw4RF8+5GAUlZA6uv3t4KkkZuNKPmxA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Received: from MW4PR11MB5872.namprd11.prod.outlook.com (2603:10b6:303:169::14) by DM4PR11MB5310.namprd11.prod.outlook.com (2603:10b6:5:391::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5654.26; Tue, 27 Sep 2022 08:21:52 +0000 Received: from MW4PR11MB5872.namprd11.prod.outlook.com ([fe80::c17d:f1c9:e958:b5e]) by MW4PR11MB5872.namprd11.prod.outlook.com ([fe80::c17d:f1c9:e958:b5e%6]) with mapi id 15.20.5654.025; Tue, 27 Sep 2022 08:21:52 +0000 From: "Yao, Jiewen" To: "Xu, Min M" , "devel@edk2.groups.io" CC: "Aktas, Erdem" , Gerd Hoffmann , James Bottomley Subject: Re: [PATCH V2 1/1] OvmfPkg/PeilessStartupLib: move mPageTablePool to stack Thread-Topic: [PATCH V2 1/1] OvmfPkg/PeilessStartupLib: move mPageTablePool to stack Thread-Index: AQHY0j/pmUaOjUn78UGKA6Bxv3y5x63y789g Date: Tue, 27 Sep 2022 08:21:52 +0000 Message-ID: References: <20220927070753.470-1-min.m.xu@intel.com> In-Reply-To: <20220927070753.470-1-min.m.xu@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-version: 11.6.500.17 dlp-product: dlpe-windows dlp-reaction: no-action authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: MW4PR11MB5872:EE_|DM4PR11MB5310:EE_ x-ms-office365-filtering-correlation-id: b2fab6f7-044d-4beb-9daf-08daa0615522 x-ld-processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: OcuON+x4AfNJAQPkwpFf92Yg93KOK7LcVg2/yRb2EOizEj3cdEzcuMmUXA07wTi8ZBMTMtwydC318FMogRYG3gsxD7lXGoznCB+Q0LoWEm9D/0LE5IYvTHMZRz5dKcfUYT4lo+hXEXRQJP23tb56j2ymkLo3+qswsoRzNJ3EFzk1Q7DIX4bztH6dDWXFbOhV4FxjMh58JN/GVbErZCeb4xGo/FdN2rP+8+2UlguozhkAcxszEBpd34qgeNV3lam/P9vdCDY0CHxN3k6i4kqCpe8gJ0xIqMuXMPOhcj+KGMnNYm7pwfKHULyX38f/wM19E2fUm1pTXYXe19Rq0nhh5DY2w47+dBe/MD6jworKcBBOZFfoJrnT6bZgdBWOAtzKEm6okU7YS9RfJu0GkbIOdnzOjRkkQ1ebW7ZtFp+/ZWyPh+Z+p5ZEWC3GcFjsj4ZCrYE3aM1Z10jtWsSYEnjs60YjriCkh8XTPAyri/iv8Qa4U2099Iz7nu2j2kriYDohR7w32hPq2dOaHQaUDlECTERFRnDzmCxFGEaLevkQORGEMwu7OCzJBeGhei8hA9ch5y8P/MA5y+r7Ld1T8SwbBuEW4f5prmtvAba7o5I65PNMpaH2wQRf5OsrjDIttQrSvQUiC8umOjRT8NVlFDhr9/NhfMEirY+WznUYZXZ4Vz0ba3QpYl2U9lqDz5eRukwzA31IO7fwjDcxLZ/xqu5esYRKZ8RtRZnjjSq6GctqmjvVHJWTHl9uTYNBYFbS66uZfJAInWipEQZkWGoqzbP3YLWb6PkFLFZq5UUu38vQ04w= x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:MW4PR11MB5872.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230022)(346002)(396003)(39860400002)(376002)(136003)(366004)(451199015)(71200400001)(54906003)(64756008)(316002)(66476007)(8676002)(66446008)(4326008)(66556008)(66946007)(19627235002)(478600001)(86362001)(55016003)(76116006)(38070700005)(52536014)(7696005)(186003)(53546011)(41300700001)(8936002)(6506007)(5660300002)(2906002)(110136005)(33656002)(83380400001)(30864003)(122000001)(38100700002)(26005)(82960400001)(9686003)(145543001);DIR:OUT;SFP:1102; x-ms-exchange-antispam-messagedata-chunkcount: 1 x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?ALPQ7AUvQn7Ym555py/lP2hX489Bvqr0rr5/CEjDl9LoHLIP06smqZP3JJcr?= =?us-ascii?Q?krv8q7oBdRgYsKSbUPUSMPaj7Daf0+/W2DU9Nl5jFLwHCzbxxq47DTW0/XLI?= =?us-ascii?Q?q104cCWsnkL5qehVDgg3kf4izAc+2bFQb8TXByxXUrVj2n06tpvkLtrWNAzh?= =?us-ascii?Q?89sxcuTEi6ed3n7nBDmsvRj5pWpf/tg9MQTqCPTqnSdURWEZSp95jehUF8VP?= =?us-ascii?Q?COZW+V7U6mvioTxtc9vBixOOG5nH5uo6hxbvnG0kJ2dfomAHn3Ugwt00AzH9?= =?us-ascii?Q?Sx0MLz1sd3NI+QI3CwVXrk5alVvet/vuoCTcX+Nvn6mmy33Vi8UiSK0Au9jl?= =?us-ascii?Q?NW1tYstc98Fn51Z0V4dx1RZzBXweXKoauEkukjRp5uRBlLvm+Tr9NHYgGjoG?= =?us-ascii?Q?i8xxuJmAsCqD2BpQfbHL7KRZr8OZWNktVXstB440JKgPT93t2/Tpayzvw79T?= =?us-ascii?Q?/EfoyGtf0oXdLKdWmpp7HK89absCYBKSoBZzS2J2rcLUHRGFs0zXSByfvTDe?= =?us-ascii?Q?Bg8j6hB/odFABpqUB6TFsteaKYH6H9kWlA4FKLX+dVPhNM0T+aNuPAirqu0K?= =?us-ascii?Q?4NnJPaWmCfEQxAz2387HNgze+y0kYwzgQHHYKLPtkCYGuo6tsHOgwWWf3eiD?= =?us-ascii?Q?grAi4NBOd0/8Jv3CGmNrcuaHSAfQ3jFAP9Nh9Ca7Z1G+eRgTspFHSA+xopQ9?= =?us-ascii?Q?ADxavrsQ/1x5dGcdvyVymhZciFyBd4yHt+SwJyce9BQzF5l3eivf00tm4J3N?= =?us-ascii?Q?VOG9Ge5k/vv5p4HHFxQha4Dr18D1z2gm2YsgvYLplZ/0ubFhFbDAXvqvfXeS?= =?us-ascii?Q?wB23lpHNlEdjGtcAM29OyIQgNlEAN6Bj2hpKq9EL55Z5e4RnKPPn5th+tnba?= =?us-ascii?Q?9oNZJVahBXfF2fCjBcVMvuKEjfdS/vNVVHJLpxvuXXO596iBrECFNXKYhckc?= =?us-ascii?Q?cyyp8Qm5FekwD7UzoPYJYiuOVYSUlB4yQrfO+1jqAvvO80Mma1Jl2WuvF+g2?= =?us-ascii?Q?vQOAEyQO58f3t4Z1pnO3JH4QltE4lrP3EM04Q/Or3eCFC4ss8XFYCIVCy0zF?= =?us-ascii?Q?TAGIHatWlqvhH1e1RQBc7+8g0EUhkRiCjb+iLfpIZ3NBnLtRFNcI8N6ryn5/?= =?us-ascii?Q?5faut+OYxgXpU6FjSOPaKx8oLoT8NT+gUswK92Dsvqjct1boTR1l7TXljNGz?= =?us-ascii?Q?irL+IWLxDeFCnNoWAmifkr8P2wBCJ3kSboYmoRHceLJd3LuH+H36X3DONgxC?= =?us-ascii?Q?Ap6+wAfMWZZCXOMm+jo1RVOlF7rnY+vgL4rcctP2ZAQpOeCUd4M4YE5MJrcZ?= =?us-ascii?Q?hep5AeUT60GZ12dtDxSA6PPrYezX2A94FCN3KFQ2oDIEFCcLft1p4/TqJSUg?= =?us-ascii?Q?ddeK2UI4DQa32K3ZO0SKO5RmimrciM29+ggZnm7iuShf6faum3X+aLp32beq?= =?us-ascii?Q?RzD3p083giWxy+3PPiT+aypD1NKsIc7xroyjrkv05U/5Dl/AxVteKDUxiA9k?= =?us-ascii?Q?e39JtZBS3JP3Znj82kRaFqi2WGIqxT1vJ3TF2/JN5ExzBkw4f7bvboOyy+nG?= =?us-ascii?Q?/qc7bLSaaM+WAjCBRQyoJrem1z38OEb/o34se0OM?= MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MW4PR11MB5872.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: b2fab6f7-044d-4beb-9daf-08daa0615522 X-MS-Exchange-CrossTenant-originalarrivaltime: 27 Sep 2022 08:21:52.6325 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 6AeytbpthadDvyPmmrhKPGjLdAI+Bac3dgmfjwv5fxmYPutyUVB1kLFOEnBWBPrZE2te8tw5LtuN4qYxgKFshg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR11MB5310 Return-Path: jiewen.yao@intel.com X-OriginatorOrg: intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Jiewen Yao > -----Original Message----- > From: Xu, Min M > Sent: Tuesday, September 27, 2022 3:08 PM > To: devel@edk2.groups.io > Cc: Xu, Min M ; Aktas, Erdem > ; Gerd Hoffmann ; James > Bottomley ; Yao, Jiewen > Subject: [PATCH V2 1/1] OvmfPkg/PeilessStartupLib: move mPageTablePool > to stack >=20 > From: Min M Xu >=20 > PeilessStartupLib is running in SEC phase. In this phase global variable > is not allowed to be modified. This patch moves mPageTablePool to stack > and pass it as input parameter between functions. >=20 > Cc: Erdem Aktas > Cc: Gerd Hoffmann > Cc: James Bottomley > Cc: Jiewen Yao > Signed-off-by: Min Xu > --- > .../PeilessStartupLib/X64/VirtualMemory.c | 117 ++++++++++-------- > 1 file changed, 68 insertions(+), 49 deletions(-) >=20 > diff --git a/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c > b/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c > index 6877e521e485..b444c052d1bf 100644 > --- a/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c > +++ b/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c > @@ -21,11 +21,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent > #include > #include "PageTables.h" >=20 > -// > -// Global variable to keep track current available memory used as page > table. > -// > -PAGE_TABLE_POOL *mPageTablePool =3D NULL; > - > UINTN mLevelShift[5] =3D { > 0, > PAGING_L1_ADDRESS_SHIFT, > @@ -273,14 +268,17 @@ ToSplitPageTable ( > reserve at least another PAGE_TABLE_POOL_UNIT_PAGES. But usually > this won't > happen in practice. >=20 > - @param PoolPages The least page number of the pool to be created. > + @param[in] PoolPages The least page number of the pool to be > created. > + @param[in, out] PageTablePool Pointer of Pointer to the current > available memory > + used as page table. >=20 > @retval TRUE The pool is initialized successfully. > @retval FALSE The memory is out of resource. > **/ > BOOLEAN > InitializePageTablePool ( > - IN UINTN PoolPages > + IN UINTN PoolPages, > + IN OUT PAGE_TABLE_POOL **PageTablePool > ) > { > VOID *Buffer; > @@ -303,20 +301,20 @@ InitializePageTablePool ( > // > // Link all pools into a list for easier track later. > // > - if (mPageTablePool =3D=3D NULL) { > - mPageTablePool =3D Buffer; > - mPageTablePool->NextPool =3D mPageTablePool; > + if (*PageTablePool =3D=3D NULL) { > + *(UINT64 *)(UINTN)PageTablePool =3D (UINT64)(UINTN)Buffer; > + (*PageTablePool)->NextPool =3D *PageTablePool; > } else { > - ((PAGE_TABLE_POOL *)Buffer)->NextPool =3D mPageTablePool->NextPool; > - mPageTablePool->NextPool =3D Buffer; > - mPageTablePool =3D Buffer; > + ((PAGE_TABLE_POOL *)Buffer)->NextPool =3D (*PageTablePool)->NextPool= ; > + (*PageTablePool)->NextPool =3D Buffer; > + *PageTablePool =3D Buffer; > } >=20 > // > // Reserve one page for pool header. > // > - mPageTablePool->FreePages =3D PoolPages - 1; > - mPageTablePool->Offset =3D EFI_PAGES_TO_SIZE (1); > + (*PageTablePool)->FreePages =3D PoolPages - 1; > + (*PageTablePool)->Offset =3D EFI_PAGES_TO_SIZE (1); >=20 > return TRUE; > } > @@ -333,14 +331,17 @@ InitializePageTablePool ( > If there is not enough memory remaining to satisfy the request, then > NULL is > returned. >=20 > - @param Pages The number of 4 KB pages to allocate. > + @param[in] Pages The number of 4 KB pages to allo= cate. > + @param[in, out] PageTablePool Pointer of pointer to the curren= t > available > + memory used as page table. >=20 > @return A pointer to the allocated buffer or NULL if allocation fails. >=20 > **/ > VOID * > AllocatePageTableMemory ( > - IN UINTN Pages > + IN UINTN Pages, > + IN OUT PAGE_TABLE_POOL **PageTablePool > ) > { > VOID *Buffer; > @@ -349,30 +350,31 @@ AllocatePageTableMemory ( > return NULL; > } >=20 > - DEBUG ((DEBUG_INFO, "AllocatePageTableMemory. mPageTablePool=3D%p, > Pages=3D%d\n", mPageTablePool, Pages)); > + DEBUG ((DEBUG_INFO, "AllocatePageTableMemory. PageTablePool=3D%p, > Pages=3D%d\n", *PageTablePool, Pages)); > // > // Renew the pool if necessary. > // > - if ((mPageTablePool =3D=3D NULL) || > - (Pages > mPageTablePool->FreePages)) > + if ((*PageTablePool =3D=3D NULL) || > + (Pages > (*PageTablePool)->FreePages)) > { > - if (!InitializePageTablePool (Pages)) { > + if (!InitializePageTablePool (Pages, PageTablePool)) { > return NULL; > } > } >=20 > - Buffer =3D (UINT8 *)mPageTablePool + mPageTablePool->Offset; > + Buffer =3D (UINT8 *)(*PageTablePool) + (*PageTablePool)->Offset; >=20 > - mPageTablePool->Offset +=3D EFI_PAGES_TO_SIZE (Pages); > - mPageTablePool->FreePages -=3D Pages; > + (*PageTablePool)->Offset +=3D EFI_PAGES_TO_SIZE (Pages); > + (*PageTablePool)->FreePages -=3D Pages; >=20 > DEBUG (( > DEBUG_INFO, > - "%a:%a: Buffer=3D0x%Lx Pages=3D%ld\n", > + "%a:%a: Buffer=3D0x%Lx Pages=3D%ld, PageTablePool=3D%p\n", > gEfiCallerBaseName, > __FUNCTION__, > Buffer, > - Pages > + Pages, > + *PageTablePool > )); >=20 > return Buffer; > @@ -385,6 +387,8 @@ AllocatePageTableMemory ( > @param[in, out] PageEntry2M Pointer to 2M page entry. > @param[in] StackBase Stack base address. > @param[in] StackSize Stack size. > + @param[in, out] PageTablePool Pointer to the current available > memory used as > + page table. >=20 > **/ > VOID > @@ -392,7 +396,8 @@ Split2MPageTo4K ( > IN EFI_PHYSICAL_ADDRESS PhysicalAddress, > IN OUT UINT64 *PageEntry2M, > IN EFI_PHYSICAL_ADDRESS StackBase, > - IN UINTN StackSize > + IN UINTN StackSize, > + IN OUT PAGE_TABLE_POOL *PageTablePool > ) > { > EFI_PHYSICAL_ADDRESS PhysicalAddress4K; > @@ -401,7 +406,7 @@ Split2MPageTo4K ( >=20 > DEBUG ((DEBUG_INFO, "Split2MPageTo4K\n")); >=20 > - PageTableEntry =3D AllocatePageTableMemory (1); > + PageTableEntry =3D AllocatePageTableMemory (1, &PageTablePool); >=20 > if (PageTableEntry =3D=3D NULL) { > ASSERT (FALSE); > @@ -448,6 +453,8 @@ Split2MPageTo4K ( > @param[in, out] PageEntry1G Pointer to 1G page entry. > @param[in] StackBase Stack base address. > @param[in] StackSize Stack size. > + @param[in, out] PageTablePool Pointer to the current available > memory used as > + page table. >=20 > **/ > VOID > @@ -455,14 +462,16 @@ Split1GPageTo2M ( > IN EFI_PHYSICAL_ADDRESS PhysicalAddress, > IN OUT UINT64 *PageEntry1G, > IN EFI_PHYSICAL_ADDRESS StackBase, > - IN UINTN StackSize > + IN UINTN StackSize, > + IN OUT PAGE_TABLE_POOL *PageTablePool > ) > { > EFI_PHYSICAL_ADDRESS PhysicalAddress2M; > UINTN IndexOfPageDirectoryEntries; > PAGE_TABLE_ENTRY *PageDirectoryEntry; >=20 > - PageDirectoryEntry =3D AllocatePageTableMemory (1); > + DEBUG ((DEBUG_INFO, "Split1GPageTo2M\n")); > + PageDirectoryEntry =3D AllocatePageTableMemory (1, &PageTablePool); >=20 > if (PageDirectoryEntry =3D=3D NULL) { > ASSERT (FALSE); > @@ -480,7 +489,7 @@ Split1GPageTo2M ( > // > // Need to split this 2M page that covers NULL or stack range. > // > - Split2MPageTo4K (PhysicalAddress2M, (UINT64 *)PageDirectoryEntry, > StackBase, StackSize); > + Split2MPageTo4K (PhysicalAddress2M, (UINT64 *)PageDirectoryEntry, > StackBase, StackSize, PageTablePool); > } else { > // > // Fill in the Page Directory entries > @@ -496,16 +505,19 @@ Split1GPageTo2M ( > /** > Set one page of page table pool memory to be read-only. >=20 > - @param[in] PageTableBase Base address of page table (CR3). > - @param[in] Address Start address of a page to be set as read-= only. > - @param[in] Level4Paging Level 4 paging flag. > + @param[in] PageTableBase Base address of page table (CR3). > + @param[in] Address Start address of a page to be set as = read- > only. > + @param[in] Level4Paging Level 4 paging flag. > + @param[in, out] PageTablePool Pointer to the current available > memory used as > + page table. >=20 > **/ > VOID > SetPageTablePoolReadOnly ( > IN UINTN PageTableBase, > IN EFI_PHYSICAL_ADDRESS Address, > - IN BOOLEAN Level4Paging > + IN BOOLEAN Level4Paging, > + IN OUT PAGE_TABLE_POOL *PageTablePool > ) > { > UINTN Index; > @@ -573,7 +585,8 @@ SetPageTablePoolReadOnly ( > // > ASSERT (Level > 1); >=20 > - NewPageTable =3D AllocatePageTableMemory (1); > + DEBUG ((DEBUG_INFO, "SetPageTablePoolReadOnly\n")); > + NewPageTable =3D AllocatePageTableMemory (1, &PageTablePool); >=20 > if (NewPageTable =3D=3D NULL) { > ASSERT (FALSE); > @@ -604,14 +617,17 @@ SetPageTablePoolReadOnly ( > /** > Prevent the memory pages used for page table from been overwritten. >=20 > - @param[in] PageTableBase Base address of page table (CR3). > - @param[in] Level4Paging Level 4 paging flag. > + @param[in] PageTableBase Base address of page table (CR3). > + @param[in] Level4Paging Level 4 paging flag. > + @param[in, out] PageTablePool Pointer to the current available > memory used as > + page table. >=20 > **/ > VOID > EnablePageTableProtection ( > - IN UINTN PageTableBase, > - IN BOOLEAN Level4Paging > + IN UINTN PageTableBase, > + IN BOOLEAN Level4Paging, > + IN OUT PAGE_TABLE_POOL *PageTablePool > ) > { > PAGE_TABLE_POOL *HeadPool; > @@ -621,7 +637,7 @@ EnablePageTableProtection ( >=20 > DEBUG ((DEBUG_INFO, "EnablePageTableProtection\n")); >=20 > - if (mPageTablePool =3D=3D NULL) { > + if (PageTablePool =3D=3D NULL) { > return; > } >=20 > @@ -632,10 +648,10 @@ EnablePageTableProtection ( > AsmWriteCr0 (AsmReadCr0 () & ~CR0_WP); >=20 > // > - // SetPageTablePoolReadOnly might update mPageTablePool. It's safer to > + // SetPageTablePoolReadOnly might update PageTablePool. It's safer to > // remember original one in advance. > // > - HeadPool =3D mPageTablePool; > + HeadPool =3D PageTablePool; > Pool =3D HeadPool; > do { > Address =3D (EFI_PHYSICAL_ADDRESS)(UINTN)Pool; > @@ -647,7 +663,7 @@ EnablePageTableProtection ( > // protection to them one by one. > // > while (PoolSize > 0) { > - SetPageTablePoolReadOnly (PageTableBase, Address, Level4Paging); > + SetPageTablePoolReadOnly (PageTableBase, Address, Level4Paging, > PageTablePool); > Address +=3D PAGE_TABLE_POOL_UNIT_SIZE; > PoolSize -=3D PAGE_TABLE_POOL_UNIT_SIZE; > } > @@ -700,6 +716,7 @@ CreateIdentityMappingPageTables ( > BOOLEAN Page1GSupport; > PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry; > IA32_CR4 Cr4; > + PAGE_TABLE_POOL *PageTablePool; >=20 > // > // Set PageMapLevel5Entry to suppress incorrect compiler/analyzer > warnings > @@ -785,13 +802,14 @@ CreateIdentityMappingPageTables ( > (UINT64)TotalPagesNum > )); >=20 > - BigPageAddress =3D (UINTN)AllocatePageTableMemory (TotalPagesNum); > + PageTablePool =3D NULL; > + BigPageAddress =3D (UINTN)AllocatePageTableMemory (TotalPagesNum, > &PageTablePool); > if (BigPageAddress =3D=3D 0) { > ASSERT (FALSE); > return 0; > } >=20 > - DEBUG ((DEBUG_INFO, "BigPageAddress =3D 0x%llx\n", BigPageAddress)); > + DEBUG ((DEBUG_INFO, "BigPageAddress =3D 0x%llx, PageTablePool=3D%p\n", > BigPageAddress, PageTablePool)); >=20 > // > // By architecture only one PageMapLevel4 exists - so lets allocate st= orage > for it. > @@ -856,7 +874,8 @@ CreateIdentityMappingPageTables ( > PageAddress, > (UINT64 *)PageDirectory1GEntry, > StackBase, > - StackSize > + StackSize, > + PageTablePool > ); > } else { > // > @@ -892,7 +911,7 @@ CreateIdentityMappingPageTables ( > // > // Need to split this 2M page that covers NULL or stack ra= nge. > // > - Split2MPageTo4K (PageAddress, (UINT64 *)PageDirectoryEntry= , > StackBase, StackSize); > + Split2MPageTo4K (PageAddress, (UINT64 *)PageDirectoryEntry= , > StackBase, StackSize, PageTablePool); > } else { > // > // Fill in the Page Directory entries > @@ -929,7 +948,7 @@ CreateIdentityMappingPageTables ( > // Protect the page table by marking the memory used for page table to > be > // read-only. > // > - EnablePageTableProtection ((UINTN)PageMap, TRUE); > + EnablePageTableProtection ((UINTN)PageMap, TRUE, PageTablePool); >=20 > return (UINTN)PageMap; > } > -- > 2.29.2.windows.2