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From: "Milosek, Damian"
To: "devel@edk2.groups.io"
CC: "ardb@kernel.org" , "sami.mujawar@arm.com"
, "Yao, Jiewen" ,
"supreeth.venkatesh@arm.com" , "Milosek, Damian"
Subject: Re: [PATCH] StandaloneMmPkg/StandaloneMmMemLib: Update AARCH64 address size
Thread-Topic: [PATCH] StandaloneMmPkg/StandaloneMmMemLib: Update AARCH64
address size
Thread-Index: AdkpsRLevHgQ0VmUTuW8Suo+oRFPogFkR+Sg
Date: Mon, 23 Jan 2023 15:51:39 +0000
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--_000_MW5PR11MB58825A61B93EF3180D7751F095C89MW5PR11MB5882namp_
Content-Type: text/plain; charset="iso-8859-2"
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From: devel@edk2.groups.io On Behalf Of Milosek, Dam=
ian
Sent: Monday, January 16, 2023 2:51 PM
To: devel@edk2.groups.io
Cc: Milosek, Damian
Subject: [edk2-devel] [PATCH] StandaloneMmPkg/StandaloneMmMemLib: Update AA=
RCH64 address size
Enable StandaloneMmMemLib to use longer physical addresses than 36 bits.
According to ARM "Learn the architecture - AArch64 memory management"
since Armv8.2-A physical address size was extended to 52 bits.
https://developer.arm.com/documentation/101811/0102/Address-spaces
Signed-off-by: Damian Milosek >
---
.../StandaloneMmMemLib/ArmStandaloneMmMemLibInternal.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/StandaloneMmPkg/Library/StandaloneMmMemLib/ArmStandaloneMmMemL=
ibInternal.c b/StandaloneMmPkg/Library/StandaloneMmMemLib/ArmStandaloneMmMe=
mLibInternal.c
index 297cfae916..dff3e0145f 100644
--- a/StandaloneMmPkg/Library/StandaloneMmMemLib/ArmStandaloneMmMemLibInter=
nal.c
+++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/ArmStandaloneMmMemLibInter=
nal.c
@@ -6,7 +6,7 @@
all MMRAM range via MM_ACCESS_PROTOCOL, including the range for firmware=
(like MM Core
and MM driver) and/or specific dedicated hardware.
- Copyright (c) 2015, Intel Corporation. All rights reserved.
+ Copyright (c) 2015 - 2023, Intel Corporation. All rights reserved.
Copyright (c) 2016 - 2018, ARM Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -21,7 +21,7 @@
extern EFI_PHYSICAL_ADDRESS mMmMemLibInternalMaximumSupportAddress;
#ifdef MDE_CPU_AARCH64
-#define ARM_PHYSICAL_ADDRESS_BITS 36
+#define ARM_PHYSICAL_ADDRESS_BITS 52
#endif
#ifdef MDE_CPU_ARM
#define ARM_PHYSICAL_ADDRESS_BITS 32
--
2.37.2.windows.2
________________________________
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ione.
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--_000_MW5PR11MB58825A61B93EF3180D7751F095C89MW5PR11MB5882namp_
Content-Type: text/html; charset="iso-8859-2"
MIME-Version: 1.0
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From: devel@edk2.groups.io <devel@edk2.gro=
ups.io>
On Behalf Of Milosek, Damian
Sent: Monday, January 16, 2023 2:51 PM
To: devel@edk2.groups.io
Cc: Milosek, Damian <damian.milosek@intel.com>
Subject: [edk2-devel] [PATCH] StandaloneMmPkg/StandaloneMmMemLib: Up=
date AARCH64 address size
Enable StandaloneMmMemLib to use longer physical add=
resses than 36 bits.
According to ARM "Learn the architecture - AArc=
h64 memory management"
since Armv8.2-A physical address size was extended t=
o 52 bits.
https://developer.arm.com/documentation/101811/0=
102/Address-spaces
Signed-off-by: Damian Milosek <damian.milosek@intel.com>
---
.../StandaloneMmMemLib/ArmStandaloneMmMemLibInternal=
.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)=
diff --git a/StandaloneMmPkg/Library/StandaloneMmMem=
Lib/ArmStandaloneMmMemLibInternal.c b/StandaloneMmPkg/Library/StandaloneMmM=
emLib/ArmStandaloneMmMemLibInternal.c
index 297cfae916..dff3e0145f 100644
--- a/StandaloneMmPkg/Library/StandaloneMmMemLib/Arm=
StandaloneMmMemLibInternal.c
+++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/Arm=
StandaloneMmMemLibInternal.c
@@ -6,7 +6,7 @@
all MMRAM range via MM_ACCESS_PROTOCOL,=
including the range for firmware (like MM Core
and MM driver) and/or specific dedicate=
d hardware.
- Copyright (c) 2015, Intel Corporation. All r=
ights reserved.<BR>
+ Copyright (c) 2015 - 2023, Intel Corporation=
. All rights reserved.<BR>
Copyright (c) 2016 - 2018, ARM Limited.=
All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-P=
atent
@@ -21,7 +21,7 @@
extern EFI_PHYSICAL_ADDRESS mMmMemLibInternalM=
aximumSupportAddress;
#ifdef MDE_CPU_AARCH64
-#define ARM_PHYSICAL_ADDRESS_BITS 36
+#define ARM_PHYSICAL_ADDRESS_BITS 52
#endif
#ifdef MDE_CPU_ARM
#define ARM_PHYSICAL_ADDRESS_BITS 32
--
2.37.2.windows.2
Intel Technology Poland s=
p. z o.o.
ul. S=B3owackiego 173 | 80-298 Gda=F1sk | S=
=B1d Rejonowy Gda=F1sk P=F3=B3noc | VII Wydzia=B3 Gospodarczy Krajowego Rej=
estru S=B1dowego - KRS 101882 | NIP 957-07-52-316 | Kapita=B3 zak=B3adowy
200.000 PLN.
Sp=F3=B3ka o=B6wiadcza, =BFe posiada status du=BFego przedsi=EAbiorcy w roz=
umieniu ustawy z dnia 8 marca 2013 r. o przeciwdzia=B3aniu nadmiernym op=F3=
=BCnieniom w transakcjach handlowych.
Ta wiadomo=B6=E6 wraz z za=B3=B1cznikami jest przezna=
czona dla okre=B6lonego adresata i mo=BFe zawiera=E6 informacje poufne. W r=
azie przypadkowego otrzymania tej wiadomo=B6ci, prosimy o powiadomienie
nadawcy oraz trwa=B3e jej usuni=EAcie; jakiekolwiek przegl=B1danie lub roz=
powszechnianie jest zabronione.
This e-mail and any attachments may contain confidential material for the s=
ole use of the intended recipient(s). If you are not the intended recipient=
, please contact the sender and delete all copies; any review or distributi=
on by others is strictly prohibited.
Intel =
Technology Poland sp. z o.o.
ul. Słowackiego 173 | 80-298 Gdańsk | Sąd Rejonowy G=
dańsk Północ | VII Wydział Gospodarczy Krajowego Rejest=
ru Sądowego - KRS 101882 | NIP 957-07-52-316 | Kapitał zakła=
dowy 200.000 PLN.
Spółka oświadcza, że posiada status du=
80;ego przedsiębiorcy w rozumieniu ustawy z dnia 8 marca 2013 r. o prz=
eciwdziałaniu nadmiernym opóźnieniom w transakcjach handlowy=
ch.
Ta wiadomość wraz z załącznikami jest przeznacz=
ona dla określonego adresata i może zawierać informacje pouf=
ne. W razie przypadkowego otrzymania tej wiadomości, prosimy o powiado=
mienie nadawcy oraz trwałe jej usunięcie; jakiekolwiek przegl=
1;danie lub rozpowszechnianie jest zabronione.
This e-mail and any attachments may contain confidential material f=
or the sole use of the intended recipient(s). If you are not the intended r=
ecipient, please contact the sender and delete all copies; any review or di=
stribution by others is strictly prohibited.
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