From: "Sinha, Ankit" <ankit.sinha@intel.com>
To: "Ni, Ray" <ray.ni@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>,
"Chiu, Chasel" <chasel.chiu@intel.com>
Cc: "Desimone, Nathaniel L" <nathaniel.l.desimone@intel.com>,
"Gao, Liming" <gaoliming@byosoft.com.cn>,
"Dong, Eric" <eric.dong@intel.com>
Subject: Re: [edk2-devel] [PATCH V1 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package
Date: Tue, 17 May 2022 19:01:51 +0000 [thread overview]
Message-ID: <MW5PR11MB59086C3F372C1016EB02495CE5CE9@MW5PR11MB5908.namprd11.prod.outlook.com> (raw)
In-Reply-To: <MWHPR11MB1631C442AFD102ADE31231068CCE9@MWHPR11MB1631.namprd11.prod.outlook.com>
Hi Ray,
That is a good feedback. However, since FADT is a mandatory table to boot an ACPI compliant OS, we have placed it in the implementation of MinPlatformPkg. If we move this to be a board responsibility then we will need to implement a check in the boot process to make sure FADT is published correctly before booting to OS.
Thank you,
Ankit
> -----Original Message-----
> From: Ni, Ray <ray.ni@intel.com>
> Sent: Tuesday, May 17, 2022 7:11 AM
> To: devel@edk2.groups.io; Chiu, Chasel <chasel.chiu@intel.com>
> Cc: Sinha, Ankit <ankit.sinha@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>; Gao, Liming
> <gaoliming@byosoft.com.cn>; Dong, Eric <eric.dong@intel.com>
> Subject: RE: [edk2-devel] [PATCH V1 1/1] MinPlatformPkg: Add PCDs to
> update FADT entries from board package
>
> I am thinking if most of FADT fields are configurable through PCD from
> BoardPkg.
> Then why not remove the FADT from this open-source driver but let some
> code in BoardPkg produces the FADT?
>
> It helps to remove the PCD layer and simplifies the data flow from PCD-
> >FADT to FADT.
>
> Thanks,
> Ray
>
> > -----Original Message-----
> > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chiu,
> > Chasel
> > Sent: Tuesday, May 17, 2022 11:19 AM
> > To: devel@edk2.groups.io
> > Cc: Sinha, Ankit <ankit.sinha@intel.com>; Chiu, Chasel
> > <chasel.chiu@intel.com>; Desimone, Nathaniel L
> > <nathaniel.l.desimone@intel.com>; Gao, Liming
> > <gaoliming@byosoft.com.cn>; Dong, Eric <eric.dong@intel.com>
> > Subject: [edk2-devel] [PATCH V1 1/1] MinPlatformPkg: Add PCDs to
> > update FADT entries from board package
> >
> > From: Ankit Sinha <ankit.sinha@intel.com>
> >
> > Adds new PCDs to allow entries in FADT to be customized during
> > platform integration. Board packages will can update these PCDs during
> boot.
> >
> > Cc: Chasel Chiu <chasel.chiu@intel.com>
> > Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> > Cc: Liming Gao <gaoliming@byosoft.com.cn>
> > Cc: Eric Dong <eric.dong@intel.com>
> >
> > Signed-off-by: Ankit Sinha <ankit.sinha@intel.com>
> > ---
> > Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 85
> ++++++++++++--------
> > Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf | 24
> ++++++
> > Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 36 +++++++-
> -
> > 3 files changed, 105 insertions(+), 40 deletions(-)
> >
> > diff --git
> > a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> > b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> > index 05fc7799fb13..b3d067def3fa 100644
> > --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> > +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> > @@ -1165,6 +1165,11 @@ PlatformUpdateTables (
> > // Update the creator revision
> >
> > //
> >
> > TableHeader->CreatorRevision =
> > PcdGet32(PcdAcpiDefaultCreatorRevision);
> >
> > +
> >
> > + //
> >
> > + // Update the oem revision
> >
> > + //
> >
> > + TableHeader->OemRevision = PcdGet32(PcdAcpiDefaultOemRevision);
> >
> > }
> >
> > }
> >
> >
> >
> > @@ -1187,44 +1192,54 @@ PlatformUpdateTables (
> > case EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE:
> >
> > FadtHeader = (EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)
> Table;
> >
> >
> >
> > - FadtHeader->PreferredPmProfile = PcdGet8
> (PcdFadtPreferredPmProfile);
> >
> > - FadtHeader->IaPcBootArch = PcdGet16 (PcdFadtIaPcBootArch);
> >
> > - FadtHeader->Flags = PcdGet32 (PcdFadtFlags);
> >
> > + FadtHeader->PreferredPmProfile = PcdGet8
> (PcdFadtPreferredPmProfile);
> >
> > + FadtHeader->IaPcBootArch = PcdGet16
> (PcdFadtIaPcBootArch);
> >
> > + FadtHeader->Flags = PcdGet32 (PcdFadtFlags);
> >
> > + FadtHeader->AcpiEnable = PcdGet8 (PcdAcpiEnableSwSmi);
> >
> > + FadtHeader->AcpiDisable = PcdGet8 (PcdAcpiDisableSwSmi);
> >
> > + FadtHeader->Pm1aEvtBlk = PcdGet16
> (PcdAcpiPm1AEventBlockAddress);
> >
> > + FadtHeader->Pm1bEvtBlk = PcdGet16
> (PcdAcpiPm1BEventBlockAddress);
> >
> > + FadtHeader->Pm1aCntBlk = PcdGet16
> (PcdAcpiPm1AControlBlockAddress);
> >
> > + FadtHeader->Pm1bCntBlk = PcdGet16
> (PcdAcpiPm1BControlBlockAddress);
> >
> > + FadtHeader->Pm2CntBlk = PcdGet16
> (PcdAcpiPm2ControlBlockAddress);
> >
> > + FadtHeader->PmTmrBlk = PcdGet16
> (PcdAcpiPmTimerBlockAddress);
> >
> > + FadtHeader->Gpe0Blk = PcdGet16
> (PcdAcpiGpe0BlockAddress);
> >
> > + FadtHeader->Gpe0BlkLen = PcdGet8
> (PcdAcpiGpe0BlockLength);
> >
> > + FadtHeader->Gpe1Blk = PcdGet16
> (PcdAcpiGpe1BlockAddress);
> >
> > + FadtHeader->Gpe1Base = PcdGet8 (PcdAcpiGpe1Base);
> >
> > + FadtHeader->DutyWidth = PcdGet8 (PcdAcpiDutyWidth);
> >
> >
> >
> > - FadtHeader->AcpiEnable = PcdGet8 (PcdAcpiEnableSwSmi);
> >
> > - FadtHeader->AcpiDisable = PcdGet8 (PcdAcpiDisableSwSmi);
> >
> > + FadtHeader->XPm1aEvtBlk.Address = PcdGet16
> (PcdAcpiPm1AEventBlockAddress);
> >
> > + FadtHeader->XPm1aCntBlk.Address = PcdGet16
> (PcdAcpiPm1AControlBlockAddress);
> >
> > + FadtHeader->XPm1bCntBlk.Address = PcdGet16
> (PcdAcpiPm1BControlBlockAddress);
> >
> > + FadtHeader->XPm2CntBlk.Address = PcdGet16
> (PcdAcpiPm2ControlBlockAddress);
> >
> > + FadtHeader->XPmTmrBlk.Address = PcdGet16
> (PcdAcpiPmTimerBlockAddress);
> >
> > + FadtHeader->XGpe0Blk.Address = PcdGet16
> (PcdAcpiGpe0BlockAddress);
> >
> > + FadtHeader->XGpe1Blk.Address = PcdGet16
> (PcdAcpiGpe1BlockAddress);
> >
> >
> >
> > - FadtHeader->Pm1aEvtBlk = PcdGet16
> (PcdAcpiPm1AEventBlockAddress);
> >
> > - FadtHeader->Pm1bEvtBlk = PcdGet16
> (PcdAcpiPm1BEventBlockAddress);
> >
> > - FadtHeader->Pm1aCntBlk = PcdGet16
> (PcdAcpiPm1AControlBlockAddress);
> >
> > - FadtHeader->Pm1bCntBlk = PcdGet16
> (PcdAcpiPm1BControlBlockAddress);
> >
> > - FadtHeader->Pm2CntBlk = PcdGet16
> (PcdAcpiPm2ControlBlockAddress);
> >
> > - FadtHeader->PmTmrBlk = PcdGet16 (PcdAcpiPmTimerBlockAddress);
> >
> > - FadtHeader->Gpe0Blk = PcdGet16 (PcdAcpiGpe0BlockAddress);
> >
> > - FadtHeader->Gpe0BlkLen = 0x20;
> >
> > - FadtHeader->Gpe1Blk = PcdGet16 (PcdAcpiGpe1BlockAddress);
> >
> > + FadtHeader->ResetReg.AccessSize = PcdGet8
> (PcdAcpiResetRegAccessSize);
> >
> > + FadtHeader->XPm1aEvtBlk.AccessSize = PcdGet8
> (PcdAcpiXPm1aEvtBlkAccessSize);
> >
> > + FadtHeader->XPm1bEvtBlk.AccessSize = PcdGet8
> (PcdAcpiXPm1bEvtBlkAccessSize);
> >
> > + FadtHeader->XPm1aCntBlk.AccessSize = PcdGet8
> (PcdAcpiXPm1aCntBlkAccessSize);
> >
> > + FadtHeader->XPm1bCntBlk.AccessSize = PcdGet8
> (PcdAcpiXPm1bCntBlkAccessSize);
> >
> > + FadtHeader->XPm2CntBlk.AccessSize = PcdGet8
> (PcdAcpiXPm2CntBlkAccessSize);
> >
> > + FadtHeader->XPmTmrBlk.AccessSize = PcdGet8
> (PcdAcpiXPmTmrBlkAccessSize);
> >
> > + FadtHeader->XGpe0Blk.AccessSize = PcdGet8
> (PcdAcpiXGpe0BlkAccessSize);
> >
> > + FadtHeader->XGpe1Blk.AccessSize = PcdGet8
> (PcdAcpiXGpe1BlkAccessSize);
> >
> >
> >
> > - FadtHeader->XPm1aEvtBlk.Address = PcdGet16
> (PcdAcpiPm1AEventBlockAddress);
> >
> > - FadtHeader->XPm1bEvtBlk.Address = PcdGet16
> (PcdAcpiPm1BEventBlockAddress);
> >
> > - if (FadtHeader->XPm1bEvtBlk.Address == 0) {
> >
> > - FadtHeader->XPm1bEvtBlk.AccessSize = 0;
> >
> > - }
> >
> > - FadtHeader->XPm1aCntBlk.Address = PcdGet16
> (PcdAcpiPm1AControlBlockAddress);
> >
> > - FadtHeader->XPm1bCntBlk.Address = PcdGet16
> (PcdAcpiPm1BControlBlockAddress);
> >
> > - if (FadtHeader->XPm1bCntBlk.Address == 0) {
> >
> > - FadtHeader->XPm1bCntBlk.AccessSize = 0;
> >
> > - }
> >
> > - FadtHeader->XPm2CntBlk.Address = PcdGet16
> (PcdAcpiPm2ControlBlockAddress);
> >
> > - //if (FadtHeader->XPm2CntBlk.Address == 0) {
> >
> > - FadtHeader->XPm2CntBlk.AccessSize = 0;
> >
> > - //}
> >
> > - FadtHeader->XPmTmrBlk.Address = PcdGet16
> (PcdAcpiPmTimerBlockAddress);
> >
> > - FadtHeader->XGpe0Blk.Address = PcdGet16
> (PcdAcpiGpe0BlockAddress);
> >
> > - FadtHeader->XGpe1Blk.Address = PcdGet16
> (PcdAcpiGpe1BlockAddress);
> >
> > - if (FadtHeader->XGpe1Blk.Address == 0) {
> >
> > - FadtHeader->XGpe1Blk.AddressSpaceId = 0;
> >
> > - FadtHeader->XGpe1Blk.AccessSize = 0;
> >
> > - }
> >
> > + FadtHeader->SleepControlReg.AddressSpaceId = PcdGet8
> (PcdAcpiSleepControlRegAddressSpaceId);
> >
> > + FadtHeader->SleepControlReg.RegisterBitOffset = PcdGet8
> > + (PcdAcpiSleepControlRegRegisterBitOffset);
> >
> > + FadtHeader->SleepControlReg.AccessSize = PcdGet8
> (PcdAcpiSleepControlRegAccessSize);
> >
> > + FadtHeader->SleepControlReg.Address = PcdGet64
> (PcdAcpiSleepControlRegAddress);
> >
> > + FadtHeader->SleepStatusReg.AddressSpaceId = PcdGet8
> (PcdAcpiSleepStatusRegAddressSpaceId);
> >
> > + FadtHeader->SleepStatusReg.RegisterBitWidth = PcdGet8
> (PcdAcpiSleepStatusRegRegisterBitWidth);
> >
> > + FadtHeader->SleepStatusReg.RegisterBitOffset = PcdGet8
> > + (PcdAcpiSleepStatusRegRegisterBitOffset);
> >
> > + FadtHeader->SleepStatusReg.AccessSize = PcdGet8
> (PcdAcpiSleepStatusRegAccessSize);
> >
> > + FadtHeader->SleepStatusReg.Address = PcdGet64
> (PcdAcpiSleepStatusRegAddress);
> >
> > +
> >
> > + FadtHeader->S4BiosReq = PcdGet8 (PcdAcpiS4BiosReq);
> >
> > + FadtHeader->XPm1aEvtBlk.Address = PcdGet16
> (PcdAcpiPm1AEventBlockAddress);
> >
> > + FadtHeader->XPm1bEvtBlk.Address = PcdGet16
> (PcdAcpiPm1BEventBlockAddress);
> >
> >
> >
> > DEBUG ((DEBUG_INFO, "ACPI FADT table @ address 0x%x\n", Table));
> >
> > DEBUG ((DEBUG_INFO, " IaPcBootArch 0x%x\n",
> > FadtHeader->IaPcBootArch));
> >
> > diff --git
> > a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
> > b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
> > index 99adf9c381c9..9d91e418d4ca 100644
> > --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
> > +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
> > @@ -62,6 +62,8 @@
> > gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount
> >
> >
> >
> > gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile
> >
> > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base
> >
> > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiDutyWidth
> >
> > gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch
> >
> > gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags
> >
> >
> >
> > @@ -77,7 +79,29 @@
> > gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress
> >
> > gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress
> >
> > gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress
> >
> > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength
> >
> > gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress
> >
> > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize
> >
> > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize
> >
> > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize
> >
> > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize
> >
> > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize
> >
> > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize
> >
> > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize
> >
> > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize
> >
> > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize
> >
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffse
> > + t
> >
> > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize
> >
> > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress
> >
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId
> >
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset
> >
> > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize
> >
> > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress
> >
> > + gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq
> >
> > +
> >
> >
> >
> > gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress
> >
> > gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress
> >
> > diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> > b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> > index e38617ce20fd..bfc50565144f 100644
> > --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> > +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> > @@ -112,10 +112,6 @@
> >
> >
> gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8|UINT32|0x9000
> 0022
> >
> >
> >
> gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|4|UINT32|0x90
> 000023
> >
> >
> >
> > -
> >
> gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|
> 0x9
> > 0000025
> >
> > -
> >
> gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x
> 9000
> > 0026
> >
> > -
> >
> gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x900
> 0002
> > 7
> >
> > -
> >
> >
> >
> gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0
> x65
> > |UINT32|0x20000500
> >
> >
> >
> gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x30
> |UIN
> > T32|0x20000501
> >
> >
> >
> gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x4
> 02|U
> > INT32|0x20000502
> >
> > @@ -245,6 +241,10 @@
> > gMinPlatformPkgTokenSpaceGuid.PcdPciSegmentCount |0x1
> |UINT8|0x4001004E
> >
> > gMinPlatformPkgTokenSpaceGuid.PcdRandomizePlatformHierarchy
> |TRUE
> > |BOOLEAN|0x4001004F
> >
> >
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|
> 0
> > + x90000025
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x
> 90
> > + 000026
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x900
> 00
> > + 027
> >
> > +
> >
> >
> >
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|
> UINT
> > 16|0x00010035
> >
> >
> >
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|
> UINT
> > 16|0x00010036
> >
> >
> >
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x180
> 4|UI
> > NT16|0x0001037
> >
> > @@ -252,7 +252,33 @@
> >
> >
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress|0x1850
> |UIN
> > T16|0x00010039
> >
> >
> >
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiPmTimerBlockAddress|0x1808|UI
> NT16
> > |0x0001003A
> >
> >
> >
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x1880|UINT1
> 6|0x
> > 0001003B
> >
> > -
> >
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT1
> 6|0x
> > 0001003C
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength|0x00|UINT8|0x
> 00
> > + 01003C
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT1
> 6|
> > + 0x0001003D
> >
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base|0x00|UINT8|0x000100
> 40
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiDutyWidth|0x00|UINT8|0x000100
> 41
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize|0x00|UINT8
> |0
> > + x00010042
> >
> > +
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize|0x00|UI
> NT
> > + 8|0x00010043
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize|0x00|UI
> NT
> > + 8|0x00010044
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize|0x00|UI
> NT
> > + 8|0x00010045
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bCntBlkAccessSize|0x00|UI
> NT
> > + 8|0x00010046
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm2CntBlkAccessSize|0x00|UIN
> T8
> > + |0x00010047
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize|0x00|UINT
> 8|
> > + 0x00010048
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize|0x00|UINT8
> |0
> > + x00010049
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize|0x00|UINT8
> |0
> > + x0001004A
> >
> > +
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId|
> 0
> > + x00|UINT8|0x0001004B
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth
> > + |0x00|UINT8|0x0001004C
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffse
> > + t|0x00|UINT8|0x0001004D
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize|0x00|
> > + UINT8|0x0001004E
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress|0x00000
> 0
> > + 0000000000|UINT64|0x0001004F
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId|0
> x
> > + 00|UINT8|0x00010050
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth|
> > + 0x00|UINT8|0x00010051
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset
> > + |0x00|UINT8|0x00010052
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize|0x00|
> U
> > + INT8|0x00010053
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress|0x000000
> 0
> > + 000000000|UINT64|0x00010054
> >
> > +
> > +
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq|0x0000|UINT8|0x0001
> 00
> > + 55
> >
> > +
> >
> >
> >
> >
> >
> gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000|
> UIN
> > T32|0x0010004
> >
> >
> >
> gMinPlatformPkgTokenSpaceGuid.PcdFspCpuPeiApWakeupBufferAddr|0x9f
> 000|U
> > INT32|0x30000008
> >
> > --
> > 2.33.0.windows.1
> >
> >
> >
> > -=-=-=-=-=-=
> > Groups.io Links: You receive all messages sent to this group.
> > View/Reply Online (#89792):
> > https://edk2.groups.io/g/devel/message/89792
> > Mute This Topic: https://groups.io/mt/91156600/1712937
> > Group Owner: devel+owner@edk2.groups.io
> > Unsubscribe: https://edk2.groups.io/g/devel/unsub [ray.ni@intel.com]
> > -=-=-=-=-=-=
> >
next prev parent reply other threads:[~2022-05-17 19:02 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-17 3:18 [PATCH V1 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package Chiu, Chasel
2022-05-17 14:10 ` [edk2-devel] " Ni, Ray
2022-05-17 19:01 ` Sinha, Ankit [this message]
2022-05-18 2:04 ` Ni, Ray
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=MW5PR11MB59086C3F372C1016EB02495CE5CE9@MW5PR11MB5908.namprd11.prod.outlook.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox