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Thu, 1 Apr 2021 19:19:58 +0000 From: "Nate DeSimone" To: Ling Jia , "devel@edk2.groups.io" CC: Leif Lindholm , Peng Xie , "Yiqi Shu" , Takuto Naito , "Chaganty, Rangasai V" , "Luo, Heng" Subject: Re: [PATCH v3 01/46] TigerlakeOpenBoardPkg: Fix build errors with GCC5 Thread-Topic: [PATCH v3 01/46] TigerlakeOpenBoardPkg: Fix build errors with GCC5 Thread-Index: AQHXFy6DVsrLcHvPDUiQ0Yvx0C6MqKqgJ/rg Date: Thu, 1 Apr 2021 19:19:58 +0000 Message-ID: References: <20210312105618.75605-1-jialing@phytium.com.cn> <20210312105618.75605-2-jialing@phytium.com.cn> In-Reply-To: <20210312105618.75605-2-jialing@phytium.com.cn> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-reaction: no-action dlp-version: 11.5.1.3 dlp-product: dlpe-windows authentication-results: phytium.com.cn; dkim=none (message not signed) header.d=none;phytium.com.cn; dmarc=none action=none header.from=intel.com; x-originating-ip: [50.53.190.176] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 3ebcca5b-00b8-401f-9288-08d8f54323d4 x-ms-traffictypediagnostic: MWHPR11MB1342: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:3044; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Ling, This appears to be a duplicate of a patch that has already been applied:=20 https://edk2.groups.io/g/devel/message/71894 https://github.com/tianocore/edk2-platforms/commit/12ef75dc Was this message sent in error? Thanks, Nate > -----Original Message----- > From: Ling Jia > Sent: Friday, March 12, 2021 2:56 AM > To: devel@edk2.groups.io > Cc: Leif Lindholm ; Peng Xie > ; Yiqi Shu ; Takuto > Naito ; Chaganty, Rangasai V > ; Desimone, Nathaniel L > ; Luo, Heng > Subject: [PATCH v3 01/46] TigerlakeOpenBoardPkg: Fix build errors with > GCC5 >=20 > From: Takuto Naito >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3224 >=20 > - Fix the path of TigerLakeFspBinPkg > - Fix misuse of RETURN_ERROR > - Remove unused function CheckNationalSio. >=20 > Cc: Sai Chaganty > Cc: Nate DeSimone > Cc: Heng Luo > Signed-off-by: Takuto Naito > Reviewed-by: Heng Luo > Reviewed-by: Nate DeSimone > --- >=20 > Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInit > Lib/PeiFspPolicyInitLib.inf | 2 +- >=20 > Platform/Intel/TigerlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePl > atformHookLib.c | 188 -------------------- >=20 > Platform/Intel/TigerlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUpdat > eLib/DxeSiliconPolicyUpdateLate.c | 2 +- > 3 files changed, 2 insertions(+), 190 deletions(-) >=20 > diff --git > a/Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyI > nitLib/PeiFspPolicyInitLib.inf > b/Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyI > nitLib/PeiFspPolicyInitLib.inf > index 9d85d855f501..708fbac08fd6 100644 > --- > a/Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyI > nitLib/PeiFspPolicyInitLib.inf > +++ > b/Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyI > nitLib/PeiFspPolicyInitLib.inf > @@ -52,7 +52,7 @@ [Packages] > MdeModulePkg/MdeModulePkg.dec >=20 > IntelFsp2Pkg/IntelFsp2Pkg.dec >=20 > TigerlakeSiliconPkg/SiPkg.dec >=20 > - TigerLakeFspBinPkg/TigerLakeFspBinPkg.dec >=20 > + TigerLakeFspBinPkg/Client/TigerLakeFspBinPkg.dec >=20 > TigerlakeOpenBoardPkg/OpenBoardPkg.dec >=20 > UefiCpuPkg/UefiCpuPkg.dec >=20 > IntelSiliconPkg/IntelSiliconPkg.dec >=20 > diff --git > a/Platform/Intel/TigerlakeOpenBoardPkg/Library/BasePlatformHookLib/Bas > ePlatformHookLib.c > b/Platform/Intel/TigerlakeOpenBoardPkg/Library/BasePlatformHookLib/Bas > ePlatformHookLib.c > index 6209e5045061..cc5337698b8a 100644 > --- > a/Platform/Intel/TigerlakeOpenBoardPkg/Library/BasePlatformHookLib/Bas > ePlatformHookLib.c > +++ > b/Platform/Intel/TigerlakeOpenBoardPkg/Library/BasePlatformHookLib/Bas > ePlatformHookLib.c > @@ -94,194 +94,6 @@ GLOBAL_REMOVE_IF_UNREFERENCED > EFI_SIO_TABLE mSioTableWinbond_x374[] =3D { > {0x30, 0x01} // Enable it with Activation bit >=20 > }; >=20 >=20 >=20 > -/** >=20 > - Detect if a National 393 SIO is docked. If yes, enable the docked SIO >=20 > - and its serial port, and disable the onboard serial port. >=20 > - >=20 > - @retval EFI_SUCCESS Operations performed successfully. >=20 > -**/ >=20 > -STATIC >=20 > -VOID >=20 > -CheckNationalSio ( >=20 > - VOID >=20 > - ) >=20 > -{ >=20 > - UINT8 Data8; >=20 > - >=20 > - // >=20 > - // Pc87393 access is through either (0x2e, 0x2f) or (0x4e, 0x4f). >=20 > - // We use (0x2e, 0x2f) which is determined by BADD default strapping >=20 > - // >=20 > - >=20 > - // >=20 > - // Read the Pc87393 signature >=20 > - // >=20 > - IoWrite8 (0x2e, 0x20); >=20 > - Data8 =3D IoRead8 (0x2f); >=20 > - >=20 > - if (Data8 =3D=3D 0xea) { >=20 > - // >=20 > - // Signature matches - National PC87393 SIO is docked >=20 > - // >=20 > - >=20 > - // >=20 > - // Enlarge the LPC decode scope to accommodate the Docking LPC Switc= h >=20 > - // Register (SIO_DOCKING_LPC_SWITCH_REGISTER_ADDRESS is allocated > at >=20 > - // SIO_BASE_ADDRESS + 0x10) >=20 > - // >=20 > - PchLpcGenIoRangeSet ((FixedPcdGet16 (PcdSioBaseAddress) & > (UINT16)~0x7F), 0x20); >=20 > - >=20 > - // >=20 > - // Enable port switch >=20 > - // >=20 > - IoWrite8 (SIO_DOCKING_LPC_SWITCH_REGISTER_ADDRESS, 0x06); >=20 > - >=20 > - // >=20 > - // Turn on docking power >=20 > - // >=20 > - IoWrite8 (FixedPcdGet16 (PcdSioBaseAddress) + 0x0E, 0x8c); >=20 > - >=20 > - IoWrite8 (FixedPcdGet16 (PcdSioBaseAddress) + 0x0E, 0x9c); >=20 > - >=20 > - IoWrite8 (FixedPcdGet16 (PcdSioBaseAddress) + 0x0E, 0xBc); >=20 > - >=20 > - // >=20 > - // Enable port switch >=20 > - // >=20 > - IoWrite8 (SIO_DOCKING_LPC_SWITCH_REGISTER_ADDRESS, 0x7); >=20 > - >=20 > - // >=20 > - // GPIO setting >=20 > - // >=20 > - IoWrite8 (0x2e, 0x24); >=20 > - IoWrite8 (0x2f, 0x29); >=20 > - >=20 > - // >=20 > - // Enable chip clock >=20 > - // >=20 > - IoWrite8 (0x2e, 0x29); >=20 > - IoWrite8 (0x2f, 0x1e); >=20 > - >=20 > - >=20 > - // >=20 > - // Enable serial port >=20 > - // >=20 > - >=20 > - // >=20 > - // Select com1 >=20 > - // >=20 > - IoWrite8 (0x2e, 0x7); >=20 > - IoWrite8 (0x2f, 0x3); >=20 > - >=20 > - // >=20 > - // Base address: 0x3f8 >=20 > - // >=20 > - IoWrite8 (0x2e, 0x60); >=20 > - IoWrite8 (0x2f, 0x03); >=20 > - IoWrite8 (0x2e, 0x61); >=20 > - IoWrite8 (0x2f, 0xf8); >=20 > - >=20 > - // >=20 > - // Interrupt: 4 >=20 > - // >=20 > - IoWrite8 (0x2e, 0x70); >=20 > - IoWrite8 (0x2f, 0x04); >=20 > - >=20 > - // >=20 > - // Enable bank selection >=20 > - // >=20 > - IoWrite8 (0x2e, 0xf0); >=20 > - IoWrite8 (0x2f, 0x82); >=20 > - >=20 > - // >=20 > - // Activate >=20 > - // >=20 > - IoWrite8 (0x2e, 0x30); >=20 > - IoWrite8 (0x2f, 0x01); >=20 > - >=20 > - // >=20 > - // Disable onboard serial port >=20 > - // >=20 > - IoWrite8 (FixedPcdGet16 (PcdLpcSioConfigDefaultPort), 0x55); >=20 > - >=20 > - // >=20 > - // Power Down UARTs >=20 > - // >=20 > - IoWrite8 (PcdGet16 (PcdLpcSioIndexPort), 0x2); >=20 > - IoWrite8 (PcdGet16 (PcdLpcSioDataPort), 0x00); >=20 > - >=20 > - // >=20 > - // Dissable COM1 decode >=20 > - // >=20 > - IoWrite8 (PcdGet16 (PcdLpcSioIndexPort), 0x24); >=20 > - IoWrite8 (PcdGet16 (PcdLpcSioDataPort), 0); >=20 > - >=20 > - // >=20 > - // Disable COM2 decode >=20 > - // >=20 > - IoWrite8 (PcdGet16 (PcdLpcSioIndexPort), 0x25); >=20 > - IoWrite8 (PcdGet16 (PcdLpcSioDataPort), 0); >=20 > - >=20 > - // >=20 > - // Disable interrupt >=20 > - // >=20 > - IoWrite8 (PcdGet16 (PcdLpcSioIndexPort), 0x28); >=20 > - IoWrite8 (PcdGet16 (PcdLpcSioDataPort), 0x0); >=20 > - >=20 > - IoWrite8 (FixedPcdGet16 (PcdLpcSioConfigDefaultPort), 0xAA); >=20 > - >=20 > - // >=20 > - // Enable floppy >=20 > - // >=20 > - >=20 > - // >=20 > - // Select floppy >=20 > - // >=20 > - IoWrite8 (0x2e, 0x7); >=20 > - IoWrite8 (0x2f, 0x0); >=20 > - >=20 > - // >=20 > - // Base address: 0x3f0 >=20 > - // >=20 > - IoWrite8 (0x2e, 0x60); >=20 > - IoWrite8 (0x2f, 0x03); >=20 > - IoWrite8 (0x2e, 0x61); >=20 > - IoWrite8 (0x2f, 0xf0); >=20 > - >=20 > - // >=20 > - // Interrupt: 6 >=20 > - // >=20 > - IoWrite8 (0x2e, 0x70); >=20 > - IoWrite8 (0x2f, 0x06); >=20 > - >=20 > - // >=20 > - // DMA 2 >=20 > - // >=20 > - IoWrite8 (0x2e, 0x74); >=20 > - IoWrite8 (0x2f, 0x02); >=20 > - >=20 > - // >=20 > - // Activate >=20 > - // >=20 > - IoWrite8 (0x2e, 0x30); >=20 > - IoWrite8 (0x2f, 0x01); >=20 > - >=20 > - } else { >=20 > - >=20 > - // >=20 > - // No National pc87393 SIO is docked, turn off dock power and >=20 > - // disable port switch >=20 > - // >=20 > - // IoWrite8 (SIO_BASE_ADDRESS + 0x0E, 0xbf); >=20 > - // IoWrite8 (0x690, 0); >=20 > - >=20 > - // >=20 > - // If no National pc87393, just return >=20 > - // >=20 > - return ; >=20 > - } >=20 > -} >=20 > - >=20 > /** >=20 > Check whether the IT8628 SIO present on LPC. If yes, enable its serial p= orts >=20 >=20 >=20 > diff --git > a/Platform/Intel/TigerlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUpd > ateLib/DxeSiliconPolicyUpdateLate.c > b/Platform/Intel/TigerlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUp > dateLib/DxeSiliconPolicyUpdateLate.c > index 2eee9958beea..410a8d1073a9 100644 > --- > a/Platform/Intel/TigerlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUpd > ateLib/DxeSiliconPolicyUpdateLate.c > +++ > b/Platform/Intel/TigerlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUp > dateLib/DxeSiliconPolicyUpdateLate.c > @@ -88,8 +88,8 @@ SiliconPolicyUpdateLate ( > // GOP Dxe Policy Initialization >=20 > // >=20 > Status =3D GopPolicyInitDxe (gImageHandle); >=20 > - RETURN_ERROR (Status); >=20 > DEBUG ((DEBUG_INFO, "GOP Dxe Policy Initialization done\n")); >=20 > + ASSERT_EFI_ERROR (Status); >=20 > } >=20 >=20 >=20 > return Policy; >=20 > -- > 2.25.1