Re: [edk2-devel] MinPlatform Board port (GSoC 2021)

["Nate DeSimone" <nathaniel.l.desimone@intel.com>]

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Hi Benjamin,

Great to meet you and welcome to the TianoCore project! Glad you hear you are interested! Doing a board port to the Acer Aspire VN7-572G laptop sounds like a great GSoC project! I presume that since you already did a coreboot port that boot guard is disabled on this laptop and you have figured out how to flash images onto it 😊.

The only thing that might be a little challenging is getting a 2nd copy of that laptop for your mentor, so the possibility exists that when it comes to debugging problems you might be a little more on your own than you would be otherwise. I’m not too worried about that looking at your CB:35523, it seems like you know what you are doing.

For sure our conventions and infrastructure are different, but there are more parallels between MinPlatform and coreboot than might initially meet the eye. For example:

BoardInitBeforeMemoryInit() is roughly equivalent to bootblock_mainboard_init().
BoardInitBeforeSiliconInit() is roughly equivalent to mainboard_init().
SiliconPolicyUpdatePreMem() is roughly equivalent to mainboard_memory_init_params().

https://github.com/tianocore/edk2-platforms/blob/master/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib/PeiBoardInitPreMemLib.c
https://github.com/tianocore/edk2-platforms/blob/master/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib/PeiBoardInitPostMemLib.c
FSP Dispatch Mode Policy Init: https://github.com/tianocore/edk2-platforms/blob/master/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c
FSP API Mode Policy Init: https://github.com/tianocore/edk2-platforms/blob/master/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspPolicyUpdateLib.c

I’d recommend only implementing dispatch mode for new boards. We only had the API mode version because we were busy making a version of Kaby Lake FSP that supports dispatch mode (aka AmberLakeFspBinPkg) at the same time we were developing KabyLakeOpenBoardPkg back in 2019.

One difference is we group our board ports based on the SOC they use. So your new board port would go under Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G for example.

I will give you the same caution that I gave Pedro that you will need to be careful about IP cross-contamination. Since coreboot is a GPL project and TianoCore is a BSD+Patent project, we can’t use any of their code. So you need to be careful to NOT read the coreboot Kaby Lake code (with the one exception being your patch to add the VN7-572G, since you are the exclusive author of that work you can choose to re-license it as BSD.) In general, on the days you are doing TianoCore work don’t look at any coreboot code. That way the cycle of sleep and dreams clears your head of influence.

As to your questions:


  1.  I wrote the prompt to be a bit more general. I’d recommend talking about your specific project to get MinPlatform working on the Acer Aspire VN7-572G. What specific additions or changes are you planning to make to KabylakeOpenBoardPkg to get the VN7-572G working for example? Also, talk a bit about timeline. The GSoC program breaks the summer up into two half’s: June 7 – July 16 and July 16 – August 16. What should your mentor expect to be done on July 16th? What should your mentor to expect to be done on August 16th?
  2.  I’m not 100% sure, but my guess is your email address can be whatever you want. But the application form should contain your full legal name for tax purposes. That doesn’t mean we won’t use your preferred nickname when conversing.

Hope this helps and welcome to the project!

With Best Regards,
Nate

From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Benjamin Doron
Sent: Tuesday, March 30, 2021 4:28 PM
To: devel@edk2.groups.io
Subject: [edk2-devel] MinPlatform Board port (GSoC 2021)

Hi all,
This may be my first time participating in GSoC and contributing to TianoCore. I'm looking to complete the MinPlatform board port task for an Acer Aspire VN7-572G laptop, which is a Skylake-U platform supported by the Kabylake FSP.

I have previously written a coreboot port for the same board, still pending review. I hope the fact that some of the board-level understanding is complete does not preclude me from participating, but many implementation details don't seem to transfer. Also, I'm looking to learn more about firmware and produce something new. I've made some other contributions to coreboot as well.

I've also previously worked on an EDK2 fork, adding and developing features for UefiPayloadPkg on coreboot (I can link it if anyone wants to see and possibly work on upstreaming my commits a different time).
I have some knowledge of C programming.

Some questions:

  1.  Regarding the project proposal, Google recommends to avoid copying the prompt. I can write briefly about MinPlatform, but the task outline doesn't leave much room for flexibility. How do I outline this properly?
  2.  My legal name does not match my email/preferred name. How do I resolve this (without, for example, the form being rejected because my email and first name don't match)?

I have a technical question or two as well, but they can wait.

Looking forward to working on TianoCore!


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