From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mx.groups.io with SMTP id smtpd.web08.3287.1627519697463390452 for ; Wed, 28 Jul 2021 17:48:17 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@intel.onmicrosoft.com header.s=selector2-intel-onmicrosoft-com header.b=gJTfcdYq; spf=pass (domain: intel.com, ip: 134.134.136.100, mailfrom: nathaniel.l.desimone@intel.com) X-IronPort-AV: E=McAfee;i="6200,9189,10059"; a="276559942" X-IronPort-AV: E=Sophos;i="5.84,276,1620716400"; d="scan'208";a="276559942" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jul 2021 17:48:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,276,1620716400"; d="scan'208";a="499420946" Received: from orsmsx601.amr.corp.intel.com ([10.22.229.14]) by fmsmga004.fm.intel.com with ESMTP; 28 Jul 2021 17:48:15 -0700 Received: from orsmsx610.amr.corp.intel.com (10.22.229.23) by ORSMSX601.amr.corp.intel.com (10.22.229.14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.10; Wed, 28 Jul 2021 17:48:14 -0700 Received: from ORSEDG602.ED.cps.intel.com (10.7.248.7) by orsmsx610.amr.corp.intel.com (10.22.229.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.10 via Frontend Transport; Wed, 28 Jul 2021 17:48:14 -0700 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (104.47.58.108) by edgegateway.intel.com (134.134.137.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2242.10; Wed, 28 Jul 2021 17:48:13 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=aqEN6x3cGS090eTKmg5XkgLQgFEnMmlOcIGIaL7gTB5xY3ZR+Lj+oUMAVgFxBSVMs0V+phJGnCiBUssZ3IMEm0GwJNFUgzGJfDjXqrnSEmeNdiHWwKz3Io/WcWElnNb+KWno5fXLrV4bwdyEaaqNQDMcPt5k1s6sg+eBMlCN8ZiPNzspKJrPkRtZcJB14DmprUVz3zIS1pTQVcwPsWZmuYY7e0zWNVKZyW6J5ZEtafsNp8oiApsjwNrxA41bhsRgBtMYrz9NY3dITdZvpMEo4KasbRvEK1otDHS8UHl4Vyq6clWYh3RqLYpffusc6D51Se0Qu0/BUm/BKWmS4/bvrw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=LThGqTzvwr5c9sCsn/hxyc6EkV1k4FFrMUNPsTIl/S8=; b=IREee9N2Gv5Cml49+MzrCHtGC/tzTGDqFXivNX0WLaAzn0Fhsy4lLWcKUDcA91fKD5hTZ7MfN1+KpBuFzGmleP0Otq4inx6/SqtWxYpYRcGTXNbpcgRtQM1LGJPe4z2gTHntcl4xH/092zw8jx4d6x2MCeIb7YhLb33dTLRD6NuaWaunDWD2kosmBDwUYnUidtuwFi/rRSmVA/4l4xuyMUXIh3S6cWhIfAeookgw2d8XlzvxW+5RyF6q/DUwYUEjcszRy895j6Q3VE2Q32pwN7z2AfvvRJwSNmbMYi8V79/rDVdenkoAzH8Rj743myaVZBkcltTOS4Tv60XzEagZEA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel.onmicrosoft.com; s=selector2-intel-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=LThGqTzvwr5c9sCsn/hxyc6EkV1k4FFrMUNPsTIl/S8=; b=gJTfcdYq9Yrvnv1SHKf6YRc7ZSQfPB0BvQlosGDfCXirfSYplfHmBFFfCt2p4kGxYiCsFpY/U+sheKzFyDv2Gg3TEfYflQg/IcRIdC4RA6sKjUkqwD3InMVJiU8e/snYghGVYcAOZ777WrgqE5lFTvyItJ6XwxuLdlZCT4MNx2Q= Received: from MWHPR1101MB2160.namprd11.prod.outlook.com (2603:10b6:301:5b::12) by MWHPR11MB1917.namprd11.prod.outlook.com (2603:10b6:300:112::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4373.18; Thu, 29 Jul 2021 00:48:11 +0000 Received: from MWHPR1101MB2160.namprd11.prod.outlook.com ([fe80::64ce:a6b0:9ae8:e644]) by MWHPR1101MB2160.namprd11.prod.outlook.com ([fe80::64ce:a6b0:9ae8:e644%12]) with mapi id 15.20.4352.032; Thu, 29 Jul 2021 00:48:11 +0000 From: "Nate DeSimone" To: "mikuback@linux.microsoft.com" , "devel@edk2.groups.io" CC: "Chaganty, Rangasai V" , "Luo, Heng" Subject: Re: [edk2-platforms][PATCH v4 41/41] TigerlakeSiliconPkg/BasePchSpiCommonLib: Identify flash regions by GUID Thread-Topic: [edk2-platforms][PATCH v4 41/41] TigerlakeSiliconPkg/BasePchSpiCommonLib: Identify flash regions by GUID Thread-Index: AQHXaghXkAxVZLFMekekeHVJibazX6tZUqpA Date: Thu, 29 Jul 2021 00:48:11 +0000 Message-ID: References: <20210625212120.235-1-mikuback@linux.microsoft.com> <20210625212120.235-42-mikuback@linux.microsoft.com> In-Reply-To: <20210625212120.235-42-mikuback@linux.microsoft.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-reaction: no-action dlp-version: 11.5.1.3 dlp-product: dlpe-windows authentication-results: linux.microsoft.com; dkim=none (message not signed) header.d=none;linux.microsoft.com; dmarc=none action=none header.from=intel.com; x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 60643d3c-45a1-4c33-255a-08d9522a8aa9 x-ms-traffictypediagnostic: MWHPR11MB1917: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:7691; x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: qaxYjQPzge5cCwpqi0yGMd/nRTK5mYmHd6jQbGDzWkaQuMFdmxUiMFHH1XrRh3M9KVQ+yVfyNyE8GvqkKmqmj1Duej5/BsqPmO2FNs3ug4tLFdeMB33fCInjSE99MBTSuvVBXQfedREofJfRvKFJOeGxAZ/sFxiqjRKSTg/pnaclxdWCFJiviTMLE66yzNXiE3ajaNfvLRr6WGq9vs8CI4uGNjBFhhAkr6KzIL8+5/M2HXLt/7SCvEhx4jTNqd9WzEBlNSj81LaO1RAbMK32tI1cddgEOCY5kklQ4wXz5QribMFyCxHjodzmFQ9xNnqeGjunM9jQa3MzIeWGxhZjE0t9582KlhRKCrtrBKyYg1hMVdEIVfDxK1XyyMSZ3T4Jotq+dEgNt/x6S1yU8gSmX2+tTthDzeExzkYwsHnLoIapb/jjDo4T/P2UWnN5rOd0rynWfQYD5SgSl7qgXV+okaNfdAvYOnmd6wZqiDFAKg2qv5JwKU6xYBNMDQ0DOLasKm2UzLsknvjqRBIFeOhAU42ybQhbTAJ6tsMDqNXqx7Opk8h/8f3K7ek46VQqwE1BZ7c28Q7so7JVkAG0nz1S2UfcGOPMpgfHuCXPSy8vz57OBMxWnQHSJX/n0hdI6azNBY482+Y4hgzGwuIXuBFxRjjQ6G9JDfAhic9jxaYAzpEwW8Yc54aMJ5ne6ZxOlqYoCyH7w8RaqYOd6kskBOAC66rzgNn+mgfjPb6Ss2lH63sR+4xG53jrfsR0mbQz6vhh3+MWfs6/GfPrebBWkH6qGfU1ia7Hbyq35hXPwmo6fjDDl/JIUkZvVtAT/8tNyVB0 x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:MWHPR1101MB2160.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(4636009)(136003)(366004)(376002)(39860400002)(346002)(396003)(2906002)(55016002)(5660300002)(38100700002)(122000001)(8936002)(7696005)(66476007)(19627235002)(53546011)(66556008)(66446008)(64756008)(52536014)(30864003)(26005)(38070700005)(6506007)(8676002)(316002)(9686003)(186003)(76116006)(66946007)(83380400001)(107886003)(4326008)(478600001)(54906003)(45080400002)(110136005)(71200400001)(86362001)(33656002)(213903007)(579004);DIR:OUT;SFP:1102; x-ms-exchange-antispam-messagedata-chunkcount: 1 x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?UvvXTFX5YTNU2refeLLkNLav1nZtIe0sNqsPv3hl3EEHgqHn8aTuOQ2R0t/W?= =?us-ascii?Q?teTY7trSvlWhbpnaFlvSzCf16ama/gUhvx0n4jRV1i2jVdAW4ps3Jw4RVBjY?= =?us-ascii?Q?gfM9CHWmmno+yLtiVVxOVCwgoAPxHoBWX3qoGOE2XYKHP7ylLWhAnLs0GsG3?= =?us-ascii?Q?+QZdlu33fVRT6TShlbPjrP/v48rAETLlQxgyTcudBxvXFnI48dQRx4zE7VmU?= =?us-ascii?Q?lppPkdrA7LOPGrDL66zUD18kXn7fldjLa1TW6VCiTuV1zt1GwdxBGrQkMflT?= =?us-ascii?Q?EM8sHV27r2A0+lpyr4yfGdMpsGyNoSRJbgNchdOa3B5NtoIVvMxj6B6kf0mu?= =?us-ascii?Q?vKneFd3Ye1O+l6/q4ynvP1o8RYmGtuVwGj5NTVwR5mYNW8Ty4fHJdrQut+Id?= =?us-ascii?Q?dBVhgGx36cHFtOr+d8D8NAnKvsO7OnC8BPaE7sAAIXPfVwtfYsWxL6gJ7ZxY?= =?us-ascii?Q?BLmXAJL3uon1yWTsjsZcSbazJHZPD92w+XBEpKmLMy4j400//Kx2613TsMgs?= =?us-ascii?Q?pBb0Wsoah4Z6FgJjBCXGrMimRKW0O0LF2D7t99p6UNhNBkQ4q74/KTnvXuxq?= =?us-ascii?Q?2txU/RjiXRn9Qv7sGq9WMh+VACdBC7w5EwwR4N6Dblyktqaih06mAsu97zbX?= =?us-ascii?Q?KjFBVsvwD/9UzTUnN51qwGkH1TitDuS8MRdEXiNB+6JXuBvzzMqrdj4vLITC?= =?us-ascii?Q?fPGpqV2l9jqt6R1F8WQ/K4WW5K1+N3s3vZR3cgQgcx1g+Opx5L/DuJG7XkK6?= =?us-ascii?Q?FijFzb5YDbtMZz2rFxttzABNgyTfyyasxQ1sxyqoIR4uEMUO10CDVOlkqHrn?= =?us-ascii?Q?FVfrlVT/uR5YM8jtM03URJ+iL9zYgOKagW0qdYmrfJJe/uz2IszN2TEN7C++?= =?us-ascii?Q?hp7TTGmX6Pdi907hMFnnVxPgTIxgC9qYz1QiBTHSxUY0tnCn45Ejy7SpST3F?= =?us-ascii?Q?jEkrdzEZ2kBWr6b3fSc/vSXDJq/e32HOKxeKu8Q36dt9tKwrkYlATWB8LE+K?= =?us-ascii?Q?DTj8yh6A8WCd43LL4cbM9RrWpyngmpK5xGBgoyXoGUP4z7D3P/vYJUdfWVAB?= =?us-ascii?Q?Ndo6AypNvFvfmrNN0woveSqJcZ5i1hu/dzL8VY3sAymM9fLzBEwBm01xT/va?= =?us-ascii?Q?JWxoFEDX/rnpQhy0TuZcDKK6HbTJVV8VxetYvnNsmyJgCagG1yHQBBb2bIKN?= =?us-ascii?Q?qvu0H+4vRr+4JHMRe6nGqrskmLosKkhEJ+eM7l+1XABZOHRgNfX0/F+T+LUV?= =?us-ascii?Q?BF4Uix8tArvksQoiaFxzrUgndnjohI5t/9NtD+sLEeH4NWElPpmVbjXpcLPZ?= =?us-ascii?Q?Sda1PmtlQ6nSpkD/dadpcvMo?= MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MWHPR1101MB2160.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 60643d3c-45a1-4c33-255a-08d9522a8aa9 X-MS-Exchange-CrossTenant-originalarrivaltime: 29 Jul 2021 00:48:11.6961 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: edJmeBbT8zgFX74nR67eFHZbCTmENumpGI1f3+GPFjadTXUT3gK0RG7ybtHSrhPhCbClhO5elFCRGlWR7SfCBXI42xej0bJAxRG+Yqdyb3A= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR11MB1917 Return-Path: nathaniel.l.desimone@intel.com X-OriginatorOrg: intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Nate DeSimone > -----Original Message----- > From: mikuback@linux.microsoft.com > Sent: Friday, June 25, 2021 2:21 PM > To: devel@edk2.groups.io > Cc: Chaganty, Rangasai V ; Desimone, > Nathaniel L ; Luo, Heng > > Subject: [edk2-platforms][PATCH v4 41/41] > TigerlakeSiliconPkg/BasePchSpiCommonLib: Identify flash regions by GUID >=20 > From: Michael Kubacki >=20 > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 >=20 > Updates the library to identify flash regions by GUID and internally map = the > GUID entries to values specific to TigerlakeSiliconPkg. >=20 > Cc: Rangasai V Chaganty > Cc: Nate DeSimone > Cc: Heng Luo > Signed-off-by: Michael Kubacki > --- >=20 > Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommo= n > Lib/SpiCommon.c | 176 +++++++++++++++++--- >=20 > Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Library/SpiC= om > monLib.h | 16 +- >=20 > Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommo= n > Lib/BaseSpiCommonLib.inf | 18 +- > 3 files changed, 177 insertions(+), 33 deletions(-) >=20 > diff --git > a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCom= m > onLib/SpiCommon.c > b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCom= m > onLib/SpiCommon.c > index 954b349e7c8a..5f372a5b58cb 100644 > --- > a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCom= m > onLib/SpiCommon.c > +++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseS > +++ piCommonLib/SpiCommon.c > @@ -2,9 +2,12 @@ > PCH SPI Common Driver implements the SPI Host Controller Compatibility > Interface. >=20 > Copyright (c) 2021, Intel Corporation. All rights reserved.
> + Copyright (c) Microsoft Corporation.
> + > SPDX-License-Identifier: BSD-2-Clause-Patent **/ #include > > +#include > #include > #include > #include > @@ -21,6 +24,125 @@ > #include > #include >=20 > +typedef enum { > + FlashRegionDescriptor, > + FlashRegionBios, > + FlashRegionMe, > + FlashRegionGbe, > + FlashRegionPlatformData, > + FlashRegionDer, > + FlashRegionSecondaryBios, > + FlashRegionMicrocodePatch, > + FlashRegionEc, > + FlashRegionDeviceExpansion, > + FlashRegionIe, > + FlashRegion10GbeA, > + FlashRegion10GbeB, > + FlashRegionAll =3D 16, > + FlashRegionMax > +} FLASH_REGION_TYPE; > + > +typedef struct { > + EFI_GUID *Guid; > + FLASH_REGION_TYPE Type; > +} FLASH_REGION_MAPPING; > + > +FLASH_REGION_MAPPING mFlashRegionTypes[] =3D { > + { > + &gFlashRegionDescriptorGuid, > + FlashRegionDescriptor > + }, > + { > + &gFlashRegionBiosGuid, > + FlashRegionBios > + }, > + { > + &gFlashRegionMeGuid, > + FlashRegionMe > + }, > + { > + &gFlashRegionGbeGuid, > + FlashRegionGbe > + }, > + { > + &gFlashRegionPlatformDataGuid, > + FlashRegionPlatformData > + }, > + { > + &gFlashRegionDerGuid, > + FlashRegionDer > + }, > + { > + &gFlashRegionSecondaryBiosGuid, > + FlashRegionSecondaryBios > + }, > + { > + &gFlashRegionMicrocodePatchGuid, > + FlashRegionMicrocodePatch > + }, > + { > + &gFlashRegionEcGuid, > + FlashRegionEc > + }, > + { > + &gFlashRegionDeviceExpansionGuid, > + FlashRegionDeviceExpansion > + }, > + { > + &gFlashRegionIeGuid, > + FlashRegionIe > + }, > + { > + &gFlashRegion10GbeAGuid, > + FlashRegion10GbeA > + }, > + { > + &gFlashRegion10GbeBGuid, > + FlashRegion10GbeB > + }, > + { > + &gFlashRegionAllGuid, > + FlashRegionAll > + }, > + { > + &gFlashRegionMaxGuid, > + FlashRegionMax > + } > +}; > + > +/** > + Returns the type of a flash region given its GUID. > + > + @param[in] FlashRegionGuid Pointer to the flash region GUID. > + @param[out] FlashRegionType Pointer to a buffer that will be set t= o the > flash region type value. > + > + @retval EFI_SUCCESS The flash region type was found = for the > given flash region GUID. > + @retval EFI_INVALID_PARAMETER A pointer argument passed to the > function is NULL. > + @retval EFI_NOT_FOUND The flash region type was not fo= und for > the given flash region GUID. > + > +**/ > +EFI_STATUS > +GetFlashRegionType ( > + IN EFI_GUID *FlashRegionGuid, > + OUT FLASH_REGION_TYPE *FlashRegionType > + ) > +{ > + UINTN Index; > + > + if (FlashRegionGuid =3D=3D NULL || FlashRegionType =3D=3D NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + for (Index =3D 0; Index < ARRAY_SIZE (mFlashRegionTypes); Index++) { > + if (CompareGuid (mFlashRegionTypes[Index].Guid, FlashRegionGuid)) { > + *FlashRegionType =3D mFlashRegionTypes[Index].Type; > + return EFI_SUCCESS; > + } > + } > + > + return EFI_NOT_FOUND; > +} > + > /** > Initialize an SPI protocol instance. >=20 > @@ -179,7 +301,7 @@ SpiProtocolConstructor ( > ASSERT (SpiInstance->CpuStrapBaseAddr !=3D 0); >=20 > if (SpiInstance->CpuStrapBaseAddr !=3D 0x300) { > - Status =3D SpiProtocolFlashRead (&(SpiInstance->SpiProtocol), > FlashRegionAll, R_FLASH_UMAP1, sizeof (Data32), (UINT8 *) (&Data32)); > + Status =3D SpiProtocolFlashRead (&(SpiInstance->SpiProtocol), > + &gFlashRegionAllGuid, R_FLASH_UMAP1, sizeof (Data32), (UINT8 *) > + (&Data32)); > ASSERT_EFI_ERROR (Status); > Mdtba =3D (UINT16)(((Data32 & B_FLASH_UMAP1_MDTBA) >> > N_FLASH_UMAP1_MDTBA) << N_FLASH_UMAP1_MDTBA_REPR); > DEBUG ((DEBUG_INFO, "Mdtba : %0x\n", Mdtba)); @@ -312,7 +434,7 @@ > WaitForSpiCycleComplete ( > This function sends the programmed SPI command to the slave device. >=20 > @param[in] This Pointer to the PCH_SPI_PROTOCOL instan= ce. > - @param[in] SpiRegionType The SPI Region type for flash cycle wh= ich is > listed in the Descriptor > + @param[in] FlashRegionGuid The Flash Region GUID for flash cycle > which corresponds to the type in the descriptor. > @param[in] FlashCycleType The Flash SPI cycle type list in HSFC > (Hardware Sequencing Flash Control Register) register > @param[in] Address The Flash Linear Address must fall wit= hin a > region for which BIOS has access permissions. > @param[in] ByteCount Number of bytes in the data portion of= the SPI > cycle. > @@ -327,7 +449,7 @@ STATIC > EFI_STATUS > SendSpiCmd ( > IN PCH_SPI_PROTOCOL *This, > - IN FLASH_REGION_TYPE FlashRegionType, > + IN EFI_GUID *FlashRegionGuid, > IN FLASH_CYCLE_TYPE FlashCycleType, > IN UINT32 Address, > IN UINT32 ByteCount, > @@ -413,7 +535,7 @@ SendSpiCmd ( > } > } >=20 > - Status =3D SpiProtocolGetRegionAddress (This, FlashRegionType, > &HardwareSpiAddr, &FlashRegionSize); > + Status =3D SpiProtocolGetRegionAddress (This, FlashRegionGuid, > + &HardwareSpiAddr, &FlashRegionSize); > if (EFI_ERROR (Status)) { > goto SendSpiCmdEnd; > } > @@ -626,7 +748,7 @@ SendSpiCmd ( > Read data from the flash part. >=20 > @param[in] This Pointer to the PCH_SPI_PROTOCOL instan= ce. > - @param[in] FlashRegionType The Flash Region type for flash cycle = which > is listed in the Descriptor. > + @param[in] FlashRegionGuid The Flash Region GUID for flash cycle > which corresponds to the type in the descriptor. > @param[in] Address The Flash Linear Address must fall wit= hin a > region for which BIOS has access permissions. > @param[in] ByteCount Number of bytes in the data portion of= the SPI > cycle. > @param[out] Buffer The Pointer to caller-allocated buffer= containing > the dada received. > @@ -640,7 +762,7 @@ EFI_STATUS > EFIAPI > SpiProtocolFlashRead ( > IN PCH_SPI_PROTOCOL *This, > - IN FLASH_REGION_TYPE FlashRegionType, > + IN EFI_GUID *FlashRegionGuid, > IN UINT32 Address, > IN UINT32 ByteCount, > OUT UINT8 *Buffer > @@ -653,7 +775,7 @@ SpiProtocolFlashRead ( > // > Status =3D SendSpiCmd ( > This, > - FlashRegionType, > + FlashRegionGuid, > FlashCycleRead, > Address, > ByteCount, > @@ -666,7 +788,7 @@ SpiProtocolFlashRead ( > Write data to the flash part. >=20 > @param[in] This Pointer to the PCH_SPI_PROTOCOL instan= ce. > - @param[in] FlashRegionType The Flash Region type for flash cycle = which > is listed in the Descriptor. > + @param[in] FlashRegionGuid The Flash Region GUID for flash cycle > which corresponds to the type in the descriptor. > @param[in] Address The Flash Linear Address must fall wit= hin a > region for which BIOS has access permissions. > @param[in] ByteCount Number of bytes in the data portion of= the SPI > cycle. > @param[in] Buffer Pointer to caller-allocated buffer con= taining the > data sent during the SPI cycle. > @@ -679,7 +801,7 @@ EFI_STATUS > EFIAPI > SpiProtocolFlashWrite ( > IN PCH_SPI_PROTOCOL *This, > - IN FLASH_REGION_TYPE FlashRegionType, > + IN EFI_GUID *FlashRegionGuid, > IN UINT32 Address, > IN UINT32 ByteCount, > IN UINT8 *Buffer > @@ -692,7 +814,7 @@ SpiProtocolFlashWrite ( > // > Status =3D SendSpiCmd ( > This, > - FlashRegionType, > + FlashRegionGuid, > FlashCycleWrite, > Address, > ByteCount, > @@ -705,7 +827,7 @@ SpiProtocolFlashWrite ( > Erase some area on the flash part. >=20 > @param[in] This Pointer to the PCH_SPI_PROTOCOL instan= ce. > - @param[in] FlashRegionType The Flash Region type for flash cycle = which > is listed in the Descriptor. > + @param[in] FlashRegionGuid The Flash Region GUID for flash cycle > which corresponds to the type in the descriptor. > @param[in] Address The Flash Linear Address must fall wit= hin a > region for which BIOS has access permissions. > @param[in] ByteCount Number of bytes in the data portion of= the SPI > cycle. >=20 > @@ -717,7 +839,7 @@ EFI_STATUS > EFIAPI > SpiProtocolFlashErase ( > IN PCH_SPI_PROTOCOL *This, > - IN FLASH_REGION_TYPE FlashRegionType, > + IN EFI_GUID *FlashRegionGuid, > IN UINT32 Address, > IN UINT32 ByteCount > ) > @@ -729,7 +851,7 @@ SpiProtocolFlashErase ( > // > Status =3D SendSpiCmd ( > This, > - FlashRegionType, > + FlashRegionGuid, > FlashCycleErase, > Address, > ByteCount, > @@ -790,7 +912,7 @@ SpiProtocolFlashReadSfdp ( > // > Status =3D SendSpiCmd ( > This, > - FlashRegionAll, > + &gFlashRegionAllGuid, > FlashCycleReadSfdp, > FlashAddress, > ByteCount, > @@ -849,7 +971,7 @@ SpiProtocolFlashReadJedecId ( > // > Status =3D SendSpiCmd ( > This, > - FlashRegionAll, > + &gFlashRegionAllGuid, > FlashCycleReadJedecId, > Address, > ByteCount, > @@ -890,7 +1012,7 @@ SpiProtocolFlashWriteStatus ( > // > Status =3D SendSpiCmd ( > This, > - FlashRegionAll, > + &gFlashRegionAllGuid, > FlashCycleWriteStatus, > 0, > ByteCount, > @@ -931,7 +1053,7 @@ SpiProtocolFlashReadStatus ( > // > Status =3D SendSpiCmd ( > This, > - FlashRegionAll, > + &gFlashRegionAllGuid, > FlashCycleReadStatus, > 0, > ByteCount, > @@ -944,7 +1066,7 @@ SpiProtocolFlashReadStatus ( > Get the SPI region base and size, based on the enum type >=20 > @param[in] This Pointer to the PCH_SPI_PROTOCOL instan= ce. > - @param[in] FlashRegionType The Flash Region type for for the base > address which is listed in the Descriptor. > + @param[in] FlashRegionGuid The Flash Region GUID for the base > address which corresponds to the type in the descriptor. > @param[out] BaseAddress The Flash Linear Address for the Regio= n 'n' > Base > @param[out] RegionSize The size for the Region 'n' >=20 > @@ -956,17 +1078,23 @@ EFI_STATUS > EFIAPI > SpiProtocolGetRegionAddress ( > IN PCH_SPI_PROTOCOL *This, > - IN FLASH_REGION_TYPE FlashRegionType, > + IN EFI_GUID *FlashRegionGuid, > OUT UINT32 *BaseAddress, > OUT UINT32 *RegionSize > ) > { > - SPI_INSTANCE *SpiInstance; > - UINTN PchSpiBar0; > - UINT32 ReadValue; > + EFI_STATUS Status; > + FLASH_REGION_TYPE FlashRegionType; > + SPI_INSTANCE *SpiInstance; > + UINTN PchSpiBar0; > + UINT32 ReadValue; >=20 > SpiInstance =3D SPI_INSTANCE_FROM_SPIPROTOCOL (This); >=20 > + Status =3D GetFlashRegionType (FlashRegionGuid, &FlashRegionType); if > + (EFI_ERROR (Status)) { > + return EFI_INVALID_PARAMETER; > + } > if (FlashRegionType >=3D FlashRegionMax) { > return EFI_INVALID_PARAMETER; > } > @@ -1047,7 +1175,7 @@ SpiProtocolReadPchSoftStrap ( > // > Status =3D SendSpiCmd ( > This, > - FlashRegionDescriptor, > + &gFlashRegionDescriptorGuid, > FlashCycleRead, > StrapFlashAddr, > ByteCount, > @@ -1105,7 +1233,7 @@ SpiProtocolReadCpuSoftStrap ( > // > Status =3D SendSpiCmd ( > This, > - FlashRegionDescriptor, > + &gFlashRegionDescriptorGuid, > FlashCycleRead, > StrapFlashAddr, > ByteCount, > diff --git > a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Library/Sp= iCo > mmonLib.h > b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Library/Sp= iCo > mmonLib.h > index 3290f7712280..3038ae749ef2 100644 > --- > a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Library/Sp= iCo > mmonLib.h > +++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Libra > +++ ry/SpiCommonLib.h > @@ -146,7 +146,7 @@ IsSpiFlashWriteGranted ( > Read data from the flash part. >=20 > @param[in] This Pointer to the PCH_SPI_PROTOCOL instan= ce. > - @param[in] FlashRegionType The Flash Region type for flash cycle = which > is listed in the Descriptor. > + @param[in] FlashRegionGuid The Flash Region GUID for flash cycle > which corresponds to the type in the descriptor. > @param[in] Address The Flash Linear Address must fall wit= hin a > region for which BIOS has access permissions. > @param[in] ByteCount Number of bytes in the data portion of= the SPI > cycle. > @param[out] Buffer The Pointer to caller-allocated buffer= containing > the dada received. > @@ -160,7 +160,7 @@ EFI_STATUS > EFIAPI > SpiProtocolFlashRead ( > IN PCH_SPI_PROTOCOL *This, > - IN FLASH_REGION_TYPE FlashRegionType, > + IN EFI_GUID *FlashRegionGuid, > IN UINT32 Address, > IN UINT32 ByteCount, > OUT UINT8 *Buffer > @@ -170,7 +170,7 @@ SpiProtocolFlashRead ( > Write data to the flash part. >=20 > @param[in] This Pointer to the PCH_SPI_PROTOCOL instan= ce. > - @param[in] FlashRegionType The Flash Region type for flash cycle = which > is listed in the Descriptor. > + @param[in] FlashRegionGuid The Flash Region GUID for flash cycle > which corresponds to the type in the descriptor. > @param[in] Address The Flash Linear Address must fall wit= hin a > region for which BIOS has access permissions. > @param[in] ByteCount Number of bytes in the data portion of= the SPI > cycle. > @param[in] Buffer Pointer to caller-allocated buffer con= taining the > data sent during the SPI cycle. > @@ -183,7 +183,7 @@ EFI_STATUS > EFIAPI > SpiProtocolFlashWrite ( > IN PCH_SPI_PROTOCOL *This, > - IN FLASH_REGION_TYPE FlashRegionType, > + IN EFI_GUID *FlashRegionGuid, > IN UINT32 Address, > IN UINT32 ByteCount, > IN UINT8 *Buffer > @@ -193,7 +193,7 @@ SpiProtocolFlashWrite ( > Erase some area on the flash part. >=20 > @param[in] This Pointer to the PCH_SPI_PROTOCOL instan= ce. > - @param[in] FlashRegionType The Flash Region type for flash cycle = which > is listed in the Descriptor. > + @param[in] FlashRegionGuid The Flash Region GUID for flash cycle > which corresponds to the type in the descriptor. > @param[in] Address The Flash Linear Address must fall wit= hin a > region for which BIOS has access permissions. > @param[in] ByteCount Number of bytes in the data portion of= the SPI > cycle. >=20 > @@ -205,7 +205,7 @@ EFI_STATUS > EFIAPI > SpiProtocolFlashErase ( > IN PCH_SPI_PROTOCOL *This, > - IN FLASH_REGION_TYPE FlashRegionType, > + IN EFI_GUID *FlashRegionGuid, > IN UINT32 Address, > IN UINT32 ByteCount > ); > @@ -298,7 +298,7 @@ SpiProtocolFlashReadStatus ( > Get the SPI region base and size, based on the enum type >=20 > @param[in] This Pointer to the PCH_SPI_PROTOCOL instan= ce. > - @param[in] FlashRegionType The Flash Region type for for the base > address which is listed in the Descriptor. > + @param[in] FlashRegionGuid The Flash Region GUID for the base > address which corresponds to the type in the descriptor. > @param[out] BaseAddress The Flash Linear Address for the Regio= n 'n' > Base > @param[out] RegionSize The size for the Region 'n' >=20 > @@ -310,7 +310,7 @@ EFI_STATUS > EFIAPI > SpiProtocolGetRegionAddress ( > IN PCH_SPI_PROTOCOL *This, > - IN FLASH_REGION_TYPE FlashRegionType, > + IN EFI_GUID *FlashRegionGuid, > OUT UINT32 *BaseAddress, > OUT UINT32 *RegionSize > ); > diff --git > a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCom= m > onLib/BaseSpiCommonLib.inf > b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCom= m > onLib/BaseSpiCommonLib.inf > index 2686dff41e25..4981276e13e8 100644 > --- > a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCom= m > onLib/BaseSpiCommonLib.inf > +++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseS > +++ piCommonLib/BaseSpiCommonLib.inf > @@ -2,6 +2,7 @@ > # Component description file for the PchSpiCommonLib # # Copyright (= c) > 2021, Intel Corporation. All rights reserved.
> +# Copyright (c) Microsoft Corporation.
> # SPDX-License-Identifier: BSD-2-Clause-Patent # ## @@ -29,4 +30,19 @= @ > [LibraryClasses] > PchPciBdfLib > SpiAccessLib >=20 > -[Pcd] > +[Guids] > + gFlashRegionDescriptorGuid > + gFlashRegionBiosGuid > + gFlashRegionMeGuid > + gFlashRegionGbeGuid > + gFlashRegionPlatformDataGuid > + gFlashRegionDerGuid > + gFlashRegionSecondaryBiosGuid > + gFlashRegionMicrocodePatchGuid > + gFlashRegionEcGuid > + gFlashRegionDeviceExpansionGuid > + gFlashRegionIeGuid > + gFlashRegion10GbeAGuid > + gFlashRegion10GbeBGuid > + gFlashRegionAllGuid > + gFlashRegionMaxGuid > -- > 2.28.0.windows.1